Amit Gandhi / sensen_copy_2

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targets/TARGET_STM/TARGET_STM32F2/serial_api.c@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /* mbed Microcontroller Library
<> 149:156823d33999 2 *******************************************************************************
<> 149:156823d33999 3 * Copyright (c) 2016, STMicroelectronics
<> 149:156823d33999 4 * All rights reserved.
<> 149:156823d33999 5 *
<> 149:156823d33999 6 * Redistribution and use in source and binary forms, with or without
<> 149:156823d33999 7 * modification, are permitted provided that the following conditions are met:
<> 149:156823d33999 8 *
<> 149:156823d33999 9 * 1. Redistributions of source code must retain the above copyright notice,
<> 149:156823d33999 10 * this list of conditions and the following disclaimer.
<> 149:156823d33999 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 149:156823d33999 12 * this list of conditions and the following disclaimer in the documentation
<> 149:156823d33999 13 * and/or other materials provided with the distribution.
<> 149:156823d33999 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 149:156823d33999 15 * may be used to endorse or promote products derived from this software
<> 149:156823d33999 16 * without specific prior written permission.
<> 149:156823d33999 17 *
<> 149:156823d33999 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 149:156823d33999 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 149:156823d33999 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 149:156823d33999 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 149:156823d33999 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 149:156823d33999 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 149:156823d33999 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 149:156823d33999 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 149:156823d33999 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 149:156823d33999 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 149:156823d33999 28 *******************************************************************************
<> 149:156823d33999 29 */
<> 149:156823d33999 30 #include "mbed_assert.h"
<> 149:156823d33999 31 #include "serial_api.h"
<> 149:156823d33999 32
<> 149:156823d33999 33 #if DEVICE_SERIAL
<> 149:156823d33999 34
<> 149:156823d33999 35 #include "cmsis.h"
<> 149:156823d33999 36 #include "pinmap.h"
<> 149:156823d33999 37 #include <string.h>
<> 149:156823d33999 38 #include "PeripheralPins.h"
<> 149:156823d33999 39 #include "mbed_error.h"
<> 149:156823d33999 40
<> 149:156823d33999 41 #define UART_NUM (8)
<> 149:156823d33999 42
<> 149:156823d33999 43 static uint32_t serial_irq_ids[UART_NUM] = {0};
<> 149:156823d33999 44 static UART_HandleTypeDef uart_handlers[UART_NUM];
<> 149:156823d33999 45
<> 149:156823d33999 46 static uart_irq_handler irq_handler;
<> 149:156823d33999 47
<> 149:156823d33999 48 int stdio_uart_inited = 0;
<> 149:156823d33999 49 serial_t stdio_uart;
<> 149:156823d33999 50
<> 149:156823d33999 51 #if DEVICE_SERIAL_ASYNCH
<> 149:156823d33999 52 #define SERIAL_S(obj) (&((obj)->serial))
<> 149:156823d33999 53 #else
<> 149:156823d33999 54 #define SERIAL_S(obj) (obj)
<> 149:156823d33999 55 #endif
<> 149:156823d33999 56
<> 149:156823d33999 57 static void init_uart(serial_t *obj)
<> 149:156823d33999 58 {
<> 149:156823d33999 59 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 60 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 61 huart->Instance = (USART_TypeDef *)(obj_s->uart);
<> 149:156823d33999 62
<> 149:156823d33999 63 huart->Init.BaudRate = obj_s->baudrate;
<> 149:156823d33999 64 huart->Init.WordLength = obj_s->databits;
<> 149:156823d33999 65 huart->Init.StopBits = obj_s->stopbits;
<> 149:156823d33999 66 huart->Init.Parity = obj_s->parity;
<> 149:156823d33999 67 #if DEVICE_SERIAL_FC
<> 149:156823d33999 68 huart->Init.HwFlowCtl = obj_s->hw_flow_ctl;
<> 149:156823d33999 69 #else
<> 149:156823d33999 70 huart->Init.HwFlowCtl = UART_HWCONTROL_NONE;
<> 149:156823d33999 71 #endif
<> 149:156823d33999 72 huart->TxXferCount = 0;
<> 149:156823d33999 73 huart->TxXferSize = 0;
<> 149:156823d33999 74 huart->RxXferCount = 0;
<> 149:156823d33999 75 huart->RxXferSize = 0;
<> 149:156823d33999 76
<> 149:156823d33999 77 if (obj_s->pin_rx == NC) {
<> 149:156823d33999 78 huart->Init.Mode = UART_MODE_TX;
<> 149:156823d33999 79 } else if (obj_s->pin_tx == NC) {
<> 149:156823d33999 80 huart->Init.Mode = UART_MODE_RX;
<> 149:156823d33999 81 } else {
<> 149:156823d33999 82 huart->Init.Mode = UART_MODE_TX_RX;
<> 149:156823d33999 83 }
<> 149:156823d33999 84
<> 149:156823d33999 85 if (HAL_UART_Init(huart) != HAL_OK) {
<> 149:156823d33999 86 error("Cannot initialize UART\n");
<> 149:156823d33999 87 }
<> 149:156823d33999 88 }
<> 149:156823d33999 89
<> 149:156823d33999 90 void serial_init(serial_t *obj, PinName tx, PinName rx)
<> 149:156823d33999 91 {
<> 149:156823d33999 92 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 93
<> 149:156823d33999 94 // Determine the UART to use (UART_1, UART_2, ...)
<> 149:156823d33999 95 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
<> 149:156823d33999 96 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
<> 149:156823d33999 97
<> 149:156823d33999 98 // Get the peripheral name (UART_1, UART_2, ...) from the pin and assign it to the object
<> 149:156823d33999 99 obj_s->uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
<> 149:156823d33999 100 MBED_ASSERT(obj_s->uart != (UARTName)NC);
<> 149:156823d33999 101
<> 149:156823d33999 102 // Enable USART clock
<> 149:156823d33999 103 switch (obj_s->uart) {
<> 149:156823d33999 104 case UART_1:
<> 149:156823d33999 105 __HAL_RCC_USART1_FORCE_RESET();
<> 149:156823d33999 106 __HAL_RCC_USART1_RELEASE_RESET();
<> 149:156823d33999 107 __HAL_RCC_USART1_CLK_ENABLE();
<> 149:156823d33999 108 obj_s->index = 0;
<> 149:156823d33999 109 break;
<> 149:156823d33999 110
<> 149:156823d33999 111 case UART_2:
<> 149:156823d33999 112 __HAL_RCC_USART2_FORCE_RESET();
<> 149:156823d33999 113 __HAL_RCC_USART2_RELEASE_RESET();
<> 149:156823d33999 114 __HAL_RCC_USART2_CLK_ENABLE();
<> 149:156823d33999 115 obj_s->index = 1;
<> 149:156823d33999 116 break;
<> 149:156823d33999 117
<> 149:156823d33999 118 #if defined(USART3_BASE)
<> 149:156823d33999 119 case UART_3:
<> 149:156823d33999 120 __HAL_RCC_USART3_FORCE_RESET();
<> 149:156823d33999 121 __HAL_RCC_USART3_RELEASE_RESET();
<> 149:156823d33999 122 __HAL_RCC_USART3_CLK_ENABLE();
<> 149:156823d33999 123 obj_s->index = 2;
<> 149:156823d33999 124 break;
<> 149:156823d33999 125 #endif
<> 149:156823d33999 126 #if defined(UART4_BASE)
<> 149:156823d33999 127 case UART_4:
<> 149:156823d33999 128 __HAL_RCC_UART4_FORCE_RESET();
<> 149:156823d33999 129 __HAL_RCC_UART4_RELEASE_RESET();
<> 149:156823d33999 130 __HAL_RCC_UART4_CLK_ENABLE();
<> 149:156823d33999 131 obj_s->index = 3;
<> 149:156823d33999 132 break;
<> 149:156823d33999 133 #endif
<> 149:156823d33999 134 #if defined(UART5_BASE)
<> 149:156823d33999 135 case UART_5:
<> 149:156823d33999 136 __HAL_RCC_UART5_FORCE_RESET();
<> 149:156823d33999 137 __HAL_RCC_UART5_RELEASE_RESET();
<> 149:156823d33999 138 __HAL_RCC_UART5_CLK_ENABLE();
<> 149:156823d33999 139 obj_s->index = 4;
<> 149:156823d33999 140 break;
<> 149:156823d33999 141 #endif
<> 149:156823d33999 142 #if defined(USART6_BASE)
<> 149:156823d33999 143 case UART_6:
<> 149:156823d33999 144 __HAL_RCC_USART6_FORCE_RESET();
<> 149:156823d33999 145 __HAL_RCC_USART6_RELEASE_RESET();
<> 149:156823d33999 146 __HAL_RCC_USART6_CLK_ENABLE();
<> 149:156823d33999 147 obj_s->index = 5;
<> 149:156823d33999 148 break;
<> 149:156823d33999 149 #endif
<> 149:156823d33999 150 #if defined(UART7_BASE)
<> 149:156823d33999 151 case UART_7:
<> 149:156823d33999 152 __HAL_RCC_UART7_FORCE_RESET();
<> 149:156823d33999 153 __HAL_RCC_UART7_RELEASE_RESET();
<> 149:156823d33999 154 __HAL_RCC_UART7_CLK_ENABLE();
<> 149:156823d33999 155 obj_s->index = 6;
<> 149:156823d33999 156 break;
<> 149:156823d33999 157 #endif
<> 149:156823d33999 158 #if defined(UART8_BASE)
<> 149:156823d33999 159 case UART_8:
<> 149:156823d33999 160 __HAL_RCC_UART8_FORCE_RESET();
<> 149:156823d33999 161 __HAL_RCC_UART8_RELEASE_RESET();
<> 149:156823d33999 162 __HAL_RCC_UART8_CLK_ENABLE();
<> 149:156823d33999 163 obj_s->index = 7;
<> 149:156823d33999 164 break;
<> 149:156823d33999 165 #endif
<> 149:156823d33999 166 }
<> 149:156823d33999 167
<> 149:156823d33999 168 // Configure the UART pins
<> 149:156823d33999 169 pinmap_pinout(tx, PinMap_UART_TX);
<> 149:156823d33999 170 pinmap_pinout(rx, PinMap_UART_RX);
<> 149:156823d33999 171
<> 149:156823d33999 172 if (tx != NC) {
<> 149:156823d33999 173 pin_mode(tx, PullUp);
<> 149:156823d33999 174 }
<> 149:156823d33999 175 if (rx != NC) {
<> 149:156823d33999 176 pin_mode(rx, PullUp);
<> 149:156823d33999 177 }
<> 149:156823d33999 178
<> 149:156823d33999 179 // Configure UART
<> 149:156823d33999 180 obj_s->baudrate = 9600;
<> 149:156823d33999 181 obj_s->databits = UART_WORDLENGTH_8B;
<> 149:156823d33999 182 obj_s->stopbits = UART_STOPBITS_1;
<> 149:156823d33999 183 obj_s->parity = UART_PARITY_NONE;
<> 149:156823d33999 184
<> 149:156823d33999 185 #if DEVICE_SERIAL_FC
<> 149:156823d33999 186 obj_s->hw_flow_ctl = UART_HWCONTROL_NONE;
<> 149:156823d33999 187 #endif
<> 149:156823d33999 188
<> 149:156823d33999 189 obj_s->pin_tx = tx;
<> 149:156823d33999 190 obj_s->pin_rx = rx;
<> 149:156823d33999 191
<> 149:156823d33999 192 init_uart(obj);
<> 149:156823d33999 193
<> 149:156823d33999 194 // For stdio management
<> 149:156823d33999 195 if (obj_s->uart == STDIO_UART) {
<> 149:156823d33999 196 stdio_uart_inited = 1;
<> 149:156823d33999 197 memcpy(&stdio_uart, obj, sizeof(serial_t));
<> 149:156823d33999 198 }
<> 149:156823d33999 199 }
<> 149:156823d33999 200
<> 149:156823d33999 201 void serial_free(serial_t *obj)
<> 149:156823d33999 202 {
<> 149:156823d33999 203 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 204
<> 149:156823d33999 205 // Reset UART and disable clock
<> 149:156823d33999 206 switch (obj_s->index) {
<> 149:156823d33999 207 case 0:
<> 149:156823d33999 208 __USART1_FORCE_RESET();
<> 149:156823d33999 209 __USART1_RELEASE_RESET();
<> 149:156823d33999 210 __USART1_CLK_DISABLE();
<> 149:156823d33999 211 break;
<> 149:156823d33999 212
<> 149:156823d33999 213 case 1:
<> 149:156823d33999 214 __USART2_FORCE_RESET();
<> 149:156823d33999 215 __USART2_RELEASE_RESET();
<> 149:156823d33999 216 __USART2_CLK_DISABLE();
<> 149:156823d33999 217 break;
<> 149:156823d33999 218
<> 149:156823d33999 219 #if defined(USART3_BASE)
<> 149:156823d33999 220 case 2:
<> 149:156823d33999 221 __USART3_FORCE_RESET();
<> 149:156823d33999 222 __USART3_RELEASE_RESET();
<> 149:156823d33999 223 __USART3_CLK_DISABLE();
<> 149:156823d33999 224 break;
<> 149:156823d33999 225 #endif
<> 149:156823d33999 226 #if defined(UART4_BASE)
<> 149:156823d33999 227 case 3:
<> 149:156823d33999 228 __UART4_FORCE_RESET();
<> 149:156823d33999 229 __UART4_RELEASE_RESET();
<> 149:156823d33999 230 __UART4_CLK_DISABLE();
<> 149:156823d33999 231 break;
<> 149:156823d33999 232 #endif
<> 149:156823d33999 233 #if defined(UART5_BASE)
<> 149:156823d33999 234 case 4:
<> 149:156823d33999 235 __UART5_FORCE_RESET();
<> 149:156823d33999 236 __UART5_RELEASE_RESET();
<> 149:156823d33999 237 __UART5_CLK_DISABLE();
<> 149:156823d33999 238 break;
<> 149:156823d33999 239 #endif
<> 149:156823d33999 240 #if defined(USART6_BASE)
<> 149:156823d33999 241 case 5:
<> 149:156823d33999 242 __USART6_FORCE_RESET();
<> 149:156823d33999 243 __USART6_RELEASE_RESET();
<> 149:156823d33999 244 __USART6_CLK_DISABLE();
<> 149:156823d33999 245 break;
<> 149:156823d33999 246 #endif
<> 149:156823d33999 247 #if defined(UART7_BASE)
<> 149:156823d33999 248 case 6:
<> 149:156823d33999 249 __UART7_FORCE_RESET();
<> 149:156823d33999 250 __UART7_RELEASE_RESET();
<> 149:156823d33999 251 __UART7_CLK_DISABLE();
<> 149:156823d33999 252 break;
<> 149:156823d33999 253 #endif
<> 149:156823d33999 254 #if defined(UART8_BASE)
<> 149:156823d33999 255 case 7:
<> 149:156823d33999 256 __UART8_FORCE_RESET();
<> 149:156823d33999 257 __UART8_RELEASE_RESET();
<> 149:156823d33999 258 __UART8_CLK_DISABLE();
<> 149:156823d33999 259 break;
<> 149:156823d33999 260 #endif
<> 149:156823d33999 261 }
<> 149:156823d33999 262
<> 149:156823d33999 263 // Configure GPIOs
<> 149:156823d33999 264 pin_function(obj_s->pin_tx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
<> 149:156823d33999 265 pin_function(obj_s->pin_rx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
<> 149:156823d33999 266
<> 149:156823d33999 267 serial_irq_ids[obj_s->index] = 0;
<> 149:156823d33999 268 }
<> 149:156823d33999 269
<> 149:156823d33999 270 void serial_baud(serial_t *obj, int baudrate)
<> 149:156823d33999 271 {
<> 149:156823d33999 272 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 273
<> 149:156823d33999 274 obj_s->baudrate = baudrate;
<> 149:156823d33999 275 init_uart(obj);
<> 149:156823d33999 276 }
<> 149:156823d33999 277
<> 149:156823d33999 278 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
<> 149:156823d33999 279 {
<> 149:156823d33999 280 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 281
<> 149:156823d33999 282 if (data_bits == 9) {
<> 149:156823d33999 283 obj_s->databits = UART_WORDLENGTH_9B;
<> 149:156823d33999 284 } else {
<> 149:156823d33999 285 obj_s->databits = UART_WORDLENGTH_8B;
<> 149:156823d33999 286 }
<> 149:156823d33999 287
<> 149:156823d33999 288 switch (parity) {
<> 149:156823d33999 289 case ParityOdd:
<> 149:156823d33999 290 obj_s->parity = UART_PARITY_ODD;
<> 149:156823d33999 291 break;
<> 149:156823d33999 292 case ParityEven:
<> 149:156823d33999 293 obj_s->parity = UART_PARITY_EVEN;
<> 149:156823d33999 294 break;
<> 149:156823d33999 295 default: // ParityNone
<> 149:156823d33999 296 case ParityForced0: // unsupported!
<> 149:156823d33999 297 case ParityForced1: // unsupported!
<> 149:156823d33999 298 obj_s->parity = UART_PARITY_NONE;
<> 149:156823d33999 299 break;
<> 149:156823d33999 300 }
<> 149:156823d33999 301
<> 149:156823d33999 302 if (stop_bits == 2) {
<> 149:156823d33999 303 obj_s->stopbits = UART_STOPBITS_2;
<> 149:156823d33999 304 } else {
<> 149:156823d33999 305 obj_s->stopbits = UART_STOPBITS_1;
<> 149:156823d33999 306 }
<> 149:156823d33999 307
<> 149:156823d33999 308 init_uart(obj);
<> 149:156823d33999 309 }
<> 149:156823d33999 310
<> 149:156823d33999 311 /******************************************************************************
<> 149:156823d33999 312 * INTERRUPTS HANDLING
<> 149:156823d33999 313 ******************************************************************************/
<> 149:156823d33999 314
<> 149:156823d33999 315 static void uart_irq(int id)
<> 149:156823d33999 316 {
<> 149:156823d33999 317 UART_HandleTypeDef * huart = &uart_handlers[id];
<> 149:156823d33999 318
<> 149:156823d33999 319 if (serial_irq_ids[id] != 0) {
<> 149:156823d33999 320 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) {
<> 149:156823d33999 321 if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC) != RESET) {
<> 149:156823d33999 322 irq_handler(serial_irq_ids[id], TxIrq);
<> 149:156823d33999 323 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
<> 149:156823d33999 324 }
<> 149:156823d33999 325 }
<> 149:156823d33999 326 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE) != RESET) {
<> 149:156823d33999 327 if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_RXNE) != RESET) {
<> 149:156823d33999 328 irq_handler(serial_irq_ids[id], RxIrq);
<> 149:156823d33999 329 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_RXNE);
<> 149:156823d33999 330 }
<> 149:156823d33999 331 }
<> 149:156823d33999 332 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) {
<> 149:156823d33999 333 if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) {
<> 149:156823d33999 334 volatile uint32_t tmpval = huart->Instance->DR; // Clear ORE flag
<> 149:156823d33999 335 }
<> 149:156823d33999 336 }
<> 149:156823d33999 337 }
<> 149:156823d33999 338 }
<> 149:156823d33999 339
<> 149:156823d33999 340 static void uart1_irq(void)
<> 149:156823d33999 341 {
<> 149:156823d33999 342 uart_irq(0);
<> 149:156823d33999 343 }
<> 149:156823d33999 344
<> 149:156823d33999 345 static void uart2_irq(void)
<> 149:156823d33999 346 {
<> 149:156823d33999 347 uart_irq(1);
<> 149:156823d33999 348 }
<> 149:156823d33999 349
<> 149:156823d33999 350 #if defined(USART3_BASE)
<> 149:156823d33999 351 static void uart3_irq(void)
<> 149:156823d33999 352 {
<> 149:156823d33999 353 uart_irq(2);
<> 149:156823d33999 354 }
<> 149:156823d33999 355 #endif
<> 149:156823d33999 356
<> 149:156823d33999 357 #if defined(UART4_BASE)
<> 149:156823d33999 358 static void uart4_irq(void)
<> 149:156823d33999 359 {
<> 149:156823d33999 360 uart_irq(3);
<> 149:156823d33999 361 }
<> 149:156823d33999 362 #endif
<> 149:156823d33999 363
<> 149:156823d33999 364 #if defined(UART5_BASE)
<> 149:156823d33999 365 static void uart5_irq(void)
<> 149:156823d33999 366 {
<> 149:156823d33999 367 uart_irq(4);
<> 149:156823d33999 368 }
<> 149:156823d33999 369 #endif
<> 149:156823d33999 370
<> 149:156823d33999 371 #if defined(USART6_BASE)
<> 149:156823d33999 372 static void uart6_irq(void)
<> 149:156823d33999 373 {
<> 149:156823d33999 374 uart_irq(5);
<> 149:156823d33999 375 }
<> 149:156823d33999 376 #endif
<> 149:156823d33999 377
<> 149:156823d33999 378 #if defined(UART7_BASE)
<> 149:156823d33999 379 static void uart7_irq(void)
<> 149:156823d33999 380 {
<> 149:156823d33999 381 uart_irq(6);
<> 149:156823d33999 382 }
<> 149:156823d33999 383 #endif
<> 149:156823d33999 384
<> 149:156823d33999 385 #if defined(UART8_BASE)
<> 149:156823d33999 386 static void uart8_irq(void)
<> 149:156823d33999 387 {
<> 149:156823d33999 388 uart_irq(7);
<> 149:156823d33999 389 }
<> 149:156823d33999 390 #endif
<> 149:156823d33999 391
<> 149:156823d33999 392 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
<> 149:156823d33999 393 {
<> 149:156823d33999 394 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 395
<> 149:156823d33999 396 irq_handler = handler;
<> 149:156823d33999 397 serial_irq_ids[obj_s->index] = id;
<> 149:156823d33999 398 }
<> 149:156823d33999 399
<> 149:156823d33999 400 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
<> 149:156823d33999 401 {
<> 149:156823d33999 402 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 403 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 404 IRQn_Type irq_n = (IRQn_Type)0;
<> 149:156823d33999 405 uint32_t vector = 0;
<> 149:156823d33999 406
<> 149:156823d33999 407 switch (obj_s->index) {
<> 149:156823d33999 408 case 0:
<> 149:156823d33999 409 irq_n = USART1_IRQn;
<> 149:156823d33999 410 vector = (uint32_t)&uart1_irq;
<> 149:156823d33999 411 break;
<> 149:156823d33999 412
<> 149:156823d33999 413 case 1:
<> 149:156823d33999 414 irq_n = USART2_IRQn;
<> 149:156823d33999 415 vector = (uint32_t)&uart2_irq;
<> 149:156823d33999 416 break;
<> 149:156823d33999 417 #if defined(USART3_BASE)
<> 149:156823d33999 418 case 2:
<> 149:156823d33999 419 irq_n = USART3_IRQn;
<> 149:156823d33999 420 vector = (uint32_t)&uart3_irq;
<> 149:156823d33999 421 break;
<> 149:156823d33999 422 #endif
<> 149:156823d33999 423 #if defined(UART4_BASE)
<> 149:156823d33999 424 case 3:
<> 149:156823d33999 425 irq_n = UART4_IRQn;
<> 149:156823d33999 426 vector = (uint32_t)&uart4_irq;
<> 149:156823d33999 427 break;
<> 149:156823d33999 428 #endif
<> 149:156823d33999 429 #if defined(UART5_BASE)
<> 149:156823d33999 430 case 4:
<> 149:156823d33999 431 irq_n = UART5_IRQn;
<> 149:156823d33999 432 vector = (uint32_t)&uart5_irq;
<> 149:156823d33999 433 break;
<> 149:156823d33999 434 #endif
<> 149:156823d33999 435 #if defined(USART6_BASE)
<> 149:156823d33999 436 case 5:
<> 149:156823d33999 437 irq_n = USART6_IRQn;
<> 149:156823d33999 438 vector = (uint32_t)&uart6_irq;
<> 149:156823d33999 439 break;
<> 149:156823d33999 440 #endif
<> 149:156823d33999 441 #if defined(UART7_BASE)
<> 149:156823d33999 442 case 6:
<> 149:156823d33999 443 irq_n = UART7_IRQn;
<> 149:156823d33999 444 vector = (uint32_t)&uart7_irq;
<> 149:156823d33999 445 break;
<> 149:156823d33999 446 #endif
<> 149:156823d33999 447 #if defined(UART8_BASE)
<> 149:156823d33999 448 case 7:
<> 149:156823d33999 449 irq_n = UART8_IRQn;
<> 149:156823d33999 450 vector = (uint32_t)&uart8_irq;
<> 149:156823d33999 451 break;
<> 149:156823d33999 452 #endif
<> 149:156823d33999 453 }
<> 149:156823d33999 454
<> 149:156823d33999 455 if (enable) {
<> 149:156823d33999 456 if (irq == RxIrq) {
<> 149:156823d33999 457 __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
<> 149:156823d33999 458 } else { // TxIrq
<> 149:156823d33999 459 __HAL_UART_ENABLE_IT(huart, UART_IT_TC);
<> 149:156823d33999 460 }
<> 149:156823d33999 461 NVIC_SetVector(irq_n, vector);
<> 149:156823d33999 462 NVIC_EnableIRQ(irq_n);
<> 149:156823d33999 463
<> 149:156823d33999 464 } else { // disable
<> 149:156823d33999 465 int all_disabled = 0;
<> 149:156823d33999 466 if (irq == RxIrq) {
<> 149:156823d33999 467 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
<> 149:156823d33999 468 // Check if TxIrq is disabled too
<> 149:156823d33999 469 if ((huart->Instance->CR1 & USART_CR1_TXEIE) == 0) {
<> 149:156823d33999 470 all_disabled = 1;
<> 149:156823d33999 471 }
<> 149:156823d33999 472 } else { // TxIrq
<> 149:156823d33999 473 __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
<> 149:156823d33999 474 // Check if RxIrq is disabled too
<> 149:156823d33999 475 if ((huart->Instance->CR1 & USART_CR1_RXNEIE) == 0) {
<> 149:156823d33999 476 all_disabled = 1;
<> 149:156823d33999 477 }
<> 149:156823d33999 478 }
<> 149:156823d33999 479
<> 149:156823d33999 480 if (all_disabled) {
<> 149:156823d33999 481 NVIC_DisableIRQ(irq_n);
<> 149:156823d33999 482 }
<> 149:156823d33999 483 }
<> 149:156823d33999 484 }
<> 149:156823d33999 485
<> 149:156823d33999 486 /******************************************************************************
<> 149:156823d33999 487 * READ/WRITE
<> 149:156823d33999 488 ******************************************************************************/
<> 149:156823d33999 489
<> 149:156823d33999 490 int serial_getc(serial_t *obj)
<> 149:156823d33999 491 {
<> 149:156823d33999 492 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 493 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 494
<> 149:156823d33999 495 while (!serial_readable(obj));
<> 149:156823d33999 496 return (int)(huart->Instance->DR & (uint16_t)0x1FF);
<> 149:156823d33999 497 }
<> 149:156823d33999 498
<> 149:156823d33999 499 void serial_putc(serial_t *obj, int c)
<> 149:156823d33999 500 {
<> 149:156823d33999 501 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 502 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 503
<> 149:156823d33999 504 while (!serial_writable(obj));
<> 149:156823d33999 505 huart->Instance->DR = (uint32_t)(c & (uint16_t)0x1FF);
<> 149:156823d33999 506 }
<> 149:156823d33999 507
<> 149:156823d33999 508 int serial_readable(serial_t *obj)
<> 149:156823d33999 509 {
<> 149:156823d33999 510 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 511 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 512
<> 149:156823d33999 513 // Check if data is received
<> 149:156823d33999 514 return (__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE) != RESET) ? 1 : 0;
<> 149:156823d33999 515 }
<> 149:156823d33999 516
<> 149:156823d33999 517 int serial_writable(serial_t *obj)
<> 149:156823d33999 518 {
<> 149:156823d33999 519 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 520 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 521
<> 149:156823d33999 522 // Check if data is transmitted
<> 149:156823d33999 523 return (__HAL_UART_GET_FLAG(huart, UART_FLAG_TXE) != RESET) ? 1 : 0;
<> 149:156823d33999 524 }
<> 149:156823d33999 525
<> 149:156823d33999 526 void serial_clear(serial_t *obj)
<> 149:156823d33999 527 {
<> 149:156823d33999 528 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 529 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 530
<> 149:156823d33999 531 huart->TxXferCount = 0;
<> 149:156823d33999 532 huart->RxXferCount = 0;
<> 149:156823d33999 533 }
<> 149:156823d33999 534
<> 149:156823d33999 535 void serial_pinout_tx(PinName tx)
<> 149:156823d33999 536 {
<> 149:156823d33999 537 pinmap_pinout(tx, PinMap_UART_TX);
<> 149:156823d33999 538 }
<> 149:156823d33999 539
<> 149:156823d33999 540 void serial_break_set(serial_t *obj)
<> 149:156823d33999 541 {
<> 149:156823d33999 542 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 543 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 544
<> 149:156823d33999 545 HAL_LIN_SendBreak(huart);
<> 149:156823d33999 546 }
<> 149:156823d33999 547
<> 149:156823d33999 548 void serial_break_clear(serial_t *obj)
<> 149:156823d33999 549 {
<> 149:156823d33999 550 (void)obj;
<> 149:156823d33999 551 }
<> 149:156823d33999 552
<> 149:156823d33999 553 #if DEVICE_SERIAL_ASYNCH
<> 149:156823d33999 554
<> 149:156823d33999 555 /******************************************************************************
<> 149:156823d33999 556 * LOCAL HELPER FUNCTIONS
<> 149:156823d33999 557 ******************************************************************************/
<> 149:156823d33999 558
<> 149:156823d33999 559 /**
<> 149:156823d33999 560 * Configure the TX buffer for an asynchronous write serial transaction
<> 149:156823d33999 561 *
<> 149:156823d33999 562 * @param obj The serial object.
<> 149:156823d33999 563 * @param tx The buffer for sending.
<> 149:156823d33999 564 * @param tx_length The number of words to transmit.
<> 149:156823d33999 565 */
<> 149:156823d33999 566 static void serial_tx_buffer_set(serial_t *obj, void *tx, int tx_length, uint8_t width)
<> 149:156823d33999 567 {
<> 149:156823d33999 568 (void)width;
<> 149:156823d33999 569
<> 149:156823d33999 570 // Exit if a transmit is already on-going
<> 149:156823d33999 571 if (serial_tx_active(obj)) {
<> 149:156823d33999 572 return;
<> 149:156823d33999 573 }
<> 149:156823d33999 574
<> 149:156823d33999 575 obj->tx_buff.buffer = tx;
<> 149:156823d33999 576 obj->tx_buff.length = tx_length;
<> 149:156823d33999 577 obj->tx_buff.pos = 0;
<> 149:156823d33999 578 }
<> 149:156823d33999 579
<> 149:156823d33999 580 /**
<> 149:156823d33999 581 * Configure the RX buffer for an asynchronous write serial transaction
<> 149:156823d33999 582 *
<> 149:156823d33999 583 * @param obj The serial object.
<> 149:156823d33999 584 * @param tx The buffer for sending.
<> 149:156823d33999 585 * @param tx_length The number of words to transmit.
<> 149:156823d33999 586 */
<> 149:156823d33999 587 static void serial_rx_buffer_set(serial_t *obj, void *rx, int rx_length, uint8_t width)
<> 149:156823d33999 588 {
<> 149:156823d33999 589 (void)width;
<> 149:156823d33999 590
<> 149:156823d33999 591 // Exit if a reception is already on-going
<> 149:156823d33999 592 if (serial_rx_active(obj)) {
<> 149:156823d33999 593 return;
<> 149:156823d33999 594 }
<> 149:156823d33999 595
<> 149:156823d33999 596 obj->rx_buff.buffer = rx;
<> 149:156823d33999 597 obj->rx_buff.length = rx_length;
<> 149:156823d33999 598 obj->rx_buff.pos = 0;
<> 149:156823d33999 599 }
<> 149:156823d33999 600
<> 149:156823d33999 601 /**
<> 149:156823d33999 602 * Configure events
<> 149:156823d33999 603 *
<> 149:156823d33999 604 * @param obj The serial object
<> 149:156823d33999 605 * @param event The logical OR of the events to configure
<> 149:156823d33999 606 * @param enable Set to non-zero to enable events, or zero to disable them
<> 149:156823d33999 607 */
<> 149:156823d33999 608 static void serial_enable_event(serial_t *obj, int event, uint8_t enable)
<> 149:156823d33999 609 {
<> 149:156823d33999 610 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 611
<> 149:156823d33999 612 // Shouldn't have to enable interrupt here, just need to keep track of the requested events.
<> 149:156823d33999 613 if (enable) {
<> 149:156823d33999 614 obj_s->events |= event;
<> 149:156823d33999 615 } else {
<> 149:156823d33999 616 obj_s->events &= ~event;
<> 149:156823d33999 617 }
<> 149:156823d33999 618 }
<> 149:156823d33999 619
<> 149:156823d33999 620
<> 149:156823d33999 621 /**
<> 149:156823d33999 622 * Get index of serial object TX IRQ, relating it to the physical peripheral.
<> 149:156823d33999 623 *
<> 149:156823d33999 624 * @param obj pointer to serial object
<> 149:156823d33999 625 * @return internal NVIC TX IRQ index of U(S)ART peripheral
<> 149:156823d33999 626 */
<> 149:156823d33999 627 static IRQn_Type serial_get_irq_n(serial_t *obj)
<> 149:156823d33999 628 {
<> 149:156823d33999 629 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 630 IRQn_Type irq_n;
<> 149:156823d33999 631
<> 149:156823d33999 632 switch (obj_s->index) {
<> 149:156823d33999 633 #if defined(USART1_BASE)
<> 149:156823d33999 634 case 0:
<> 149:156823d33999 635 irq_n = USART1_IRQn;
<> 149:156823d33999 636 break;
<> 149:156823d33999 637 #endif
<> 149:156823d33999 638 #if defined(USART2_BASE)
<> 149:156823d33999 639 case 1:
<> 149:156823d33999 640 irq_n = USART2_IRQn;
<> 149:156823d33999 641 break;
<> 149:156823d33999 642 #endif
<> 149:156823d33999 643 #if defined(USART3_BASE)
<> 149:156823d33999 644 case 2:
<> 149:156823d33999 645 irq_n = USART3_IRQn;
<> 149:156823d33999 646 break;
<> 149:156823d33999 647 #endif
<> 149:156823d33999 648 #if defined(UART4_BASE)
<> 149:156823d33999 649 case 3:
<> 149:156823d33999 650 irq_n = UART4_IRQn;
<> 149:156823d33999 651 break;
<> 149:156823d33999 652 #endif
<> 149:156823d33999 653 #if defined(UART5_BASE)
<> 149:156823d33999 654 case 4:
<> 149:156823d33999 655 irq_n = UART5_IRQn;
<> 149:156823d33999 656 break;
<> 149:156823d33999 657 #endif
<> 149:156823d33999 658 #if defined(USART6_BASE)
<> 149:156823d33999 659 case 5:
<> 149:156823d33999 660 irq_n = USART6_IRQn;
<> 149:156823d33999 661 break;
<> 149:156823d33999 662 #endif
<> 149:156823d33999 663 #if defined(UART7_BASE)
<> 149:156823d33999 664 case 6:
<> 149:156823d33999 665 irq_n = UART7_IRQn;
<> 149:156823d33999 666 break;
<> 149:156823d33999 667 #endif
<> 149:156823d33999 668 #if defined(UART8_BASE)
<> 149:156823d33999 669 case 7:
<> 149:156823d33999 670 irq_n = UART8_IRQn;
<> 149:156823d33999 671 break;
<> 149:156823d33999 672 #endif
<> 149:156823d33999 673 default:
<> 149:156823d33999 674 irq_n = (IRQn_Type)0;
<> 149:156823d33999 675 }
<> 149:156823d33999 676
<> 149:156823d33999 677 return irq_n;
<> 149:156823d33999 678 }
<> 149:156823d33999 679
<> 149:156823d33999 680
<> 149:156823d33999 681 /******************************************************************************
<> 149:156823d33999 682 * MBED API FUNCTIONS
<> 149:156823d33999 683 ******************************************************************************/
<> 149:156823d33999 684
<> 149:156823d33999 685 /**
<> 149:156823d33999 686 * Begin asynchronous TX transfer. The used buffer is specified in the serial
<> 149:156823d33999 687 * object, tx_buff
<> 149:156823d33999 688 *
<> 149:156823d33999 689 * @param obj The serial object
<> 149:156823d33999 690 * @param tx The buffer for sending
<> 149:156823d33999 691 * @param tx_length The number of words to transmit
<> 149:156823d33999 692 * @param tx_width The bit width of buffer word
<> 149:156823d33999 693 * @param handler The serial handler
<> 149:156823d33999 694 * @param event The logical OR of events to be registered
<> 149:156823d33999 695 * @param hint A suggestion for how to use DMA with this transfer
<> 149:156823d33999 696 * @return Returns number of data transfered, or 0 otherwise
<> 149:156823d33999 697 */
<> 149:156823d33999 698 int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx_width, uint32_t handler, uint32_t event, DMAUsage hint)
<> 149:156823d33999 699 {
<> 149:156823d33999 700 // TODO: DMA usage is currently ignored
<> 149:156823d33999 701 (void) hint;
<> 149:156823d33999 702
<> 149:156823d33999 703 // Check buffer is ok
<> 149:156823d33999 704 MBED_ASSERT(tx != (void*)0);
<> 149:156823d33999 705 MBED_ASSERT(tx_width == 8); // support only 8b width
<> 149:156823d33999 706
<> 149:156823d33999 707 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 708 UART_HandleTypeDef * huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 709
<> 149:156823d33999 710 if (tx_length == 0) {
<> 149:156823d33999 711 return 0;
<> 149:156823d33999 712 }
<> 149:156823d33999 713
<> 149:156823d33999 714 // Set up buffer
<> 149:156823d33999 715 serial_tx_buffer_set(obj, (void *)tx, tx_length, tx_width);
<> 149:156823d33999 716
<> 149:156823d33999 717 // Set up events
<> 149:156823d33999 718 serial_enable_event(obj, SERIAL_EVENT_TX_ALL, 0); // Clear all events
<> 149:156823d33999 719 serial_enable_event(obj, event, 1); // Set only the wanted events
<> 149:156823d33999 720
<> 149:156823d33999 721 // Enable interrupt
<> 149:156823d33999 722 IRQn_Type irq_n = serial_get_irq_n(obj);
<> 149:156823d33999 723 NVIC_ClearPendingIRQ(irq_n);
<> 149:156823d33999 724 NVIC_DisableIRQ(irq_n);
<> 149:156823d33999 725 NVIC_SetPriority(irq_n, 1);
<> 149:156823d33999 726 NVIC_SetVector(irq_n, (uint32_t)handler);
<> 149:156823d33999 727 NVIC_EnableIRQ(irq_n);
<> 149:156823d33999 728
<> 149:156823d33999 729 // the following function will enable UART_IT_TXE and error interrupts
<> 149:156823d33999 730 if (HAL_UART_Transmit_IT(huart, (uint8_t*)tx, tx_length) != HAL_OK) {
<> 149:156823d33999 731 return 0;
<> 149:156823d33999 732 }
<> 149:156823d33999 733
<> 149:156823d33999 734 return tx_length;
<> 149:156823d33999 735 }
<> 149:156823d33999 736
<> 149:156823d33999 737 /**
<> 149:156823d33999 738 * Begin asynchronous RX transfer (enable interrupt for data collecting)
<> 149:156823d33999 739 * The used buffer is specified in the serial object, rx_buff
<> 149:156823d33999 740 *
<> 149:156823d33999 741 * @param obj The serial object
<> 149:156823d33999 742 * @param rx The buffer for sending
<> 149:156823d33999 743 * @param rx_length The number of words to transmit
<> 149:156823d33999 744 * @param rx_width The bit width of buffer word
<> 149:156823d33999 745 * @param handler The serial handler
<> 149:156823d33999 746 * @param event The logical OR of events to be registered
<> 149:156823d33999 747 * @param handler The serial handler
<> 149:156823d33999 748 * @param char_match A character in range 0-254 to be matched
<> 149:156823d33999 749 * @param hint A suggestion for how to use DMA with this transfer
<> 149:156823d33999 750 */
<> 149:156823d33999 751 void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_width, uint32_t handler, uint32_t event, uint8_t char_match, DMAUsage hint)
<> 149:156823d33999 752 {
<> 149:156823d33999 753 // TODO: DMA usage is currently ignored
<> 149:156823d33999 754 (void) hint;
<> 149:156823d33999 755
<> 149:156823d33999 756 /* Sanity check arguments */
<> 149:156823d33999 757 MBED_ASSERT(obj);
<> 149:156823d33999 758 MBED_ASSERT(rx != (void*)0);
<> 149:156823d33999 759 MBED_ASSERT(rx_width == 8); // support only 8b width
<> 149:156823d33999 760
<> 149:156823d33999 761 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 762 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 763
<> 149:156823d33999 764 serial_enable_event(obj, SERIAL_EVENT_RX_ALL, 0);
<> 149:156823d33999 765 serial_enable_event(obj, event, 1);
<> 149:156823d33999 766
<> 149:156823d33999 767 // set CharMatch
<> 149:156823d33999 768 obj->char_match = char_match;
<> 149:156823d33999 769
<> 149:156823d33999 770 serial_rx_buffer_set(obj, rx, rx_length, rx_width);
<> 149:156823d33999 771
<> 149:156823d33999 772 IRQn_Type irq_n = serial_get_irq_n(obj);
<> 149:156823d33999 773 NVIC_ClearPendingIRQ(irq_n);
<> 149:156823d33999 774 NVIC_DisableIRQ(irq_n);
<> 149:156823d33999 775 NVIC_SetPriority(irq_n, 0);
<> 149:156823d33999 776 NVIC_SetVector(irq_n, (uint32_t)handler);
<> 149:156823d33999 777 NVIC_EnableIRQ(irq_n);
<> 149:156823d33999 778
<> 149:156823d33999 779 // following HAL function will enable the RXNE interrupt + error interrupts
<> 149:156823d33999 780 HAL_UART_Receive_IT(huart, (uint8_t*)rx, rx_length);
<> 149:156823d33999 781 }
<> 149:156823d33999 782
<> 149:156823d33999 783 /**
<> 149:156823d33999 784 * Attempts to determine if the serial peripheral is already in use for TX
<> 149:156823d33999 785 *
<> 149:156823d33999 786 * @param obj The serial object
<> 149:156823d33999 787 * @return Non-zero if the TX transaction is ongoing, 0 otherwise
<> 149:156823d33999 788 */
<> 149:156823d33999 789 uint8_t serial_tx_active(serial_t *obj)
<> 149:156823d33999 790 {
<> 149:156823d33999 791 MBED_ASSERT(obj);
<> 149:156823d33999 792
<> 149:156823d33999 793 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 794 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 795
<> 149:156823d33999 796 return ((HAL_UART_GetState(huart) == HAL_UART_STATE_BUSY_TX) ? 1 : 0);
<> 149:156823d33999 797 }
<> 149:156823d33999 798
<> 149:156823d33999 799 /**
<> 149:156823d33999 800 * Attempts to determine if the serial peripheral is already in use for RX
<> 149:156823d33999 801 *
<> 149:156823d33999 802 * @param obj The serial object
<> 149:156823d33999 803 * @return Non-zero if the RX transaction is ongoing, 0 otherwise
<> 149:156823d33999 804 */
<> 149:156823d33999 805 uint8_t serial_rx_active(serial_t *obj)
<> 149:156823d33999 806 {
<> 149:156823d33999 807 MBED_ASSERT(obj);
<> 149:156823d33999 808
<> 149:156823d33999 809 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 810 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 811
<> 149:156823d33999 812 return ((HAL_UART_GetState(huart) == HAL_UART_STATE_BUSY_RX) ? 1 : 0);
<> 149:156823d33999 813 }
<> 149:156823d33999 814
<> 149:156823d33999 815 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) {
<> 149:156823d33999 816 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) {
<> 149:156823d33999 817 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
<> 149:156823d33999 818 }
<> 149:156823d33999 819 }
<> 149:156823d33999 820
<> 149:156823d33999 821 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) {
<> 149:156823d33999 822 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_PE) != RESET) {
<> 149:156823d33999 823 volatile uint32_t tmpval = huart->Instance->DR; // Clear PE flag
<> 149:156823d33999 824 } else if (__HAL_UART_GET_FLAG(huart, UART_FLAG_FE) != RESET) {
<> 149:156823d33999 825 volatile uint32_t tmpval = huart->Instance->DR; // Clear FE flag
<> 149:156823d33999 826 } else if (__HAL_UART_GET_FLAG(huart, UART_FLAG_NE) != RESET) {
<> 149:156823d33999 827 volatile uint32_t tmpval = huart->Instance->DR; // Clear NE flag
<> 149:156823d33999 828 } else if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) {
<> 149:156823d33999 829 volatile uint32_t tmpval = huart->Instance->DR; // Clear ORE flag
<> 149:156823d33999 830 }
<> 149:156823d33999 831 }
<> 149:156823d33999 832
<> 149:156823d33999 833 /**
<> 149:156823d33999 834 * The asynchronous TX and RX handler.
<> 149:156823d33999 835 *
<> 149:156823d33999 836 * @param obj The serial object
<> 149:156823d33999 837 * @return Returns event flags if a TX/RX transfer termination condition was met or 0 otherwise
<> 149:156823d33999 838 */
<> 149:156823d33999 839 int serial_irq_handler_asynch(serial_t *obj)
<> 149:156823d33999 840 {
<> 149:156823d33999 841 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 842 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 843
<> 149:156823d33999 844 volatile int return_event = 0;
<> 149:156823d33999 845 uint8_t *buf = (uint8_t*)(obj->rx_buff.buffer);
<> 149:156823d33999 846 uint8_t i = 0;
<> 149:156823d33999 847
<> 149:156823d33999 848 // TX PART:
<> 149:156823d33999 849 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) {
<> 149:156823d33999 850 if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC) != RESET) {
<> 149:156823d33999 851 // Return event SERIAL_EVENT_TX_COMPLETE if requested
<> 149:156823d33999 852 if ((obj_s->events & SERIAL_EVENT_TX_COMPLETE ) != 0) {
<> 149:156823d33999 853 return_event |= (SERIAL_EVENT_TX_COMPLETE & obj_s->events);
<> 149:156823d33999 854 }
<> 149:156823d33999 855 }
<> 149:156823d33999 856 }
<> 149:156823d33999 857
<> 149:156823d33999 858 // Handle error events
<> 149:156823d33999 859 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_PE) != RESET) {
<> 149:156823d33999 860 if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) {
<> 149:156823d33999 861 return_event |= (SERIAL_EVENT_RX_PARITY_ERROR & obj_s->events);
<> 149:156823d33999 862 }
<> 149:156823d33999 863 }
<> 149:156823d33999 864
<> 149:156823d33999 865 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_FE) != RESET) {
<> 149:156823d33999 866 if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) {
<> 149:156823d33999 867 return_event |= (SERIAL_EVENT_RX_FRAMING_ERROR & obj_s->events);
<> 149:156823d33999 868 }
<> 149:156823d33999 869 }
<> 149:156823d33999 870
<> 149:156823d33999 871 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) {
<> 149:156823d33999 872 if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) {
<> 149:156823d33999 873 return_event |= (SERIAL_EVENT_RX_OVERRUN_ERROR & obj_s->events);
<> 149:156823d33999 874 }
<> 149:156823d33999 875 }
<> 149:156823d33999 876
<> 149:156823d33999 877 HAL_UART_IRQHandler(huart);
<> 149:156823d33999 878
<> 149:156823d33999 879 // Abort if an error occurs
<> 149:156823d33999 880 if (return_event & SERIAL_EVENT_RX_PARITY_ERROR ||
<> 149:156823d33999 881 return_event & SERIAL_EVENT_RX_FRAMING_ERROR ||
<> 149:156823d33999 882 return_event & SERIAL_EVENT_RX_OVERRUN_ERROR) {
<> 149:156823d33999 883 return return_event;
<> 149:156823d33999 884 }
<> 149:156823d33999 885
<> 149:156823d33999 886 //RX PART
<> 149:156823d33999 887 if (huart->RxXferSize != 0) {
<> 149:156823d33999 888 obj->rx_buff.pos = huart->RxXferSize - huart->RxXferCount;
<> 149:156823d33999 889 }
<> 149:156823d33999 890 if ((huart->RxXferCount == 0) && (obj->rx_buff.pos >= (obj->rx_buff.length - 1))) {
<> 149:156823d33999 891 return_event |= (SERIAL_EVENT_RX_COMPLETE & obj_s->events);
<> 149:156823d33999 892 }
<> 149:156823d33999 893
<> 149:156823d33999 894 // Check if char_match is present
<> 149:156823d33999 895 if (obj_s->events & SERIAL_EVENT_RX_CHARACTER_MATCH) {
<> 149:156823d33999 896 if (buf != NULL) {
<> 149:156823d33999 897 for (i = 0; i < obj->rx_buff.pos; i++) {
<> 149:156823d33999 898 if (buf[i] == obj->char_match) {
<> 149:156823d33999 899 obj->rx_buff.pos = i;
<> 149:156823d33999 900 return_event |= (SERIAL_EVENT_RX_CHARACTER_MATCH & obj_s->events);
<> 149:156823d33999 901 serial_rx_abort_asynch(obj);
<> 149:156823d33999 902 break;
<> 149:156823d33999 903 }
<> 149:156823d33999 904 }
<> 149:156823d33999 905 }
<> 149:156823d33999 906 }
<> 149:156823d33999 907
<> 149:156823d33999 908 return return_event;
<> 149:156823d33999 909 }
<> 149:156823d33999 910
<> 149:156823d33999 911 /**
<> 149:156823d33999 912 * Abort the ongoing TX transaction. It disables the enabled interupt for TX and
<> 149:156823d33999 913 * flush TX hardware buffer if TX FIFO is used
<> 149:156823d33999 914 *
<> 149:156823d33999 915 * @param obj The serial object
<> 149:156823d33999 916 */
<> 149:156823d33999 917 void serial_tx_abort_asynch(serial_t *obj)
<> 149:156823d33999 918 {
<> 149:156823d33999 919 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 920 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 921
<> 149:156823d33999 922 __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
<> 149:156823d33999 923 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
<> 149:156823d33999 924
<> 149:156823d33999 925 // clear flags
<> 149:156823d33999 926 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
<> 149:156823d33999 927
<> 149:156823d33999 928 // reset states
<> 149:156823d33999 929 huart->TxXferCount = 0;
<> 149:156823d33999 930 // update handle state
<> 149:156823d33999 931 if(huart->gState == HAL_UART_STATE_BUSY_TX_RX) {
<> 149:156823d33999 932 huart->gState = HAL_UART_STATE_BUSY_RX;
<> 149:156823d33999 933 } else {
<> 149:156823d33999 934 huart->gState = HAL_UART_STATE_READY;
<> 149:156823d33999 935 }
<> 149:156823d33999 936 }
<> 149:156823d33999 937
<> 149:156823d33999 938 /**
<> 149:156823d33999 939 * Abort the ongoing RX transaction It disables the enabled interrupt for RX and
<> 149:156823d33999 940 * flush RX hardware buffer if RX FIFO is used
<> 149:156823d33999 941 *
<> 149:156823d33999 942 * @param obj The serial object
<> 149:156823d33999 943 */
<> 149:156823d33999 944 void serial_rx_abort_asynch(serial_t *obj)
<> 149:156823d33999 945 {
<> 149:156823d33999 946 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 947 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 948
<> 149:156823d33999 949 // disable interrupts
<> 149:156823d33999 950 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
<> 149:156823d33999 951 __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
<> 149:156823d33999 952 __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
<> 149:156823d33999 953
<> 149:156823d33999 954 // clear flags
<> 149:156823d33999 955 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_RXNE);
<> 149:156823d33999 956 volatile uint32_t tmpval = huart->Instance->DR; // Clear error flags
<> 149:156823d33999 957
<> 149:156823d33999 958 // reset states
<> 149:156823d33999 959 huart->RxXferCount = 0;
<> 149:156823d33999 960 // update handle state
<> 149:156823d33999 961 if(huart->RxState == HAL_UART_STATE_BUSY_TX_RX) {
<> 149:156823d33999 962 huart->RxState = HAL_UART_STATE_BUSY_TX;
<> 149:156823d33999 963 } else {
<> 149:156823d33999 964 huart->RxState = HAL_UART_STATE_READY;
<> 149:156823d33999 965 }
<> 149:156823d33999 966 }
<> 149:156823d33999 967
<> 149:156823d33999 968 #endif
<> 149:156823d33999 969
<> 149:156823d33999 970 #if DEVICE_SERIAL_FC
<> 149:156823d33999 971
<> 149:156823d33999 972 /**
<> 149:156823d33999 973 * Set HW Control Flow
<> 149:156823d33999 974 * @param obj The serial object
<> 149:156823d33999 975 * @param type The Control Flow type (FlowControlNone, FlowControlRTS, FlowControlCTS, FlowControlRTSCTS)
<> 149:156823d33999 976 * @param rxflow Pin for the rxflow
<> 149:156823d33999 977 * @param txflow Pin for the txflow
<> 149:156823d33999 978 */
<> 149:156823d33999 979 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
<> 149:156823d33999 980 {
<> 149:156823d33999 981 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 982
<> 149:156823d33999 983 // Determine the UART to use (UART_1, UART_2, ...)
<> 149:156823d33999 984 UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS);
<> 149:156823d33999 985 UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS);
<> 149:156823d33999 986
<> 149:156823d33999 987 // Get the peripheral name (UART_1, UART_2, ...) from the pin and assign it to the object
<> 149:156823d33999 988 obj_s->uart = (UARTName)pinmap_merge(uart_cts, uart_rts);
<> 149:156823d33999 989 MBED_ASSERT(obj_s->uart != (UARTName)NC);
<> 149:156823d33999 990
<> 149:156823d33999 991 if(type == FlowControlNone) {
<> 149:156823d33999 992 // Disable hardware flow control
<> 149:156823d33999 993 obj_s->hw_flow_ctl = UART_HWCONTROL_NONE;
<> 149:156823d33999 994 }
<> 149:156823d33999 995 if (type == FlowControlRTS) {
<> 149:156823d33999 996 // Enable RTS
<> 149:156823d33999 997 MBED_ASSERT(uart_rts != (UARTName)NC);
<> 149:156823d33999 998 obj_s->hw_flow_ctl = UART_HWCONTROL_RTS;
<> 149:156823d33999 999 obj_s->pin_rts = rxflow;
<> 149:156823d33999 1000 // Enable the pin for RTS function
<> 149:156823d33999 1001 pinmap_pinout(rxflow, PinMap_UART_RTS);
<> 149:156823d33999 1002 }
<> 149:156823d33999 1003 if (type == FlowControlCTS) {
<> 149:156823d33999 1004 // Enable CTS
<> 149:156823d33999 1005 MBED_ASSERT(uart_cts != (UARTName)NC);
<> 149:156823d33999 1006 obj_s->hw_flow_ctl = UART_HWCONTROL_CTS;
<> 149:156823d33999 1007 obj_s->pin_cts = txflow;
<> 149:156823d33999 1008 // Enable the pin for CTS function
<> 149:156823d33999 1009 pinmap_pinout(txflow, PinMap_UART_CTS);
<> 149:156823d33999 1010 }
<> 149:156823d33999 1011 if (type == FlowControlRTSCTS) {
<> 149:156823d33999 1012 // Enable CTS & RTS
<> 149:156823d33999 1013 MBED_ASSERT(uart_rts != (UARTName)NC);
<> 149:156823d33999 1014 MBED_ASSERT(uart_cts != (UARTName)NC);
<> 149:156823d33999 1015 obj_s->hw_flow_ctl = UART_HWCONTROL_RTS_CTS;
<> 149:156823d33999 1016 obj_s->pin_rts = rxflow;
<> 149:156823d33999 1017 obj_s->pin_cts = txflow;
<> 149:156823d33999 1018 // Enable the pin for CTS function
<> 149:156823d33999 1019 pinmap_pinout(txflow, PinMap_UART_CTS);
<> 149:156823d33999 1020 // Enable the pin for RTS function
<> 149:156823d33999 1021 pinmap_pinout(rxflow, PinMap_UART_RTS);
<> 149:156823d33999 1022 }
<> 149:156823d33999 1023
<> 149:156823d33999 1024 init_uart(obj);
<> 149:156823d33999 1025 }
<> 149:156823d33999 1026
<> 149:156823d33999 1027 #endif
<> 149:156823d33999 1028
<> 149:156823d33999 1029 #endif