test
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Diff: targets/TARGET_STM/stm_spi_api.c
- Revision:
- 169:9672193075cf
- Parent:
- 168:e84263d55307
- Child:
- 171:19eb464bc2be
--- a/targets/TARGET_STM/stm_spi_api.c Wed Jun 21 17:46:44 2017 +0100 +++ b/targets/TARGET_STM/stm_spi_api.c Thu Jul 06 15:42:05 2017 +0100 @@ -38,6 +38,7 @@ #include "cmsis.h" #include "pinmap.h" #include "PeripheralPins.h" +#include "spi_device.h" #if DEVICE_SPI_ASYNCH #define SPI_INST(obj) ((SPI_TypeDef *)(obj->spi.spi)) @@ -349,21 +350,40 @@ int spi_master_write(spi_t *obj, int value) { - uint16_t size, ret; - int Rx = 0; struct spi_s *spiobj = SPI_S(obj); SPI_HandleTypeDef *handle = &(spiobj->handle); - size = (handle->Init.DataSize == SPI_DATASIZE_16BIT) ? 2 : 1; +#if defined(LL_SPI_RX_FIFO_TH_HALF) + /* Configure the default data size */ + if (handle->Init.DataSize == SPI_DATASIZE_16BIT) { + LL_SPI_SetRxFIFOThreshold(SPI_INST(obj), LL_SPI_RX_FIFO_TH_HALF); + } else { + LL_SPI_SetRxFIFOThreshold(SPI_INST(obj), LL_SPI_RX_FIFO_TH_QUARTER); + } +#endif - /* Use 10ms timeout */ - ret = HAL_SPI_TransmitReceive(handle,(uint8_t*)&value,(uint8_t*)&Rx,size,HAL_MAX_DELAY); + /* Here we're using LL which means direct registers access + * There is no error management, so we may end up looping + * infinitely here in case of faulty device for insatnce, + * but this will increase performances significantly + */ - if(ret == HAL_OK) { - return Rx; + /* Wait TXE flag to transmit data */ + while (!LL_SPI_IsActiveFlag_TXE(SPI_INST(obj))); + + if (handle->Init.DataSize == SPI_DATASIZE_16BIT) { + LL_SPI_TransmitData16(SPI_INST(obj), value); } else { - DEBUG_PRINTF("SPI inst=0x%8X ERROR in write\r\n", (int)handle->Instance); - return -1; + LL_SPI_TransmitData8(SPI_INST(obj), (uint8_t) value); + } + + /* Then wait RXE flag before reading */ + while (!LL_SPI_IsActiveFlag_RXNE(SPI_INST(obj))); + + if (handle->Init.DataSize == SPI_DATASIZE_16BIT) { + return LL_SPI_ReceiveData16(SPI_INST(obj)); + } else { + return LL_SPI_ReceiveData8(SPI_INST(obj)); } }