test
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targets/TARGET_STM/TARGET_STM32F4/can_device.h@178:d650f5d4c87a, 2017-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Nov 08 13:50:44 2017 +0000
- Revision:
- 178:d650f5d4c87a
- Parent:
- 168:e84263d55307
This updates the lib to the mbed lib v 155
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 160:d5399cc887bb | 1 | /* mbed Microcontroller Library |
<> | 160:d5399cc887bb | 2 | * Copyright (c) 2006-2017 ARM Limited |
<> | 160:d5399cc887bb | 3 | * |
<> | 160:d5399cc887bb | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 160:d5399cc887bb | 5 | * you may not use this file except in compliance with the License. |
<> | 160:d5399cc887bb | 6 | * You may obtain a copy of the License at |
<> | 160:d5399cc887bb | 7 | * |
<> | 160:d5399cc887bb | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 160:d5399cc887bb | 9 | * |
<> | 160:d5399cc887bb | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 160:d5399cc887bb | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 160:d5399cc887bb | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 160:d5399cc887bb | 13 | * See the License for the specific language governing permissions and |
<> | 160:d5399cc887bb | 14 | * limitations under the License. |
<> | 160:d5399cc887bb | 15 | */ |
<> | 160:d5399cc887bb | 16 | #ifndef MBED_CAN_DEVICE_H |
<> | 160:d5399cc887bb | 17 | #define MBED_CAN_DEVICE_H |
<> | 160:d5399cc887bb | 18 | |
<> | 160:d5399cc887bb | 19 | #include "cmsis.h" |
AnnaBridge | 168:e84263d55307 | 20 | #include "stm32f4xx_hal.h" |
<> | 160:d5399cc887bb | 21 | |
<> | 160:d5399cc887bb | 22 | #ifdef __cplusplus |
<> | 160:d5399cc887bb | 23 | extern "C" { |
<> | 160:d5399cc887bb | 24 | #endif |
<> | 160:d5399cc887bb | 25 | |
<> | 160:d5399cc887bb | 26 | #ifdef DEVICE_CAN |
<> | 160:d5399cc887bb | 27 | |
<> | 160:d5399cc887bb | 28 | #define CAN_NUM 2 // Number of CAN peripherals present in the STM32 serie (1 or 2) |
<> | 160:d5399cc887bb | 29 | |
<> | 160:d5399cc887bb | 30 | #define CAN1_IRQ_RX_IRQN CAN1_RX0_IRQn |
<> | 160:d5399cc887bb | 31 | #define CAN1_IRQ_RX_VECT CAN1_RX0_IRQHandler |
<> | 160:d5399cc887bb | 32 | #define CAN1_IRQ_TX_IRQN CAN1_TX_IRQn |
<> | 160:d5399cc887bb | 33 | #define CAN1_IRQ_TX_VECT CAN1_TX_IRQHandler |
<> | 160:d5399cc887bb | 34 | #define CAN1_IRQ_ERROR_IRQN CAN1_SCE_IRQn |
<> | 160:d5399cc887bb | 35 | #define CAN1_IRQ_ERROR_VECT CAN1_SCE_IRQHandler |
<> | 160:d5399cc887bb | 36 | #define CAN1_IRQ_PASSIVE_IRQN CAN1_SCE_IRQn |
<> | 160:d5399cc887bb | 37 | #define CAN1_IRQ_PASSIVE_VECT CAN1_SCE_IRQHandler |
<> | 160:d5399cc887bb | 38 | #define CAN1_IRQ_BUS_IRQN CAN1_SCE_IRQn |
<> | 160:d5399cc887bb | 39 | #define CAN1_IRQ_BUS_VECT CAN1_SCE_IRQHandler |
<> | 160:d5399cc887bb | 40 | |
<> | 160:d5399cc887bb | 41 | #define CAN2_IRQ_RX_IRQN CAN2_RX0_IRQn |
<> | 160:d5399cc887bb | 42 | #define CAN2_IRQ_RX_VECT CAN2_RX0_IRQHandler |
<> | 160:d5399cc887bb | 43 | #define CAN2_IRQ_TX_IRQN CAN2_TX_IRQn |
<> | 160:d5399cc887bb | 44 | #define CAN2_IRQ_TX_VECT CAN2_TX_IRQHandler |
<> | 160:d5399cc887bb | 45 | #define CAN2_IRQ_ERROR_IRQN CAN2_SCE_IRQn |
<> | 160:d5399cc887bb | 46 | #define CAN2_IRQ_ERROR_VECT CAN2_SCE_IRQHandler |
<> | 160:d5399cc887bb | 47 | #define CAN2_IRQ_PASSIVE_IRQN CAN2_SCE_IRQn |
<> | 160:d5399cc887bb | 48 | #define CAN2_IRQ_PASSIVE_VECT CAN2_SCE_IRQHandler |
<> | 160:d5399cc887bb | 49 | #define CAN2_IRQ_BUS_IRQN CAN2_SCE_IRQn |
<> | 160:d5399cc887bb | 50 | #define CAN2_IRQ_BUS_VECT CAN2_SCE_IRQHandler |
<> | 160:d5399cc887bb | 51 | |
<> | 160:d5399cc887bb | 52 | #endif // DEVICE_CAN |
<> | 160:d5399cc887bb | 53 | |
<> | 160:d5399cc887bb | 54 | #endif |