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targets/TARGET_Maxim/TARGET_MAX32625/mxc/tmr.c@150:02e0a0aed4ec, 2016-11-08 (annotated)
- Committer:
- <>
- Date:
- Tue Nov 08 17:45:16 2016 +0000
- Revision:
- 150:02e0a0aed4ec
This updates the lib to the mbed lib v129
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 150:02e0a0aed4ec | 1 | /******************************************************************************* |
<> | 150:02e0a0aed4ec | 2 | * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved. |
<> | 150:02e0a0aed4ec | 3 | * |
<> | 150:02e0a0aed4ec | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
<> | 150:02e0a0aed4ec | 5 | * copy of this software and associated documentation files (the "Software"), |
<> | 150:02e0a0aed4ec | 6 | * to deal in the Software without restriction, including without limitation |
<> | 150:02e0a0aed4ec | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
<> | 150:02e0a0aed4ec | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
<> | 150:02e0a0aed4ec | 9 | * Software is furnished to do so, subject to the following conditions: |
<> | 150:02e0a0aed4ec | 10 | * |
<> | 150:02e0a0aed4ec | 11 | * The above copyright notice and this permission notice shall be included |
<> | 150:02e0a0aed4ec | 12 | * in all copies or substantial portions of the Software. |
<> | 150:02e0a0aed4ec | 13 | * |
<> | 150:02e0a0aed4ec | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
<> | 150:02e0a0aed4ec | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
<> | 150:02e0a0aed4ec | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
<> | 150:02e0a0aed4ec | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
<> | 150:02e0a0aed4ec | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
<> | 150:02e0a0aed4ec | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
<> | 150:02e0a0aed4ec | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
<> | 150:02e0a0aed4ec | 21 | * |
<> | 150:02e0a0aed4ec | 22 | * Except as contained in this notice, the name of Maxim Integrated |
<> | 150:02e0a0aed4ec | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
<> | 150:02e0a0aed4ec | 24 | * Products, Inc. Branding Policy. |
<> | 150:02e0a0aed4ec | 25 | * |
<> | 150:02e0a0aed4ec | 26 | * The mere transfer of this software does not imply any licenses |
<> | 150:02e0a0aed4ec | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
<> | 150:02e0a0aed4ec | 28 | * trademarks, maskwork rights, or any other form of intellectual |
<> | 150:02e0a0aed4ec | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
<> | 150:02e0a0aed4ec | 30 | * ownership rights. |
<> | 150:02e0a0aed4ec | 31 | * |
<> | 150:02e0a0aed4ec | 32 | * $Date: 2016-03-11 11:46:37 -0600 (Fri, 11 Mar 2016) $ |
<> | 150:02e0a0aed4ec | 33 | * $Revision: 21839 $ |
<> | 150:02e0a0aed4ec | 34 | * |
<> | 150:02e0a0aed4ec | 35 | ******************************************************************************/ |
<> | 150:02e0a0aed4ec | 36 | |
<> | 150:02e0a0aed4ec | 37 | #include <stddef.h> |
<> | 150:02e0a0aed4ec | 38 | #include "mxc_assert.h" |
<> | 150:02e0a0aed4ec | 39 | #include "tmr.h" |
<> | 150:02e0a0aed4ec | 40 | |
<> | 150:02e0a0aed4ec | 41 | static tmr_prescale_t prescaler[MXC_CFG_TMR_INSTANCES]; |
<> | 150:02e0a0aed4ec | 42 | |
<> | 150:02e0a0aed4ec | 43 | /******************************************************************************/ |
<> | 150:02e0a0aed4ec | 44 | int TMR_Init(mxc_tmr_regs_t *tmr, tmr_prescale_t prescale, const sys_cfg_tmr_t *sysCfg) |
<> | 150:02e0a0aed4ec | 45 | { |
<> | 150:02e0a0aed4ec | 46 | int err; |
<> | 150:02e0a0aed4ec | 47 | int tmrNum; |
<> | 150:02e0a0aed4ec | 48 | |
<> | 150:02e0a0aed4ec | 49 | //get the timer number |
<> | 150:02e0a0aed4ec | 50 | tmrNum = MXC_TMR_GET_IDX(tmr); |
<> | 150:02e0a0aed4ec | 51 | |
<> | 150:02e0a0aed4ec | 52 | //check for valid pointer |
<> | 150:02e0a0aed4ec | 53 | MXC_ASSERT(tmrNum >= 0); |
<> | 150:02e0a0aed4ec | 54 | |
<> | 150:02e0a0aed4ec | 55 | //steup system GPIO config |
<> | 150:02e0a0aed4ec | 56 | if((err = SYS_TMR_Init(tmr, sysCfg)) != E_NO_ERROR) |
<> | 150:02e0a0aed4ec | 57 | return err; |
<> | 150:02e0a0aed4ec | 58 | |
<> | 150:02e0a0aed4ec | 59 | //save the prescale value for this timer |
<> | 150:02e0a0aed4ec | 60 | prescaler[tmrNum] = prescale; |
<> | 150:02e0a0aed4ec | 61 | |
<> | 150:02e0a0aed4ec | 62 | //Disable timer and clear settings |
<> | 150:02e0a0aed4ec | 63 | tmr->ctrl = 0; |
<> | 150:02e0a0aed4ec | 64 | |
<> | 150:02e0a0aed4ec | 65 | //reset all counts to 0 |
<> | 150:02e0a0aed4ec | 66 | tmr->count32 = 0; |
<> | 150:02e0a0aed4ec | 67 | tmr->count16_0 = 0; |
<> | 150:02e0a0aed4ec | 68 | tmr->count16_1 = 0; |
<> | 150:02e0a0aed4ec | 69 | |
<> | 150:02e0a0aed4ec | 70 | // Clear interrupt flag |
<> | 150:02e0a0aed4ec | 71 | tmr->intfl = MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1; |
<> | 150:02e0a0aed4ec | 72 | |
<> | 150:02e0a0aed4ec | 73 | return E_NO_ERROR; |
<> | 150:02e0a0aed4ec | 74 | } |
<> | 150:02e0a0aed4ec | 75 | |
<> | 150:02e0a0aed4ec | 76 | /******************************************************************************/ |
<> | 150:02e0a0aed4ec | 77 | void TMR32_Config(mxc_tmr_regs_t *tmr, const tmr32_cfg_t *config) |
<> | 150:02e0a0aed4ec | 78 | { |
<> | 150:02e0a0aed4ec | 79 | //stop timer |
<> | 150:02e0a0aed4ec | 80 | TMR32_Stop(tmr); |
<> | 150:02e0a0aed4ec | 81 | |
<> | 150:02e0a0aed4ec | 82 | //setup timer configuration register |
<> | 150:02e0a0aed4ec | 83 | //clear tmr2x16 (32bit mode), mode and polarity bits |
<> | 150:02e0a0aed4ec | 84 | tmr->ctrl &= ~(MXC_F_TMR_CTRL_TMR2X16 | MXC_F_TMR_CTRL_MODE | |
<> | 150:02e0a0aed4ec | 85 | MXC_F_TMR_CTRL_POLARITY); |
<> | 150:02e0a0aed4ec | 86 | |
<> | 150:02e0a0aed4ec | 87 | //set mode and polarity |
<> | 150:02e0a0aed4ec | 88 | tmr->ctrl |= ((config->mode << MXC_F_TMR_CTRL_MODE_POS) | |
<> | 150:02e0a0aed4ec | 89 | (config->polarity << MXC_F_TMR_CTRL_POLARITY_POS)); |
<> | 150:02e0a0aed4ec | 90 | |
<> | 150:02e0a0aed4ec | 91 | //setup timer Tick registers |
<> | 150:02e0a0aed4ec | 92 | tmr->term_cnt32 = config->compareCount; |
<> | 150:02e0a0aed4ec | 93 | |
<> | 150:02e0a0aed4ec | 94 | return; |
<> | 150:02e0a0aed4ec | 95 | } |
<> | 150:02e0a0aed4ec | 96 | |
<> | 150:02e0a0aed4ec | 97 | /******************************************************************************/ |
<> | 150:02e0a0aed4ec | 98 | void TMR32_PWMConfig(mxc_tmr_regs_t *tmr, const tmr32_cfg_pwm_t *config) |
<> | 150:02e0a0aed4ec | 99 | { |
<> | 150:02e0a0aed4ec | 100 | //stop timer |
<> | 150:02e0a0aed4ec | 101 | TMR32_Stop(tmr); |
<> | 150:02e0a0aed4ec | 102 | |
<> | 150:02e0a0aed4ec | 103 | //setup timer configuration register |
<> | 150:02e0a0aed4ec | 104 | //clear tmr2x16 (32bit mode), mode and polarity bits |
<> | 150:02e0a0aed4ec | 105 | tmr->ctrl &= ~(MXC_F_TMR_CTRL_TMR2X16 | MXC_F_TMR_CTRL_MODE | |
<> | 150:02e0a0aed4ec | 106 | MXC_F_TMR_CTRL_POLARITY); |
<> | 150:02e0a0aed4ec | 107 | |
<> | 150:02e0a0aed4ec | 108 | //set mode and polarity |
<> | 150:02e0a0aed4ec | 109 | tmr->ctrl |= ((TMR32_MODE_PWM << MXC_F_TMR_CTRL_MODE_POS) | |
<> | 150:02e0a0aed4ec | 110 | (config->polarity << MXC_F_TMR_CTRL_POLARITY_POS)); |
<> | 150:02e0a0aed4ec | 111 | |
<> | 150:02e0a0aed4ec | 112 | tmr->pwm_cap32 = config->dutyCount; |
<> | 150:02e0a0aed4ec | 113 | |
<> | 150:02e0a0aed4ec | 114 | //setup timer Tick registers |
<> | 150:02e0a0aed4ec | 115 | tmr->count32 = 0; |
<> | 150:02e0a0aed4ec | 116 | tmr->term_cnt32 = config->periodCount; |
<> | 150:02e0a0aed4ec | 117 | |
<> | 150:02e0a0aed4ec | 118 | return; |
<> | 150:02e0a0aed4ec | 119 | } |
<> | 150:02e0a0aed4ec | 120 | |
<> | 150:02e0a0aed4ec | 121 | /******************************************************************************/ |
<> | 150:02e0a0aed4ec | 122 | void TMR16_Config(mxc_tmr_regs_t *tmr, uint8_t index, const tmr16_cfg_t *config) |
<> | 150:02e0a0aed4ec | 123 | { |
<> | 150:02e0a0aed4ec | 124 | //stop timer |
<> | 150:02e0a0aed4ec | 125 | TMR16_Stop(tmr, index); |
<> | 150:02e0a0aed4ec | 126 | |
<> | 150:02e0a0aed4ec | 127 | if(index > 0) { //configure timer 16_1 |
<> | 150:02e0a0aed4ec | 128 | |
<> | 150:02e0a0aed4ec | 129 | //setup timer configuration register |
<> | 150:02e0a0aed4ec | 130 | tmr->ctrl |= MXC_F_TMR_CTRL_TMR2X16; //1 = 16bit mode |
<> | 150:02e0a0aed4ec | 131 | |
<> | 150:02e0a0aed4ec | 132 | //set mode |
<> | 150:02e0a0aed4ec | 133 | if(config->mode) |
<> | 150:02e0a0aed4ec | 134 | tmr->ctrl |= MXC_F_TMR_CTRL_MODE_16_1; |
<> | 150:02e0a0aed4ec | 135 | else |
<> | 150:02e0a0aed4ec | 136 | tmr->ctrl &= ~MXC_F_TMR_CTRL_MODE_16_1; |
<> | 150:02e0a0aed4ec | 137 | |
<> | 150:02e0a0aed4ec | 138 | //setup timer Ticks registers |
<> | 150:02e0a0aed4ec | 139 | tmr->term_cnt16_1 = config->compareCount; |
<> | 150:02e0a0aed4ec | 140 | } else { //configure timer 16_0 |
<> | 150:02e0a0aed4ec | 141 | |
<> | 150:02e0a0aed4ec | 142 | //setup timer configuration register |
<> | 150:02e0a0aed4ec | 143 | tmr->ctrl |= MXC_F_TMR_CTRL_TMR2X16; //1 = 16bit mode |
<> | 150:02e0a0aed4ec | 144 | |
<> | 150:02e0a0aed4ec | 145 | //set mode |
<> | 150:02e0a0aed4ec | 146 | if(config->mode) |
<> | 150:02e0a0aed4ec | 147 | tmr->ctrl |= MXC_F_TMR_CTRL_MODE_16_0; |
<> | 150:02e0a0aed4ec | 148 | else |
<> | 150:02e0a0aed4ec | 149 | tmr->ctrl &= ~MXC_F_TMR_CTRL_MODE_16_0; |
<> | 150:02e0a0aed4ec | 150 | |
<> | 150:02e0a0aed4ec | 151 | //setup timer Ticks registers |
<> | 150:02e0a0aed4ec | 152 | tmr->term_cnt16_0 = config->compareCount; |
<> | 150:02e0a0aed4ec | 153 | } |
<> | 150:02e0a0aed4ec | 154 | |
<> | 150:02e0a0aed4ec | 155 | return; |
<> | 150:02e0a0aed4ec | 156 | } |
<> | 150:02e0a0aed4ec | 157 | |
<> | 150:02e0a0aed4ec | 158 | /******************************************************************************/ |
<> | 150:02e0a0aed4ec | 159 | void TMR32_Start(mxc_tmr_regs_t *tmr) |
<> | 150:02e0a0aed4ec | 160 | { |
<> | 150:02e0a0aed4ec | 161 | int tmrNum; |
<> | 150:02e0a0aed4ec | 162 | uint32_t ctrl; |
<> | 150:02e0a0aed4ec | 163 | |
<> | 150:02e0a0aed4ec | 164 | //get the timer number |
<> | 150:02e0a0aed4ec | 165 | tmrNum = MXC_TMR_GET_IDX(tmr); |
<> | 150:02e0a0aed4ec | 166 | |
<> | 150:02e0a0aed4ec | 167 | //prescaler gets reset to 0 when timer is disabled |
<> | 150:02e0a0aed4ec | 168 | //set the prescale to the saved value for this timer |
<> | 150:02e0a0aed4ec | 169 | ctrl = tmr->ctrl; |
<> | 150:02e0a0aed4ec | 170 | ctrl &= ~(MXC_F_TMR_CTRL_PRESCALE); //clear prescaler bits |
<> | 150:02e0a0aed4ec | 171 | ctrl |= prescaler[tmrNum] << MXC_F_TMR_CTRL_PRESCALE_POS; //set prescaler |
<> | 150:02e0a0aed4ec | 172 | ctrl |= MXC_F_TMR_CTRL_ENABLE0; //set enable to start the timer |
<> | 150:02e0a0aed4ec | 173 | |
<> | 150:02e0a0aed4ec | 174 | tmr->ctrl = ctrl; |
<> | 150:02e0a0aed4ec | 175 | |
<> | 150:02e0a0aed4ec | 176 | return; |
<> | 150:02e0a0aed4ec | 177 | } |
<> | 150:02e0a0aed4ec | 178 | |
<> | 150:02e0a0aed4ec | 179 | /******************************************************************************/ |
<> | 150:02e0a0aed4ec | 180 | void TMR16_Start(mxc_tmr_regs_t *tmr, uint8_t index) |
<> | 150:02e0a0aed4ec | 181 | { |
<> | 150:02e0a0aed4ec | 182 | int tmrNum; |
<> | 150:02e0a0aed4ec | 183 | uint32_t ctrl; |
<> | 150:02e0a0aed4ec | 184 | |
<> | 150:02e0a0aed4ec | 185 | //get the timer number |
<> | 150:02e0a0aed4ec | 186 | tmrNum = MXC_TMR_GET_IDX(tmr); |
<> | 150:02e0a0aed4ec | 187 | |
<> | 150:02e0a0aed4ec | 188 | ctrl = tmr->ctrl; |
<> | 150:02e0a0aed4ec | 189 | |
<> | 150:02e0a0aed4ec | 190 | //prescaler gets reset to 0 when both 16 bit timers are disabled |
<> | 150:02e0a0aed4ec | 191 | //set the prescale to the saved value for this timer if is is not already set |
<> | 150:02e0a0aed4ec | 192 | if((ctrl & MXC_F_TMR_CTRL_PRESCALE) != ((uint32_t)prescaler[tmrNum] << MXC_F_TMR_CTRL_PRESCALE_POS)) { |
<> | 150:02e0a0aed4ec | 193 | ctrl &= ~(MXC_F_TMR_CTRL_PRESCALE); //clear prescaler bits |
<> | 150:02e0a0aed4ec | 194 | ctrl |= prescaler[tmrNum] << MXC_F_TMR_CTRL_PRESCALE_POS; //set prescaler |
<> | 150:02e0a0aed4ec | 195 | } |
<> | 150:02e0a0aed4ec | 196 | |
<> | 150:02e0a0aed4ec | 197 | if(index > 0) |
<> | 150:02e0a0aed4ec | 198 | ctrl |= MXC_F_TMR_CTRL_ENABLE1; //start timer 16_1 |
<> | 150:02e0a0aed4ec | 199 | else |
<> | 150:02e0a0aed4ec | 200 | ctrl |= MXC_F_TMR_CTRL_ENABLE0; //start timer 16_0 |
<> | 150:02e0a0aed4ec | 201 | |
<> | 150:02e0a0aed4ec | 202 | tmr->ctrl = ctrl; |
<> | 150:02e0a0aed4ec | 203 | |
<> | 150:02e0a0aed4ec | 204 | return; |
<> | 150:02e0a0aed4ec | 205 | } |
<> | 150:02e0a0aed4ec | 206 | |
<> | 150:02e0a0aed4ec | 207 | /******************************************************************************/ |
<> | 150:02e0a0aed4ec | 208 | uint32_t TMR_GetPrescaler(mxc_tmr_regs_t *tmr) |
<> | 150:02e0a0aed4ec | 209 | { |
<> | 150:02e0a0aed4ec | 210 | int tmrNum; |
<> | 150:02e0a0aed4ec | 211 | |
<> | 150:02e0a0aed4ec | 212 | //get the timer number |
<> | 150:02e0a0aed4ec | 213 | tmrNum = MXC_TMR_GET_IDX(tmr); |
<> | 150:02e0a0aed4ec | 214 | |
<> | 150:02e0a0aed4ec | 215 | return ((uint32_t)prescaler[tmrNum]); |
<> | 150:02e0a0aed4ec | 216 | } |
<> | 150:02e0a0aed4ec | 217 | |
<> | 150:02e0a0aed4ec | 218 | |
<> | 150:02e0a0aed4ec | 219 | /******************************************************************************/ |
<> | 150:02e0a0aed4ec | 220 | int TMR32_GetPWMTicks(mxc_tmr_regs_t *tmr, uint8_t dutyPercent, uint32_t freq, uint32_t *dutyTicks, uint32_t *periodTicks) |
<> | 150:02e0a0aed4ec | 221 | { |
<> | 150:02e0a0aed4ec | 222 | uint32_t timerClock; |
<> | 150:02e0a0aed4ec | 223 | uint32_t prescale; |
<> | 150:02e0a0aed4ec | 224 | uint64_t ticks; |
<> | 150:02e0a0aed4ec | 225 | |
<> | 150:02e0a0aed4ec | 226 | if(dutyPercent > 100) |
<> | 150:02e0a0aed4ec | 227 | return E_BAD_PARAM; |
<> | 150:02e0a0aed4ec | 228 | |
<> | 150:02e0a0aed4ec | 229 | if(freq == 0) |
<> | 150:02e0a0aed4ec | 230 | return E_BAD_PARAM; |
<> | 150:02e0a0aed4ec | 231 | |
<> | 150:02e0a0aed4ec | 232 | timerClock = SYS_TMR_GetFreq(tmr); |
<> | 150:02e0a0aed4ec | 233 | prescale = TMR_GetPrescaler(tmr); |
<> | 150:02e0a0aed4ec | 234 | |
<> | 150:02e0a0aed4ec | 235 | if(timerClock == 0 || prescale > TMR_PRESCALE_DIV_2_12) |
<> | 150:02e0a0aed4ec | 236 | return E_UNINITIALIZED; |
<> | 150:02e0a0aed4ec | 237 | |
<> | 150:02e0a0aed4ec | 238 | ticks = timerClock / (1 << (prescale & 0xF)) / freq; |
<> | 150:02e0a0aed4ec | 239 | |
<> | 150:02e0a0aed4ec | 240 | //make sure ticks is within a 32 bit value |
<> | 150:02e0a0aed4ec | 241 | if (!(ticks & 0xffffffff00000000) && (ticks & 0xffffffff)) { |
<> | 150:02e0a0aed4ec | 242 | *periodTicks = ticks; |
<> | 150:02e0a0aed4ec | 243 | |
<> | 150:02e0a0aed4ec | 244 | *dutyTicks = ((uint64_t)*periodTicks * dutyPercent) / 100; |
<> | 150:02e0a0aed4ec | 245 | |
<> | 150:02e0a0aed4ec | 246 | return E_NO_ERROR; |
<> | 150:02e0a0aed4ec | 247 | } |
<> | 150:02e0a0aed4ec | 248 | |
<> | 150:02e0a0aed4ec | 249 | return E_INVALID; |
<> | 150:02e0a0aed4ec | 250 | } |
<> | 150:02e0a0aed4ec | 251 | |
<> | 150:02e0a0aed4ec | 252 | /******************************************************************************/ |
<> | 150:02e0a0aed4ec | 253 | int TMR32_TimeToTicks(mxc_tmr_regs_t *tmr, uint32_t time, tmr_unit_t units, uint32_t *ticks) |
<> | 150:02e0a0aed4ec | 254 | { |
<> | 150:02e0a0aed4ec | 255 | uint32_t unit_div0, unit_div1; |
<> | 150:02e0a0aed4ec | 256 | uint32_t timerClock; |
<> | 150:02e0a0aed4ec | 257 | uint32_t prescale; |
<> | 150:02e0a0aed4ec | 258 | uint64_t temp_ticks; |
<> | 150:02e0a0aed4ec | 259 | |
<> | 150:02e0a0aed4ec | 260 | timerClock = SYS_TMR_GetFreq(tmr); |
<> | 150:02e0a0aed4ec | 261 | prescale = TMR_GetPrescaler(tmr); |
<> | 150:02e0a0aed4ec | 262 | |
<> | 150:02e0a0aed4ec | 263 | if(timerClock == 0 || prescale > TMR_PRESCALE_DIV_2_12) |
<> | 150:02e0a0aed4ec | 264 | return E_UNINITIALIZED; |
<> | 150:02e0a0aed4ec | 265 | |
<> | 150:02e0a0aed4ec | 266 | switch (units) { |
<> | 150:02e0a0aed4ec | 267 | case TMR_UNIT_NANOSEC: |
<> | 150:02e0a0aed4ec | 268 | unit_div0 = 1000000; |
<> | 150:02e0a0aed4ec | 269 | unit_div1 = 1000; |
<> | 150:02e0a0aed4ec | 270 | break; |
<> | 150:02e0a0aed4ec | 271 | case TMR_UNIT_MICROSEC: |
<> | 150:02e0a0aed4ec | 272 | unit_div0 = 1000; |
<> | 150:02e0a0aed4ec | 273 | unit_div1 = 1000; |
<> | 150:02e0a0aed4ec | 274 | break; |
<> | 150:02e0a0aed4ec | 275 | case TMR_UNIT_MILLISEC: |
<> | 150:02e0a0aed4ec | 276 | unit_div0 = 1; |
<> | 150:02e0a0aed4ec | 277 | unit_div1 = 1000; |
<> | 150:02e0a0aed4ec | 278 | break; |
<> | 150:02e0a0aed4ec | 279 | case TMR_UNIT_SEC: |
<> | 150:02e0a0aed4ec | 280 | unit_div0 = 1; |
<> | 150:02e0a0aed4ec | 281 | unit_div1 = 1; |
<> | 150:02e0a0aed4ec | 282 | break; |
<> | 150:02e0a0aed4ec | 283 | default: |
<> | 150:02e0a0aed4ec | 284 | return E_BAD_PARAM; |
<> | 150:02e0a0aed4ec | 285 | } |
<> | 150:02e0a0aed4ec | 286 | |
<> | 150:02e0a0aed4ec | 287 | temp_ticks = (uint64_t)time * (timerClock / unit_div0) / (unit_div1 * (1 << (prescale & 0xF))); |
<> | 150:02e0a0aed4ec | 288 | |
<> | 150:02e0a0aed4ec | 289 | //make sure ticks is within a 32 bit value |
<> | 150:02e0a0aed4ec | 290 | if (!(temp_ticks & 0xffffffff00000000) && (temp_ticks & 0xffffffff)) { |
<> | 150:02e0a0aed4ec | 291 | *ticks = temp_ticks; |
<> | 150:02e0a0aed4ec | 292 | return E_NO_ERROR; |
<> | 150:02e0a0aed4ec | 293 | } |
<> | 150:02e0a0aed4ec | 294 | |
<> | 150:02e0a0aed4ec | 295 | return E_INVALID; |
<> | 150:02e0a0aed4ec | 296 | } |
<> | 150:02e0a0aed4ec | 297 | |
<> | 150:02e0a0aed4ec | 298 | /******************************************************************************/ |
<> | 150:02e0a0aed4ec | 299 | int TMR16_TimeToTicks(mxc_tmr_regs_t *tmr, uint32_t time, tmr_unit_t units, uint16_t *ticks) |
<> | 150:02e0a0aed4ec | 300 | { |
<> | 150:02e0a0aed4ec | 301 | uint32_t unit_div0, unit_div1; |
<> | 150:02e0a0aed4ec | 302 | uint32_t timerClock; |
<> | 150:02e0a0aed4ec | 303 | uint32_t prescale; |
<> | 150:02e0a0aed4ec | 304 | uint64_t temp_ticks; |
<> | 150:02e0a0aed4ec | 305 | |
<> | 150:02e0a0aed4ec | 306 | timerClock = SYS_TMR_GetFreq(tmr); |
<> | 150:02e0a0aed4ec | 307 | prescale = TMR_GetPrescaler(tmr); |
<> | 150:02e0a0aed4ec | 308 | |
<> | 150:02e0a0aed4ec | 309 | if(timerClock == 0 || prescale > TMR_PRESCALE_DIV_2_12) |
<> | 150:02e0a0aed4ec | 310 | return E_UNINITIALIZED; |
<> | 150:02e0a0aed4ec | 311 | |
<> | 150:02e0a0aed4ec | 312 | switch (units) { |
<> | 150:02e0a0aed4ec | 313 | case TMR_UNIT_NANOSEC: |
<> | 150:02e0a0aed4ec | 314 | unit_div0 = 1000000; |
<> | 150:02e0a0aed4ec | 315 | unit_div1 = 1000; |
<> | 150:02e0a0aed4ec | 316 | break; |
<> | 150:02e0a0aed4ec | 317 | case TMR_UNIT_MICROSEC: |
<> | 150:02e0a0aed4ec | 318 | unit_div0 = 1000; |
<> | 150:02e0a0aed4ec | 319 | unit_div1 = 1000; |
<> | 150:02e0a0aed4ec | 320 | break; |
<> | 150:02e0a0aed4ec | 321 | case TMR_UNIT_MILLISEC: |
<> | 150:02e0a0aed4ec | 322 | unit_div0 = 1; |
<> | 150:02e0a0aed4ec | 323 | unit_div1 = 1000; |
<> | 150:02e0a0aed4ec | 324 | break; |
<> | 150:02e0a0aed4ec | 325 | case TMR_UNIT_SEC: |
<> | 150:02e0a0aed4ec | 326 | unit_div0 = 1; |
<> | 150:02e0a0aed4ec | 327 | unit_div1 = 1; |
<> | 150:02e0a0aed4ec | 328 | break; |
<> | 150:02e0a0aed4ec | 329 | default: |
<> | 150:02e0a0aed4ec | 330 | return E_BAD_PARAM; |
<> | 150:02e0a0aed4ec | 331 | } |
<> | 150:02e0a0aed4ec | 332 | |
<> | 150:02e0a0aed4ec | 333 | temp_ticks = (uint64_t)time * (timerClock / unit_div0) / (unit_div1 * (1 << (prescale & 0xF))); |
<> | 150:02e0a0aed4ec | 334 | |
<> | 150:02e0a0aed4ec | 335 | //make sure ticks is within a 32 bit value |
<> | 150:02e0a0aed4ec | 336 | if (!(temp_ticks & 0xffffffffffff0000) && (temp_ticks & 0xffff)) { |
<> | 150:02e0a0aed4ec | 337 | *ticks = temp_ticks; |
<> | 150:02e0a0aed4ec | 338 | return E_NO_ERROR; |
<> | 150:02e0a0aed4ec | 339 | } |
<> | 150:02e0a0aed4ec | 340 | |
<> | 150:02e0a0aed4ec | 341 | return E_INVALID; |
<> | 150:02e0a0aed4ec | 342 | } |
<> | 150:02e0a0aed4ec | 343 | |
<> | 150:02e0a0aed4ec | 344 | |
<> | 150:02e0a0aed4ec | 345 | /******************************************************************************/ |
<> | 150:02e0a0aed4ec | 346 | int TMR_TicksToTime(mxc_tmr_regs_t *tmr, uint32_t ticks, uint32_t *time, tmr_unit_t *units) |
<> | 150:02e0a0aed4ec | 347 | { |
<> | 150:02e0a0aed4ec | 348 | uint64_t temp_time = 0; |
<> | 150:02e0a0aed4ec | 349 | |
<> | 150:02e0a0aed4ec | 350 | uint32_t timerClock = SYS_TMR_GetFreq(tmr); |
<> | 150:02e0a0aed4ec | 351 | uint32_t prescale = TMR_GetPrescaler(tmr); |
<> | 150:02e0a0aed4ec | 352 | |
<> | 150:02e0a0aed4ec | 353 | if(timerClock == 0 || prescale > TMR_PRESCALE_DIV_2_12) |
<> | 150:02e0a0aed4ec | 354 | return E_UNINITIALIZED; |
<> | 150:02e0a0aed4ec | 355 | |
<> | 150:02e0a0aed4ec | 356 | tmr_unit_t temp_unit = TMR_UNIT_NANOSEC; |
<> | 150:02e0a0aed4ec | 357 | temp_time = (uint64_t)ticks * 1000 * (1 << (prescale & 0xF)) / (timerClock / 1000000); |
<> | 150:02e0a0aed4ec | 358 | if (!(temp_time & 0xffffffff00000000)) { |
<> | 150:02e0a0aed4ec | 359 | *time = temp_time; |
<> | 150:02e0a0aed4ec | 360 | *units = temp_unit; |
<> | 150:02e0a0aed4ec | 361 | return E_NO_ERROR; |
<> | 150:02e0a0aed4ec | 362 | } |
<> | 150:02e0a0aed4ec | 363 | |
<> | 150:02e0a0aed4ec | 364 | temp_unit = TMR_UNIT_MICROSEC; |
<> | 150:02e0a0aed4ec | 365 | temp_time = (uint64_t)ticks * 1000 * (1 << (prescale & 0xF)) / (timerClock / 1000); |
<> | 150:02e0a0aed4ec | 366 | if (!(temp_time & 0xffffffff00000000)) { |
<> | 150:02e0a0aed4ec | 367 | *time = temp_time; |
<> | 150:02e0a0aed4ec | 368 | *units = temp_unit; |
<> | 150:02e0a0aed4ec | 369 | return E_NO_ERROR; |
<> | 150:02e0a0aed4ec | 370 | } |
<> | 150:02e0a0aed4ec | 371 | |
<> | 150:02e0a0aed4ec | 372 | temp_unit = TMR_UNIT_MILLISEC; |
<> | 150:02e0a0aed4ec | 373 | temp_time = (uint64_t)ticks * 1000 * (1 << (prescale & 0xF)) / timerClock; |
<> | 150:02e0a0aed4ec | 374 | if (!(temp_time & 0xffffffff00000000)) { |
<> | 150:02e0a0aed4ec | 375 | *time = temp_time; |
<> | 150:02e0a0aed4ec | 376 | *units = temp_unit; |
<> | 150:02e0a0aed4ec | 377 | return E_NO_ERROR; |
<> | 150:02e0a0aed4ec | 378 | } |
<> | 150:02e0a0aed4ec | 379 | |
<> | 150:02e0a0aed4ec | 380 | temp_unit = TMR_UNIT_SEC; |
<> | 150:02e0a0aed4ec | 381 | temp_time = (uint64_t)ticks * (1 << (prescale & 0xF)) / timerClock; |
<> | 150:02e0a0aed4ec | 382 | if (!(temp_time & 0xffffffff00000000)) { |
<> | 150:02e0a0aed4ec | 383 | *time = temp_time; |
<> | 150:02e0a0aed4ec | 384 | *units = temp_unit; |
<> | 150:02e0a0aed4ec | 385 | return E_NO_ERROR; |
<> | 150:02e0a0aed4ec | 386 | } |
<> | 150:02e0a0aed4ec | 387 | |
<> | 150:02e0a0aed4ec | 388 | return E_INVALID; |
<> | 150:02e0a0aed4ec | 389 | } |