Sword fighting robots WIP

Dependencies:   mbed PinDetect

Committer:
amitchell41
Date:
Thu Dec 06 01:30:51 2018 +0000
Revision:
0:e8eecd4b9a3d
Swing batta batta swing

Who changed what in which revision?

UserRevisionLine numberNew contents of line
amitchell41 0:e8eecd4b9a3d 1 #pragma once
amitchell41 0:e8eecd4b9a3d 2
amitchell41 0:e8eecd4b9a3d 3 // Authors: Ashley Mills, Nicholas Herriot
amitchell41 0:e8eecd4b9a3d 4 /* Copyright (c) 2013 Vodafone, MIT License
amitchell41 0:e8eecd4b9a3d 5 *
amitchell41 0:e8eecd4b9a3d 6 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
amitchell41 0:e8eecd4b9a3d 7 * and associated documentation files (the "Software"), to deal in the Software without restriction,
amitchell41 0:e8eecd4b9a3d 8 * including without limitation the rights to use, copy, modify, merge, publish, distribute,
amitchell41 0:e8eecd4b9a3d 9 * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is
amitchell41 0:e8eecd4b9a3d 10 * furnished to do so, subject to the following conditions:
amitchell41 0:e8eecd4b9a3d 11 *
amitchell41 0:e8eecd4b9a3d 12 * The above copyright notice and this permission notice shall be included in all copies or
amitchell41 0:e8eecd4b9a3d 13 * substantial portions of the Software.
amitchell41 0:e8eecd4b9a3d 14 *
amitchell41 0:e8eecd4b9a3d 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
amitchell41 0:e8eecd4b9a3d 16 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
amitchell41 0:e8eecd4b9a3d 17 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
amitchell41 0:e8eecd4b9a3d 18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
amitchell41 0:e8eecd4b9a3d 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
amitchell41 0:e8eecd4b9a3d 20 */
amitchell41 0:e8eecd4b9a3d 21
amitchell41 0:e8eecd4b9a3d 22 // the SparkFun breakout board defaults to 1, set to 0 if SA0 jumper on the bottom of the board is set
amitchell41 0:e8eecd4b9a3d 23 // see the Table 10. I2C Device Address Sequence in Freescale MMA8452Q pdf
amitchell41 0:e8eecd4b9a3d 24
amitchell41 0:e8eecd4b9a3d 25 #include "mbed.h"
amitchell41 0:e8eecd4b9a3d 26
amitchell41 0:e8eecd4b9a3d 27 #define MMA8452_DEBUG 1
amitchell41 0:e8eecd4b9a3d 28
amitchell41 0:e8eecd4b9a3d 29 // More info on MCU Master address can be found on section 5.10.1 of http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MMA8452Q
amitchell41 0:e8eecd4b9a3d 30 #define SA0 1
amitchell41 0:e8eecd4b9a3d 31 #if SA0
amitchell41 0:e8eecd4b9a3d 32 #define MMA8452_ADDRESS 0x3A // 0x1D<<1 // SA0 is high, 0x1C if low -
amitchell41 0:e8eecd4b9a3d 33 #else
amitchell41 0:e8eecd4b9a3d 34 #define MMA8452_ADDRESS 0x38 // 0x1C<<1
amitchell41 0:e8eecd4b9a3d 35 #endif
amitchell41 0:e8eecd4b9a3d 36
amitchell41 0:e8eecd4b9a3d 37 // Register descriptions found in section 6 of pdf
amitchell41 0:e8eecd4b9a3d 38 #define MMA8452_STATUS 0x00 // Type 'read' : Status of the data registers
amitchell41 0:e8eecd4b9a3d 39 #define MMA8452_OUT_X_MSB 0x01 // Type 'read' : x axis - MSB of 2 byte sample
amitchell41 0:e8eecd4b9a3d 40 #define MMA8452_OUT_X_LSB 0x02 // Type 'read' : x axis - LSB of 2 byte sample
amitchell41 0:e8eecd4b9a3d 41 #define MMA8452_OUT_Y_MSB 0x03 // Type 'read' : y axis - MSB of 2 byte sample
amitchell41 0:e8eecd4b9a3d 42 #define MMA8452_OUT_Y_LSB 0x04 // Type 'read' : y axis - LSB of 2 byte sample
amitchell41 0:e8eecd4b9a3d 43 #define MMA8452_OUT_Z_MSB 0x05 // Type 'read' : z axis - MSB of 2 byte sample
amitchell41 0:e8eecd4b9a3d 44 #define MMA8452_OUT_Z_LSB 0x06 // Type 'read' : z axis - LSB of 2 byte sample
amitchell41 0:e8eecd4b9a3d 45
amitchell41 0:e8eecd4b9a3d 46 // register definitions
amitchell41 0:e8eecd4b9a3d 47 #define MMA8452_XYZ_DATA_CFG 0x0E
amitchell41 0:e8eecd4b9a3d 48
amitchell41 0:e8eecd4b9a3d 49 #define MMA8452_SYSMOD 0x0B // Type 'read' : This tells you if device is active, sleep or standy 0x00=STANDBY 0x01=WAKE 0x02=SLEEP
amitchell41 0:e8eecd4b9a3d 50 #define MMA8452_WHO_AM_I 0x0D // Type 'read' : This should return the device id of 0x2A
amitchell41 0:e8eecd4b9a3d 51
amitchell41 0:e8eecd4b9a3d 52 #define MMA8452_PL_STATUS 0x10 // Type 'read' : This shows portrait landscape mode orientation
amitchell41 0:e8eecd4b9a3d 53 #define MMA8452_PL_CFG 0x11 // Type 'read/write' : This allows portrait landscape configuration
amitchell41 0:e8eecd4b9a3d 54 #define MMA8452_PL_COUNT 0x12 // Type 'read' : This is the portraint landscape debounce counter
amitchell41 0:e8eecd4b9a3d 55 #define MMA8452_PL_BF_ZCOMP 0x13 // Type 'read' :
amitchell41 0:e8eecd4b9a3d 56 #define MMA8452_PL_THS_REG 0x14 // Type 'read' :
amitchell41 0:e8eecd4b9a3d 57
amitchell41 0:e8eecd4b9a3d 58 #define MMA8452_FF_MT_CFG 0X15 // Type 'read/write' : Freefaul motion functional block configuration
amitchell41 0:e8eecd4b9a3d 59 #define MMA8452_FF_MT_SRC 0X16 // Type 'read' : Freefaul motion event source register
amitchell41 0:e8eecd4b9a3d 60 #define MMA8452_FF_MT_THS 0X17 // Type 'read' : Freefaul motion threshold register
amitchell41 0:e8eecd4b9a3d 61 #define MMA8452_FF_COUNT 0X18 // Type 'read' : Freefaul motion debouce counter
amitchell41 0:e8eecd4b9a3d 62
amitchell41 0:e8eecd4b9a3d 63 #define MMA8452_ASLP_COUNT 0x29 // Type 'read/write' : Counter settings for auto sleep
amitchell41 0:e8eecd4b9a3d 64 #define MMA8452_CTRL_REG_1 0x2A // Type 'read/write' :
amitchell41 0:e8eecd4b9a3d 65 #define MMA8452_CTRL_REG_2 0x2B // Type 'read/write' :
amitchell41 0:e8eecd4b9a3d 66 #define MMA8452_CTRL_REG_3 0x2C // Type 'read/write' :
amitchell41 0:e8eecd4b9a3d 67 #define MMA8452_CTRL_REG_4 0x2D // Type 'read/write' :
amitchell41 0:e8eecd4b9a3d 68 #define MMA8452_CTRL_REG_5 0x2E // Type 'read/write' :
amitchell41 0:e8eecd4b9a3d 69
amitchell41 0:e8eecd4b9a3d 70 // Defined in table 13 of the Freescale PDF
amitchell41 0:e8eecd4b9a3d 71 /// xxx these all need to have better names
amitchell41 0:e8eecd4b9a3d 72 #define STANDBY 0x00 // State value returned after a SYSMOD request, it can be in state STANDBY, WAKE or SLEEP
amitchell41 0:e8eecd4b9a3d 73 #define WAKE 0x01 // State value returned after a SYSMOD request, it can be in state STANDBY, WAKE or SLEEP
amitchell41 0:e8eecd4b9a3d 74 #define SLEEP 0x02 // State value returned after a SYSMOD request, it can be in state STANDBY, WAKE or SLEEP
amitchell41 0:e8eecd4b9a3d 75 #define ACTIVE 0x01 // Stage value returned and set in Control Register 1, it can be STANDBY=00, or ACTIVE=01
amitchell41 0:e8eecd4b9a3d 76
amitchell41 0:e8eecd4b9a3d 77 #define TILT_STATUS 0x03 // Tilt Status (Read only)
amitchell41 0:e8eecd4b9a3d 78 #define SRST_STATUS 0x04 // Sample Rate Status Register (Read only)
amitchell41 0:e8eecd4b9a3d 79 #define SPCNT_STATUS 0x05 // Sleep Count Register (Read/Write)
amitchell41 0:e8eecd4b9a3d 80 #define INTSU_STATUS 0x06 // Interrupt Setup Register
amitchell41 0:e8eecd4b9a3d 81 #define MODE_STATUS 0x07 // Mode Register (Read/Write)
amitchell41 0:e8eecd4b9a3d 82 #define SR_STATUS 0x08 // Auto-Wake and Active Mode Portrait/Landscape Samples per Seconds Register (Read/Write)
amitchell41 0:e8eecd4b9a3d 83 #define PDET_STATUS 0x09 // Tap/Pulse Detection Register (Read/Write)
amitchell41 0:e8eecd4b9a3d 84 #define PD_STATUS 0xA // Tap/Pulse Debounce Count Register (Read/Write)
amitchell41 0:e8eecd4b9a3d 85
amitchell41 0:e8eecd4b9a3d 86 // masks for enabling/disabling standby
amitchell41 0:e8eecd4b9a3d 87 #define MMA8452_ACTIVE_MASK 0x01
amitchell41 0:e8eecd4b9a3d 88 #define MMA8452_STANDBY_MASK 0xFE
amitchell41 0:e8eecd4b9a3d 89
amitchell41 0:e8eecd4b9a3d 90 // mask for dynamic range reading and writing
amitchell41 0:e8eecd4b9a3d 91 #define MMA8452_DYNAMIC_RANGE_MASK 0xFC
amitchell41 0:e8eecd4b9a3d 92
amitchell41 0:e8eecd4b9a3d 93 // mask and shift for data rate reading and writing
amitchell41 0:e8eecd4b9a3d 94 #define MMA8452_DATA_RATE_MASK 0xC7
amitchell41 0:e8eecd4b9a3d 95 #define MMA8452_DATA_RATE_MASK_SHIFT 0x03
amitchell41 0:e8eecd4b9a3d 96
amitchell41 0:e8eecd4b9a3d 97 // mask and shift for general reading and writing
amitchell41 0:e8eecd4b9a3d 98 #define MMA8452_WRITE_MASK 0xFE
amitchell41 0:e8eecd4b9a3d 99 #define MMA8452_READ_MASK 0x01
amitchell41 0:e8eecd4b9a3d 100
amitchell41 0:e8eecd4b9a3d 101 // mask and shift for bit depth reading and writing
amitchell41 0:e8eecd4b9a3d 102 #define MMA8452_BIT_DEPTH_MASK 0xFD
amitchell41 0:e8eecd4b9a3d 103 #define MMA8452_BIT_DEPTH_MASK_SHIFT 0x01
amitchell41 0:e8eecd4b9a3d 104
amitchell41 0:e8eecd4b9a3d 105 // status masks and shifts
amitchell41 0:e8eecd4b9a3d 106 #define MMA8452_STATUS_ZYXDR_MASK 0x08
amitchell41 0:e8eecd4b9a3d 107 #define MMA8452_STATUS_ZDR_MASK 0x04
amitchell41 0:e8eecd4b9a3d 108 #define MMA8452_STATUS_YDR_MASK 0x02
amitchell41 0:e8eecd4b9a3d 109 #define MMA8452_STATUS_XDR_MASK 0x01
amitchell41 0:e8eecd4b9a3d 110
amitchell41 0:e8eecd4b9a3d 111 /**
amitchell41 0:e8eecd4b9a3d 112 * Wrapper for the MMA8452 I2C driven accelerometer.
amitchell41 0:e8eecd4b9a3d 113 */
amitchell41 0:e8eecd4b9a3d 114 class MMA8452 {
amitchell41 0:e8eecd4b9a3d 115
amitchell41 0:e8eecd4b9a3d 116 public:
amitchell41 0:e8eecd4b9a3d 117
amitchell41 0:e8eecd4b9a3d 118 enum DynamicRange {
amitchell41 0:e8eecd4b9a3d 119 DYNAMIC_RANGE_2G=0x00,
amitchell41 0:e8eecd4b9a3d 120 DYNAMIC_RANGE_4G,
amitchell41 0:e8eecd4b9a3d 121 DYNAMIC_RANGE_8G,
amitchell41 0:e8eecd4b9a3d 122 DYNAMIC_RANGE_UNKNOWN
amitchell41 0:e8eecd4b9a3d 123 };
amitchell41 0:e8eecd4b9a3d 124
amitchell41 0:e8eecd4b9a3d 125 enum BitDepth {
amitchell41 0:e8eecd4b9a3d 126 BIT_DEPTH_12=0x00,
amitchell41 0:e8eecd4b9a3d 127 BIT_DEPTH_8, // 1 sets fast read mode, hence the inversion
amitchell41 0:e8eecd4b9a3d 128 BIT_DEPTH_UNKNOWN
amitchell41 0:e8eecd4b9a3d 129 };
amitchell41 0:e8eecd4b9a3d 130
amitchell41 0:e8eecd4b9a3d 131 enum DataRateHz {
amitchell41 0:e8eecd4b9a3d 132 RATE_800=0x00,
amitchell41 0:e8eecd4b9a3d 133 RATE_400,
amitchell41 0:e8eecd4b9a3d 134 RATE_200,
amitchell41 0:e8eecd4b9a3d 135 RATE_100,
amitchell41 0:e8eecd4b9a3d 136 RATE_50,
amitchell41 0:e8eecd4b9a3d 137 RATE_12_5,
amitchell41 0:e8eecd4b9a3d 138 RATE_6_25,
amitchell41 0:e8eecd4b9a3d 139 RATE_1_563,
amitchell41 0:e8eecd4b9a3d 140 RATE_UNKNOWN
amitchell41 0:e8eecd4b9a3d 141 };
amitchell41 0:e8eecd4b9a3d 142
amitchell41 0:e8eecd4b9a3d 143 /**
amitchell41 0:e8eecd4b9a3d 144 * Create an accelerometer object connected to the specified I2C pins.
amitchell41 0:e8eecd4b9a3d 145 *
amitchell41 0:e8eecd4b9a3d 146 * @param sda I2C data port
amitchell41 0:e8eecd4b9a3d 147 * @param scl I2C clock port
amitchell41 0:e8eecd4b9a3d 148 * @param frequency
amitchell41 0:e8eecd4b9a3d 149 *
amitchell41 0:e8eecd4b9a3d 150 */
amitchell41 0:e8eecd4b9a3d 151 MMA8452(PinName sda, PinName scl, int frequency);
amitchell41 0:e8eecd4b9a3d 152
amitchell41 0:e8eecd4b9a3d 153 /// Destructor
amitchell41 0:e8eecd4b9a3d 154 ~MMA8452();
amitchell41 0:e8eecd4b9a3d 155
amitchell41 0:e8eecd4b9a3d 156 /**
amitchell41 0:e8eecd4b9a3d 157 * Puts the MMA8452 in active mode.
amitchell41 0:e8eecd4b9a3d 158 * @return 0 on success, 1 on failure.
amitchell41 0:e8eecd4b9a3d 159 */
amitchell41 0:e8eecd4b9a3d 160 int activate();
amitchell41 0:e8eecd4b9a3d 161
amitchell41 0:e8eecd4b9a3d 162 /**
amitchell41 0:e8eecd4b9a3d 163 * Puts the MMA8452 in standby.
amitchell41 0:e8eecd4b9a3d 164 * @return 0 on success, 1 on failure.
amitchell41 0:e8eecd4b9a3d 165 */
amitchell41 0:e8eecd4b9a3d 166 int standby();
amitchell41 0:e8eecd4b9a3d 167
amitchell41 0:e8eecd4b9a3d 168 /**
amitchell41 0:e8eecd4b9a3d 169 * Read the device ID from the accelerometer (should be 0x2a)
amitchell41 0:e8eecd4b9a3d 170 *
amitchell41 0:e8eecd4b9a3d 171 * @param dst pointer to store the ID
amitchell41 0:e8eecd4b9a3d 172 * @return 0 on success, 1 on failure.
amitchell41 0:e8eecd4b9a3d 173 */
amitchell41 0:e8eecd4b9a3d 174 int getDeviceID(char* dst);
amitchell41 0:e8eecd4b9a3d 175
amitchell41 0:e8eecd4b9a3d 176 /**
amitchell41 0:e8eecd4b9a3d 177 * Read the MMA8452 status register.
amitchell41 0:e8eecd4b9a3d 178 *
amitchell41 0:e8eecd4b9a3d 179 * @param dst pointer to store the register value.
amitchell41 0:e8eecd4b9a3d 180 * @ return 0 on success, 1 on failure.
amitchell41 0:e8eecd4b9a3d 181 */
amitchell41 0:e8eecd4b9a3d 182 int getStatus(char* dst);
amitchell41 0:e8eecd4b9a3d 183
amitchell41 0:e8eecd4b9a3d 184 /**
amitchell41 0:e8eecd4b9a3d 185 * Read the raw x, y, an z registers of the MMA8452 in one operation.
amitchell41 0:e8eecd4b9a3d 186 * All three registers are read sequentially and stored in the provided buffer.
amitchell41 0:e8eecd4b9a3d 187 * The stored values are signed 2's complement left-aligned 12 or 8 bit integers.
amitchell41 0:e8eecd4b9a3d 188 *
amitchell41 0:e8eecd4b9a3d 189 * @param dst The destination buffer. Note that this needs to be 3 bytes for
amitchell41 0:e8eecd4b9a3d 190 * BIT_DEPTH_8 and 6 bytes for BIT_DEPTH_12. It is upto the caller to ensure this.
amitchell41 0:e8eecd4b9a3d 191 * @return 0 for success, and 1 for failure
amitchell41 0:e8eecd4b9a3d 192 * @sa setBitDepth
amitchell41 0:e8eecd4b9a3d 193 */
amitchell41 0:e8eecd4b9a3d 194 int readXYZRaw(char *dst);
amitchell41 0:e8eecd4b9a3d 195
amitchell41 0:e8eecd4b9a3d 196 /// Read the raw x register into the provided buffer. @sa readXYZRaw
amitchell41 0:e8eecd4b9a3d 197 int readXRaw(char *dst);
amitchell41 0:e8eecd4b9a3d 198 /// Read the raw y register into the provided buffer. @sa readXYZRaw
amitchell41 0:e8eecd4b9a3d 199 int readYRaw(char *dst);
amitchell41 0:e8eecd4b9a3d 200 /// Read the raw z register into the provided buffer. @sa readXYZRaw
amitchell41 0:e8eecd4b9a3d 201 int readZRaw(char *dst);
amitchell41 0:e8eecd4b9a3d 202
amitchell41 0:e8eecd4b9a3d 203 /**
amitchell41 0:e8eecd4b9a3d 204 * Read the x, y, and z signed counts of the MMA8452 axes.
amitchell41 0:e8eecd4b9a3d 205 *
amitchell41 0:e8eecd4b9a3d 206 * Count resolution is either 8 bits or 12 bits, and the range is either +-2G, +-4G, or +-8G
amitchell41 0:e8eecd4b9a3d 207 * depending on settings. The number of counts per G are 1024, 512, 256 for 2,4, and 8 G
amitchell41 0:e8eecd4b9a3d 208 * respectively at 12 bit resolution and 64, 32, 16 for 2, 4, and 8 G respectively at
amitchell41 0:e8eecd4b9a3d 209 * 8 bit resolution.
amitchell41 0:e8eecd4b9a3d 210 *
amitchell41 0:e8eecd4b9a3d 211 * This function queries the MMA8452 and returns the signed counts for each axes.
amitchell41 0:e8eecd4b9a3d 212 *
amitchell41 0:e8eecd4b9a3d 213 * @param x Pointer to integer to store x count
amitchell41 0:e8eecd4b9a3d 214 * @param y Pointer to integer to store y count
amitchell41 0:e8eecd4b9a3d 215 * @param z Pointer to integer to store z count
amitchell41 0:e8eecd4b9a3d 216 * @return 0 on success, 1 on failure.
amitchell41 0:e8eecd4b9a3d 217 */
amitchell41 0:e8eecd4b9a3d 218 int readXYZCounts(int *x, int *y, int *z);
amitchell41 0:e8eecd4b9a3d 219
amitchell41 0:e8eecd4b9a3d 220 /// Read the x axes signed count. @sa readXYZCounts
amitchell41 0:e8eecd4b9a3d 221 int readXCount(int *x);
amitchell41 0:e8eecd4b9a3d 222 /// Read the y axes signed count. @sa readXYZCounts
amitchell41 0:e8eecd4b9a3d 223 int readYCount(int *y);
amitchell41 0:e8eecd4b9a3d 224 /// Read the z axes signed count. @sa readXYZCounts
amitchell41 0:e8eecd4b9a3d 225 int readZCount(int *z);
amitchell41 0:e8eecd4b9a3d 226
amitchell41 0:e8eecd4b9a3d 227 /**
amitchell41 0:e8eecd4b9a3d 228 * Read the x, y, and z accelerations measured in G.
amitchell41 0:e8eecd4b9a3d 229 *
amitchell41 0:e8eecd4b9a3d 230 * The measurement resolution is controlled via setBitDepth which can
amitchell41 0:e8eecd4b9a3d 231 * be 8 or 12, and by setDynamicRange, which can be +-2G, +-4G, or +-8G.
amitchell41 0:e8eecd4b9a3d 232 *
amitchell41 0:e8eecd4b9a3d 233 * @param x A pointer to the double to store the x acceleration in.
amitchell41 0:e8eecd4b9a3d 234 * @param y A pointer to the double to store the y acceleration in.
amitchell41 0:e8eecd4b9a3d 235 * @param z A pointer to the double to store the z acceleration in.
amitchell41 0:e8eecd4b9a3d 236 *
amitchell41 0:e8eecd4b9a3d 237 * @return 0 on success, 1 on failure.
amitchell41 0:e8eecd4b9a3d 238 */
amitchell41 0:e8eecd4b9a3d 239 int readXYZGravity(double *x, double *y, double *z);
amitchell41 0:e8eecd4b9a3d 240
amitchell41 0:e8eecd4b9a3d 241 /// Read the x gravity in G into the provided double pointer. @sa readXYZGravity
amitchell41 0:e8eecd4b9a3d 242 int readXGravity(double *x);
amitchell41 0:e8eecd4b9a3d 243 /// Read the y gravity in G into the provided double pointer. @sa readXYZGravity
amitchell41 0:e8eecd4b9a3d 244 int readYGravity(double *y);
amitchell41 0:e8eecd4b9a3d 245 /// Read the z gravity in G into the provided double pointer. @sa readXYZGravity
amitchell41 0:e8eecd4b9a3d 246 int readZGravity(double *z);
amitchell41 0:e8eecd4b9a3d 247
amitchell41 0:e8eecd4b9a3d 248 /// Returns 1 if data has been internally sampled (is available) for all axes since last read, 0 otherwise.
amitchell41 0:e8eecd4b9a3d 249 int isXYZReady();
amitchell41 0:e8eecd4b9a3d 250 /// Returns 1 if data has been internally sampled (is available) for the x-axis since last read, 0 otherwise.
amitchell41 0:e8eecd4b9a3d 251 int isXReady();
amitchell41 0:e8eecd4b9a3d 252 /// Returns 1 if data has been internally sampled (is available) for the y-axis since last read, 0 otherwise.
amitchell41 0:e8eecd4b9a3d 253 int isYReady();
amitchell41 0:e8eecd4b9a3d 254 /// Returns 1 if data has been internally sampled (is available) for the z-axis since last read, 0 otherwise.
amitchell41 0:e8eecd4b9a3d 255 int isZReady();
amitchell41 0:e8eecd4b9a3d 256
amitchell41 0:e8eecd4b9a3d 257 /**
amitchell41 0:e8eecd4b9a3d 258 * Reads a single byte from the specified MMA8452 register.
amitchell41 0:e8eecd4b9a3d 259 *
amitchell41 0:e8eecd4b9a3d 260 * @param addr The internal register address.
amitchell41 0:e8eecd4b9a3d 261 * @param dst The destination buffer address.
amitchell41 0:e8eecd4b9a3d 262 * @return 1 on success, 0 on failure.
amitchell41 0:e8eecd4b9a3d 263 */
amitchell41 0:e8eecd4b9a3d 264 int readRegister(char addr, char *dst);
amitchell41 0:e8eecd4b9a3d 265
amitchell41 0:e8eecd4b9a3d 266 /**
amitchell41 0:e8eecd4b9a3d 267 * Reads n bytes from the specified MMA8452 register.
amitchell41 0:e8eecd4b9a3d 268 *
amitchell41 0:e8eecd4b9a3d 269 * @param addr The internal register address.
amitchell41 0:e8eecd4b9a3d 270 * @param dst The destination buffer address.
amitchell41 0:e8eecd4b9a3d 271 * @param nbytes The number of bytes to read.
amitchell41 0:e8eecd4b9a3d 272 * @return 1 on success, 0 on failure.
amitchell41 0:e8eecd4b9a3d 273 */
amitchell41 0:e8eecd4b9a3d 274 int readRegister(char addr, char *dst, int nbytes);
amitchell41 0:e8eecd4b9a3d 275
amitchell41 0:e8eecd4b9a3d 276 /**
amitchell41 0:e8eecd4b9a3d 277 * Write to the specified MMA8452 register.
amitchell41 0:e8eecd4b9a3d 278 *
amitchell41 0:e8eecd4b9a3d 279 * @param addr The internal register address
amitchell41 0:e8eecd4b9a3d 280 * @param data Data byte to write
amitchell41 0:e8eecd4b9a3d 281 */
amitchell41 0:e8eecd4b9a3d 282 int writeRegister(char addr, char data);
amitchell41 0:e8eecd4b9a3d 283
amitchell41 0:e8eecd4b9a3d 284 /**
amitchell41 0:e8eecd4b9a3d 285 * Write a data buffer to the specified MMA8452 register.
amitchell41 0:e8eecd4b9a3d 286 *
amitchell41 0:e8eecd4b9a3d 287 * @param addr The internal register address
amitchell41 0:e8eecd4b9a3d 288 * @param data Pointer to data buffer to write
amitchell41 0:e8eecd4b9a3d 289 * @param nbytes The length of the data buffer to write
amitchell41 0:e8eecd4b9a3d 290 */
amitchell41 0:e8eecd4b9a3d 291 int writeRegister(char addr, char *data, int nbytes);
amitchell41 0:e8eecd4b9a3d 292
amitchell41 0:e8eecd4b9a3d 293 int setDynamicRange(DynamicRange range, int toggleActivation=1);
amitchell41 0:e8eecd4b9a3d 294 int setBitDepth(BitDepth depth, int toggleActivation=1);
amitchell41 0:e8eecd4b9a3d 295 int setDataRate(DataRateHz dataRate, int toggleActivation=1);
amitchell41 0:e8eecd4b9a3d 296
amitchell41 0:e8eecd4b9a3d 297 DynamicRange getDynamicRange();
amitchell41 0:e8eecd4b9a3d 298 DataRateHz getDataRate();
amitchell41 0:e8eecd4b9a3d 299 BitDepth getBitDepth();
amitchell41 0:e8eecd4b9a3d 300
amitchell41 0:e8eecd4b9a3d 301 #ifdef MMA8452_DEBUG
amitchell41 0:e8eecd4b9a3d 302 void debugRegister(char reg);
amitchell41 0:e8eecd4b9a3d 303 #endif
amitchell41 0:e8eecd4b9a3d 304
amitchell41 0:e8eecd4b9a3d 305 private:
amitchell41 0:e8eecd4b9a3d 306 /**
amitchell41 0:e8eecd4b9a3d 307 * Reads the specified register, applies the mask with logical AND, logical ORs the value
amitchell41 0:e8eecd4b9a3d 308 * and writes back the result to the register. If toggleActivation is set to true then the
amitchell41 0:e8eecd4b9a3d 309 * device is put in standby before the operation, and activated at the end.
amitchell41 0:e8eecd4b9a3d 310 * Setting it to false is useful for setting options on a device that you want to keep in
amitchell41 0:e8eecd4b9a3d 311 * standby.
amitchell41 0:e8eecd4b9a3d 312 */
amitchell41 0:e8eecd4b9a3d 313 int maskAndApplyRegister(char reg, char mask, char value, int toggleActivation);
amitchell41 0:e8eecd4b9a3d 314
amitchell41 0:e8eecd4b9a3d 315 /// Reads the specified register, applies the mask with logical AND, and writes the result back.
amitchell41 0:e8eecd4b9a3d 316 int logicalANDRegister(char addr, char mask);
amitchell41 0:e8eecd4b9a3d 317 /// Reads the specified register, applies the mask with logical OR, and writes the result back.
amitchell41 0:e8eecd4b9a3d 318 int logicalORRegister(char addr, char mask);
amitchell41 0:e8eecd4b9a3d 319 /// Reads the specified register, applies the mask with logical XOR, and writes the result back.
amitchell41 0:e8eecd4b9a3d 320 int logicalXORRegister(char addr, char mask);
amitchell41 0:e8eecd4b9a3d 321
amitchell41 0:e8eecd4b9a3d 322 /// Converts the 12-bit two's complement number in buf to a signed integer. Returns the integer.
amitchell41 0:e8eecd4b9a3d 323 int twelveBitToSigned(char *buf);
amitchell41 0:e8eecd4b9a3d 324 /// Converts the 8-bit two's complement number in buf to a signed integer. Returns the integer.
amitchell41 0:e8eecd4b9a3d 325 int eightBitToSigned(char *buf);
amitchell41 0:e8eecd4b9a3d 326
amitchell41 0:e8eecd4b9a3d 327 /// Converts a count to a gravity using the supplied countsPerG. Returns the gravity.
amitchell41 0:e8eecd4b9a3d 328 double convertCountToGravity(int count, int countsPerG);
amitchell41 0:e8eecd4b9a3d 329
amitchell41 0:e8eecd4b9a3d 330 /// Reads the register at addr, applies the mask with logical AND, and returns the result.
amitchell41 0:e8eecd4b9a3d 331 char getMaskedRegister(int addr, char mask);
amitchell41 0:e8eecd4b9a3d 332
amitchell41 0:e8eecd4b9a3d 333 /// Get the counts per G for the current settings of bit depth and dynamic range.
amitchell41 0:e8eecd4b9a3d 334 int getCountsPerG();
amitchell41 0:e8eecd4b9a3d 335
amitchell41 0:e8eecd4b9a3d 336 I2C _i2c;
amitchell41 0:e8eecd4b9a3d 337 int _frequency;
amitchell41 0:e8eecd4b9a3d 338 int _readAddress;
amitchell41 0:e8eecd4b9a3d 339 int _writeAddress;
amitchell41 0:e8eecd4b9a3d 340
amitchell41 0:e8eecd4b9a3d 341 BitDepth _bitDepth;
amitchell41 0:e8eecd4b9a3d 342 DynamicRange _dynamicRange;
amitchell41 0:e8eecd4b9a3d 343 };