Hexmodal SX1276lib

Dependents:   LoRaWAN-hello-world_Class_C_Anish

Committer:
GregCr
Date:
Thu Sep 04 14:03:20 2014 +0000
Revision:
6:e7f02929cd3d
Parent:
4:f0ce52e94d3f
Child:
7:2b555111463f
Added support for FHSS

Who changed what in which revision?

UserRevisionLine numberNew contents of line
GregCr 0:e6ceb13d2d05 1 /*
GregCr 0:e6ceb13d2d05 2 / _____) _ | |
GregCr 0:e6ceb13d2d05 3 ( (____ _____ ____ _| |_ _____ ____| |__
GregCr 0:e6ceb13d2d05 4 \____ \| ___ | (_ _) ___ |/ ___) _ \
GregCr 0:e6ceb13d2d05 5 _____) ) ____| | | || |_| ____( (___| | | |
GregCr 0:e6ceb13d2d05 6 (______/|_____)_|_|_| \__)_____)\____)_| |_|
GregCr 0:e6ceb13d2d05 7 ( C )2014 Semtech
GregCr 0:e6ceb13d2d05 8
GregCr 0:e6ceb13d2d05 9 Description: -
GregCr 0:e6ceb13d2d05 10
GregCr 0:e6ceb13d2d05 11 License: Revised BSD License, see LICENSE.TXT file include in the project
GregCr 0:e6ceb13d2d05 12
GregCr 0:e6ceb13d2d05 13 Maintainers: Miguel Luis, Gregory Cristian and Nicolas Huguenin
GregCr 0:e6ceb13d2d05 14 */
GregCr 0:e6ceb13d2d05 15 #ifndef __SX1276_HAL_H__
GregCr 0:e6ceb13d2d05 16 #define __SX1276_HAL_H__
GregCr 0:e6ceb13d2d05 17 #include "sx1276.h"
GregCr 0:e6ceb13d2d05 18
GregCr 0:e6ceb13d2d05 19 /*!
GregCr 0:e6ceb13d2d05 20 * Actual implementation of a SX1276 radio, includes some modifications to make it compatible with the MB1 LAS board
GregCr 0:e6ceb13d2d05 21 */
GregCr 0:e6ceb13d2d05 22 class SX1276MB1xAS : public SX1276
GregCr 0:e6ceb13d2d05 23 {
GregCr 0:e6ceb13d2d05 24 protected:
GregCr 0:e6ceb13d2d05 25 /*!
GregCr 0:e6ceb13d2d05 26 * Antenna switch GPIO pins objects
GregCr 0:e6ceb13d2d05 27 */
GregCr 1:f979673946c0 28 DigitalInOut antSwitch;
GregCr 0:e6ceb13d2d05 29
GregCr 0:e6ceb13d2d05 30 DigitalIn fake;
GregCr 0:e6ceb13d2d05 31
GregCr 0:e6ceb13d2d05 32 private:
GregCr 0:e6ceb13d2d05 33 static const RadioRegisters_t RadioRegsInit[];
GregCr 0:e6ceb13d2d05 34
GregCr 0:e6ceb13d2d05 35 public:
GregCr 6:e7f02929cd3d 36 SX1276MB1xAS( void ( *txDone )( ), void ( *txTimeout ) ( ), void ( *rxDone ) ( uint8_t *payload, uint16_t size, int8_t rssi, int8_t snr ),
GregCr 6:e7f02929cd3d 37 void ( *rxTimeout ) ( ), void ( *rxError ) ( ), void ( *fhssChangeChannel ) ( uint8_t channelIndex ),
GregCr 0:e6ceb13d2d05 38 PinName mosi, PinName miso, PinName sclk, PinName nss, PinName reset,
GregCr 0:e6ceb13d2d05 39 PinName dio0, PinName dio1, PinName dio2, PinName dio3, PinName dio4, PinName dio5,
GregCr 0:e6ceb13d2d05 40 PinName antSwitch );
GregCr 6:e7f02929cd3d 41 SX1276MB1xAS( void ( *txDone )( ), void ( *txTimeout ) ( ), void ( *rxDone ) ( uint8_t *payload, uint16_t size, int8_t rssi, int8_t snr ), void ( *rxTimeout ) ( ), void ( *rxError ) ( ), void ( *fhssChangeChannel ) ( uint8_t channelIndex ) );
GregCr 0:e6ceb13d2d05 42 virtual ~SX1276MB1xAS( ) { };
GregCr 0:e6ceb13d2d05 43
GregCr 0:e6ceb13d2d05 44 protected:
GregCr 0:e6ceb13d2d05 45 /*!
GregCr 0:e6ceb13d2d05 46 * @brief Initializes the radio I/Os pins interface
GregCr 0:e6ceb13d2d05 47 */
GregCr 0:e6ceb13d2d05 48 virtual void IoInit( void );
GregCr 0:e6ceb13d2d05 49
GregCr 0:e6ceb13d2d05 50 /*!
GregCr 0:e6ceb13d2d05 51 * @brief Initializes the radio registers
GregCr 0:e6ceb13d2d05 52 */
GregCr 0:e6ceb13d2d05 53 virtual void RadioRegistersInit( );
GregCr 0:e6ceb13d2d05 54
GregCr 0:e6ceb13d2d05 55 /*!
GregCr 0:e6ceb13d2d05 56 * @brief Initializes the radio SPI
GregCr 0:e6ceb13d2d05 57 */
GregCr 0:e6ceb13d2d05 58 virtual void SpiInit( void );
GregCr 0:e6ceb13d2d05 59
GregCr 0:e6ceb13d2d05 60 /*!
GregCr 0:e6ceb13d2d05 61 * @brief Initializes DIO IRQ handlers
GregCr 0:e6ceb13d2d05 62 *
GregCr 0:e6ceb13d2d05 63 * @param [IN] irqHandlers Array containing the IRQ callback functions
GregCr 0:e6ceb13d2d05 64 */
GregCr 0:e6ceb13d2d05 65 virtual void IoIrqInit( DioIrqHandler *irqHandlers );
GregCr 0:e6ceb13d2d05 66
GregCr 0:e6ceb13d2d05 67 /*!
GregCr 0:e6ceb13d2d05 68 * @brief De-initializes the radio I/Os pins interface.
GregCr 0:e6ceb13d2d05 69 *
GregCr 0:e6ceb13d2d05 70 * \remark Useful when going in MCU lowpower modes
GregCr 0:e6ceb13d2d05 71 */
GregCr 0:e6ceb13d2d05 72 virtual void IoDeInit( void );
GregCr 0:e6ceb13d2d05 73
GregCr 0:e6ceb13d2d05 74 /*!
GregCr 0:e6ceb13d2d05 75 * @brief Gets the board PA selection configuration
GregCr 0:e6ceb13d2d05 76 *
GregCr 0:e6ceb13d2d05 77 * @param [IN] channel Channel frequency in Hz
GregCr 0:e6ceb13d2d05 78 * @retval PaSelect RegPaConfig PaSelect value
GregCr 0:e6ceb13d2d05 79 */
GregCr 0:e6ceb13d2d05 80 virtual uint8_t GetPaSelect( uint32_t channel );
GregCr 0:e6ceb13d2d05 81
GregCr 0:e6ceb13d2d05 82 /*!
GregCr 0:e6ceb13d2d05 83 * @brief Set the RF Switch I/Os pins in Low Power mode
GregCr 0:e6ceb13d2d05 84 *
GregCr 0:e6ceb13d2d05 85 * @param [IN] status enable or disable
GregCr 0:e6ceb13d2d05 86 */
GregCr 0:e6ceb13d2d05 87 virtual void SetAntSwLowPower( bool status );
GregCr 0:e6ceb13d2d05 88
GregCr 0:e6ceb13d2d05 89 /*!
GregCr 0:e6ceb13d2d05 90 * @brief Initializes the RF Switch I/Os pins interface
GregCr 0:e6ceb13d2d05 91 */
GregCr 0:e6ceb13d2d05 92 virtual void AntSwInit( void );
GregCr 0:e6ceb13d2d05 93
GregCr 0:e6ceb13d2d05 94 /*!
GregCr 0:e6ceb13d2d05 95 * @brief De-initializes the RF Switch I/Os pins interface
GregCr 0:e6ceb13d2d05 96 *
GregCr 0:e6ceb13d2d05 97 * \remark Needed to decrease the power consumption in MCU lowpower modes
GregCr 0:e6ceb13d2d05 98 */
GregCr 0:e6ceb13d2d05 99 virtual void AntSwDeInit( void );
GregCr 0:e6ceb13d2d05 100
GregCr 0:e6ceb13d2d05 101 /*!
GregCr 0:e6ceb13d2d05 102 * @brief Controls the antena switch if necessary.
GregCr 0:e6ceb13d2d05 103 *
GregCr 0:e6ceb13d2d05 104 * \remark see errata note
GregCr 0:e6ceb13d2d05 105 *
GregCr 0:e6ceb13d2d05 106 * @param [IN] rxTx [1: Tx, 0: Rx]
GregCr 0:e6ceb13d2d05 107 */
GregCr 0:e6ceb13d2d05 108 virtual void SetAntSw( uint8_t rxTx );
GregCr 0:e6ceb13d2d05 109
GregCr 0:e6ceb13d2d05 110 public:
GregCr 0:e6ceb13d2d05 111 /*!
GregCr 2:5eb3066446dd 112 * @brief Detect the board connected by reading the value of the antenna switch pin
GregCr 2:5eb3066446dd 113 */
GregCr 2:5eb3066446dd 114 virtual uint8_t DetectBoardType( void );
GregCr 2:5eb3066446dd 115
GregCr 2:5eb3066446dd 116 /*!
GregCr 0:e6ceb13d2d05 117 * @brief Checks if the given RF frequency is supported by the hardware
GregCr 0:e6ceb13d2d05 118 *
GregCr 0:e6ceb13d2d05 119 * @param [IN] frequency RF frequency to be checked
GregCr 0:e6ceb13d2d05 120 * @retval isSupported [true: supported, false: unsupported]
GregCr 0:e6ceb13d2d05 121 */
GregCr 0:e6ceb13d2d05 122 virtual bool CheckRfFrequency( uint32_t frequency );
GregCr 0:e6ceb13d2d05 123
GregCr 0:e6ceb13d2d05 124 /*!
GregCr 0:e6ceb13d2d05 125 * @brief Writes the radio register at the specified address
GregCr 0:e6ceb13d2d05 126 *
GregCr 0:e6ceb13d2d05 127 * @param [IN]: addr Register address
GregCr 0:e6ceb13d2d05 128 * @param [IN]: data New register value
GregCr 0:e6ceb13d2d05 129 */
GregCr 0:e6ceb13d2d05 130 virtual void Write ( uint8_t addr, uint8_t data ) ;
GregCr 0:e6ceb13d2d05 131
GregCr 0:e6ceb13d2d05 132 /*!
GregCr 0:e6ceb13d2d05 133 * @brief Reads the radio register at the specified address
GregCr 0:e6ceb13d2d05 134 *
GregCr 0:e6ceb13d2d05 135 * @param [IN]: addr Register address
GregCr 0:e6ceb13d2d05 136 * @retval data Register value
GregCr 0:e6ceb13d2d05 137 */
GregCr 0:e6ceb13d2d05 138 virtual uint8_t Read ( uint8_t addr ) ;
GregCr 0:e6ceb13d2d05 139
GregCr 0:e6ceb13d2d05 140 /*!
GregCr 0:e6ceb13d2d05 141 * @brief Writes multiple radio registers starting at address
GregCr 0:e6ceb13d2d05 142 *
GregCr 0:e6ceb13d2d05 143 * @param [IN] addr First Radio register address
GregCr 0:e6ceb13d2d05 144 * @param [IN] buffer Buffer containing the new register's values
GregCr 0:e6ceb13d2d05 145 * @param [IN] size Number of registers to be written
GregCr 0:e6ceb13d2d05 146 */
GregCr 0:e6ceb13d2d05 147 virtual void Write( uint8_t addr, uint8_t *buffer, uint8_t size ) ;
GregCr 0:e6ceb13d2d05 148
GregCr 0:e6ceb13d2d05 149 /*!
GregCr 0:e6ceb13d2d05 150 * @brief Reads multiple radio registers starting at address
GregCr 0:e6ceb13d2d05 151 *
GregCr 0:e6ceb13d2d05 152 * @param [IN] addr First Radio register address
GregCr 0:e6ceb13d2d05 153 * @param [OUT] buffer Buffer where to copy the registers data
GregCr 0:e6ceb13d2d05 154 * @param [IN] size Number of registers to be read
GregCr 0:e6ceb13d2d05 155 */
GregCr 0:e6ceb13d2d05 156 virtual void Read ( uint8_t addr, uint8_t *buffer, uint8_t size ) ;
GregCr 0:e6ceb13d2d05 157
GregCr 0:e6ceb13d2d05 158 /*!
GregCr 0:e6ceb13d2d05 159 * @brief Writes the buffer contents to the SX1276 FIFO
GregCr 0:e6ceb13d2d05 160 *
GregCr 0:e6ceb13d2d05 161 * @param [IN] buffer Buffer containing data to be put on the FIFO.
GregCr 0:e6ceb13d2d05 162 * @param [IN] size Number of bytes to be written to the FIFO
GregCr 0:e6ceb13d2d05 163 */
GregCr 0:e6ceb13d2d05 164 virtual void WriteFifo( uint8_t *buffer, uint8_t size ) ;
GregCr 0:e6ceb13d2d05 165
GregCr 0:e6ceb13d2d05 166 /*!
GregCr 0:e6ceb13d2d05 167 * @brief Reads the contents of the SX1276 FIFO
GregCr 0:e6ceb13d2d05 168 *
GregCr 0:e6ceb13d2d05 169 * @param [OUT] buffer Buffer where to copy the FIFO read data.
GregCr 0:e6ceb13d2d05 170 * @param [IN] size Number of bytes to be read from the FIFO
GregCr 0:e6ceb13d2d05 171 */
GregCr 0:e6ceb13d2d05 172 virtual void ReadFifo( uint8_t *buffer, uint8_t size ) ;
GregCr 0:e6ceb13d2d05 173
GregCr 0:e6ceb13d2d05 174 /*!
GregCr 0:e6ceb13d2d05 175 * @brief Reset the SX1276
GregCr 0:e6ceb13d2d05 176 */
GregCr 0:e6ceb13d2d05 177 virtual void Reset( void );
GregCr 0:e6ceb13d2d05 178 };
GregCr 0:e6ceb13d2d05 179
GregCr 0:e6ceb13d2d05 180 #endif // __SX1276_HAL_H__