Amir Chaudhary / SX1276Lib

Hexmodal SX1276lib

Dependents:   LoRaWAN-hello-world_Class_C_Anish

sx1276/sx1276-hal.h@22:7f3aab69cca9, 2015-11-26 (annotated)

Committer:
mluis
Date:
Thu Nov 26 16:55:15 2015 +0000
Revision:
22:7f3aab69cca9
Parent:
21:2e496deb7858
Child:
25:3778e6204cc1
Child:
26:d09a8ef807e2
Synchronized the drivers with GitHub version.; Mainly added errata note recommendations

Who changed what in which revision?

UserRevisionLine numberNew contents of line
GregCr 0:e6ceb13d2d05 1 /*
GregCr 0:e6ceb13d2d05 2 / _____) _ | |
GregCr 0:e6ceb13d2d05 3 ( (____ _____ ____ _| |_ _____ ____| |__
GregCr 0:e6ceb13d2d05 4 \____ \| ___ | (_ _) ___ |/ ___) _ \
GregCr 0:e6ceb13d2d05 5 _____) ) ____| | | || |_| ____( (___| | | |
GregCr 0:e6ceb13d2d05 6 (______/|_____)_|_|_| \__)_____)\____)_| |_|
mluis 22:7f3aab69cca9 7 (C) 2014 Semtech
GregCr 0:e6ceb13d2d05 8
GregCr 0:e6ceb13d2d05 9 Description: -
GregCr 0:e6ceb13d2d05 10
GregCr 0:e6ceb13d2d05 11 License: Revised BSD License, see LICENSE.TXT file include in the project
GregCr 0:e6ceb13d2d05 12
GregCr 0:e6ceb13d2d05 13 Maintainers: Miguel Luis, Gregory Cristian and Nicolas Huguenin
GregCr 0:e6ceb13d2d05 14 */
GregCr 0:e6ceb13d2d05 15 #ifndef __SX1276_HAL_H__
GregCr 0:e6ceb13d2d05 16 #define __SX1276_HAL_H__
GregCr 0:e6ceb13d2d05 17 #include "sx1276.h"
GregCr 0:e6ceb13d2d05 18
mluis 22:7f3aab69cca9 19 /*!
mluis 22:7f3aab69cca9 20 * \brief Radio hardware registers initialization definition
mluis 22:7f3aab69cca9 21 *
mluis 22:7f3aab69cca9 22 * \remark Can be automatically generated by the SX1276 GUI (not yet implemented)
mluis 22:7f3aab69cca9 23 */
mluis 22:7f3aab69cca9 24 #define RADIO_INIT_REGISTERS_VALUE \
mluis 22:7f3aab69cca9 25 { \
mluis 22:7f3aab69cca9 26 { MODEM_FSK , REG_LNA , 0x23 },\
mluis 22:7f3aab69cca9 27 { MODEM_FSK , REG_RXCONFIG , 0x1E },\
mluis 22:7f3aab69cca9 28 { MODEM_FSK , REG_RSSICONFIG , 0xD2 },\
mluis 22:7f3aab69cca9 29 { MODEM_FSK , REG_PREAMBLEDETECT , 0xAA },\
mluis 22:7f3aab69cca9 30 { MODEM_FSK , REG_OSC , 0x07 },\
mluis 22:7f3aab69cca9 31 { MODEM_FSK , REG_SYNCCONFIG , 0x12 },\
mluis 22:7f3aab69cca9 32 { MODEM_FSK , REG_SYNCVALUE1 , 0xC1 },\
mluis 22:7f3aab69cca9 33 { MODEM_FSK , REG_SYNCVALUE2 , 0x94 },\
mluis 22:7f3aab69cca9 34 { MODEM_FSK , REG_SYNCVALUE3 , 0xC1 },\
mluis 22:7f3aab69cca9 35 { MODEM_FSK , REG_PACKETCONFIG1 , 0xD8 },\
mluis 22:7f3aab69cca9 36 { MODEM_FSK , REG_FIFOTHRESH , 0x8F },\
mluis 22:7f3aab69cca9 37 { MODEM_FSK , REG_IMAGECAL , 0x02 },\
mluis 22:7f3aab69cca9 38 { MODEM_FSK , REG_DIOMAPPING1 , 0x00 },\
mluis 22:7f3aab69cca9 39 { MODEM_FSK , REG_DIOMAPPING2 , 0x30 },\
mluis 22:7f3aab69cca9 40 { MODEM_LORA, REG_LR_PAYLOADMAXLENGTH, 0x40 },\
mluis 22:7f3aab69cca9 41 } \
mluis 22:7f3aab69cca9 42
GregCr 0:e6ceb13d2d05 43 /*!
GregCr 0:e6ceb13d2d05 44 * Actual implementation of a SX1276 radio, includes some modifications to make it compatible with the MB1 LAS board
GregCr 0:e6ceb13d2d05 45 */
GregCr 0:e6ceb13d2d05 46 class SX1276MB1xAS : public SX1276
GregCr 0:e6ceb13d2d05 47 {
GregCr 0:e6ceb13d2d05 48 protected:
GregCr 0:e6ceb13d2d05 49 /*!
GregCr 0:e6ceb13d2d05 50 * Antenna switch GPIO pins objects
GregCr 0:e6ceb13d2d05 51 */
GregCr 1:f979673946c0 52 DigitalInOut antSwitch;
GregCr 0:e6ceb13d2d05 53
GregCr 0:e6ceb13d2d05 54 DigitalIn fake;
GregCr 0:e6ceb13d2d05 55
GregCr 0:e6ceb13d2d05 56 private:
GregCr 0:e6ceb13d2d05 57 static const RadioRegisters_t RadioRegsInit[];
GregCr 0:e6ceb13d2d05 58
GregCr 0:e6ceb13d2d05 59 public:
mluis 21:2e496deb7858 60 SX1276MB1xAS( RadioEvents_t *events,
GregCr 0:e6ceb13d2d05 61 PinName mosi, PinName miso, PinName sclk, PinName nss, PinName reset,
GregCr 0:e6ceb13d2d05 62 PinName dio0, PinName dio1, PinName dio2, PinName dio3, PinName dio4, PinName dio5,
GregCr 0:e6ceb13d2d05 63 PinName antSwitch );
mluis 22:7f3aab69cca9 64
mluis 22:7f3aab69cca9 65 SX1276MB1xAS( RadioEvents_t *events );
mluis 22:7f3aab69cca9 66
GregCr 0:e6ceb13d2d05 67 virtual ~SX1276MB1xAS( ) { };
GregCr 0:e6ceb13d2d05 68
GregCr 0:e6ceb13d2d05 69 protected:
GregCr 0:e6ceb13d2d05 70 /*!
GregCr 0:e6ceb13d2d05 71 * @brief Initializes the radio I/Os pins interface
GregCr 0:e6ceb13d2d05 72 */
GregCr 0:e6ceb13d2d05 73 virtual void IoInit( void );
GregCr 0:e6ceb13d2d05 74
GregCr 0:e6ceb13d2d05 75 /*!
GregCr 0:e6ceb13d2d05 76 * @brief Initializes the radio registers
GregCr 0:e6ceb13d2d05 77 */
GregCr 0:e6ceb13d2d05 78 virtual void RadioRegistersInit( );
GregCr 0:e6ceb13d2d05 79
GregCr 0:e6ceb13d2d05 80 /*!
GregCr 0:e6ceb13d2d05 81 * @brief Initializes the radio SPI
GregCr 0:e6ceb13d2d05 82 */
GregCr 0:e6ceb13d2d05 83 virtual void SpiInit( void );
GregCr 0:e6ceb13d2d05 84
GregCr 0:e6ceb13d2d05 85 /*!
GregCr 0:e6ceb13d2d05 86 * @brief Initializes DIO IRQ handlers
GregCr 0:e6ceb13d2d05 87 *
GregCr 0:e6ceb13d2d05 88 * @param [IN] irqHandlers Array containing the IRQ callback functions
GregCr 0:e6ceb13d2d05 89 */
GregCr 0:e6ceb13d2d05 90 virtual void IoIrqInit( DioIrqHandler *irqHandlers );
GregCr 0:e6ceb13d2d05 91
GregCr 0:e6ceb13d2d05 92 /*!
GregCr 0:e6ceb13d2d05 93 * @brief De-initializes the radio I/Os pins interface.
GregCr 0:e6ceb13d2d05 94 *
GregCr 0:e6ceb13d2d05 95 * \remark Useful when going in MCU lowpower modes
GregCr 0:e6ceb13d2d05 96 */
GregCr 0:e6ceb13d2d05 97 virtual void IoDeInit( void );
GregCr 0:e6ceb13d2d05 98
GregCr 0:e6ceb13d2d05 99 /*!
GregCr 0:e6ceb13d2d05 100 * @brief Gets the board PA selection configuration
GregCr 0:e6ceb13d2d05 101 *
GregCr 0:e6ceb13d2d05 102 * @param [IN] channel Channel frequency in Hz
GregCr 0:e6ceb13d2d05 103 * @retval PaSelect RegPaConfig PaSelect value
GregCr 0:e6ceb13d2d05 104 */
GregCr 0:e6ceb13d2d05 105 virtual uint8_t GetPaSelect( uint32_t channel );
GregCr 0:e6ceb13d2d05 106
GregCr 0:e6ceb13d2d05 107 /*!
GregCr 0:e6ceb13d2d05 108 * @brief Set the RF Switch I/Os pins in Low Power mode
GregCr 0:e6ceb13d2d05 109 *
GregCr 0:e6ceb13d2d05 110 * @param [IN] status enable or disable
GregCr 0:e6ceb13d2d05 111 */
GregCr 0:e6ceb13d2d05 112 virtual void SetAntSwLowPower( bool status );
GregCr 0:e6ceb13d2d05 113
GregCr 0:e6ceb13d2d05 114 /*!
GregCr 0:e6ceb13d2d05 115 * @brief Initializes the RF Switch I/Os pins interface
GregCr 0:e6ceb13d2d05 116 */
GregCr 0:e6ceb13d2d05 117 virtual void AntSwInit( void );
GregCr 0:e6ceb13d2d05 118
GregCr 0:e6ceb13d2d05 119 /*!
GregCr 0:e6ceb13d2d05 120 * @brief De-initializes the RF Switch I/Os pins interface
GregCr 0:e6ceb13d2d05 121 *
GregCr 0:e6ceb13d2d05 122 * \remark Needed to decrease the power consumption in MCU lowpower modes
GregCr 0:e6ceb13d2d05 123 */
GregCr 0:e6ceb13d2d05 124 virtual void AntSwDeInit( void );
GregCr 0:e6ceb13d2d05 125
GregCr 0:e6ceb13d2d05 126 /*!
GregCr 0:e6ceb13d2d05 127 * @brief Controls the antena switch if necessary.
GregCr 0:e6ceb13d2d05 128 *
GregCr 0:e6ceb13d2d05 129 * \remark see errata note
GregCr 0:e6ceb13d2d05 130 *
GregCr 0:e6ceb13d2d05 131 * @param [IN] rxTx [1: Tx, 0: Rx]
GregCr 0:e6ceb13d2d05 132 */
GregCr 0:e6ceb13d2d05 133 virtual void SetAntSw( uint8_t rxTx );
GregCr 0:e6ceb13d2d05 134
GregCr 0:e6ceb13d2d05 135 public:
GregCr 0:e6ceb13d2d05 136 /*!
GregCr 2:5eb3066446dd 137 * @brief Detect the board connected by reading the value of the antenna switch pin
GregCr 2:5eb3066446dd 138 */
GregCr 2:5eb3066446dd 139 virtual uint8_t DetectBoardType( void );
GregCr 2:5eb3066446dd 140
GregCr 2:5eb3066446dd 141 /*!
GregCr 0:e6ceb13d2d05 142 * @brief Checks if the given RF frequency is supported by the hardware
GregCr 0:e6ceb13d2d05 143 *
GregCr 0:e6ceb13d2d05 144 * @param [IN] frequency RF frequency to be checked
GregCr 0:e6ceb13d2d05 145 * @retval isSupported [true: supported, false: unsupported]
GregCr 0:e6ceb13d2d05 146 */
GregCr 0:e6ceb13d2d05 147 virtual bool CheckRfFrequency( uint32_t frequency );
GregCr 0:e6ceb13d2d05 148
GregCr 0:e6ceb13d2d05 149 /*!
GregCr 0:e6ceb13d2d05 150 * @brief Writes the radio register at the specified address
GregCr 0:e6ceb13d2d05 151 *
GregCr 0:e6ceb13d2d05 152 * @param [IN]: addr Register address
GregCr 0:e6ceb13d2d05 153 * @param [IN]: data New register value
GregCr 0:e6ceb13d2d05 154 */
GregCr 0:e6ceb13d2d05 155 virtual void Write ( uint8_t addr, uint8_t data ) ;
GregCr 0:e6ceb13d2d05 156
GregCr 0:e6ceb13d2d05 157 /*!
GregCr 0:e6ceb13d2d05 158 * @brief Reads the radio register at the specified address
GregCr 0:e6ceb13d2d05 159 *
GregCr 0:e6ceb13d2d05 160 * @param [IN]: addr Register address
GregCr 0:e6ceb13d2d05 161 * @retval data Register value
GregCr 0:e6ceb13d2d05 162 */
GregCr 0:e6ceb13d2d05 163 virtual uint8_t Read ( uint8_t addr ) ;
GregCr 0:e6ceb13d2d05 164
GregCr 0:e6ceb13d2d05 165 /*!
GregCr 0:e6ceb13d2d05 166 * @brief Writes multiple radio registers starting at address
GregCr 0:e6ceb13d2d05 167 *
GregCr 0:e6ceb13d2d05 168 * @param [IN] addr First Radio register address
GregCr 0:e6ceb13d2d05 169 * @param [IN] buffer Buffer containing the new register's values
GregCr 0:e6ceb13d2d05 170 * @param [IN] size Number of registers to be written
GregCr 0:e6ceb13d2d05 171 */
GregCr 0:e6ceb13d2d05 172 virtual void Write( uint8_t addr, uint8_t *buffer, uint8_t size ) ;
GregCr 0:e6ceb13d2d05 173
GregCr 0:e6ceb13d2d05 174 /*!
GregCr 0:e6ceb13d2d05 175 * @brief Reads multiple radio registers starting at address
GregCr 0:e6ceb13d2d05 176 *
GregCr 0:e6ceb13d2d05 177 * @param [IN] addr First Radio register address
GregCr 0:e6ceb13d2d05 178 * @param [OUT] buffer Buffer where to copy the registers data
GregCr 0:e6ceb13d2d05 179 * @param [IN] size Number of registers to be read
GregCr 0:e6ceb13d2d05 180 */
GregCr 0:e6ceb13d2d05 181 virtual void Read ( uint8_t addr, uint8_t *buffer, uint8_t size ) ;
GregCr 0:e6ceb13d2d05 182
GregCr 0:e6ceb13d2d05 183 /*!
GregCr 0:e6ceb13d2d05 184 * @brief Writes the buffer contents to the SX1276 FIFO
GregCr 0:e6ceb13d2d05 185 *
GregCr 0:e6ceb13d2d05 186 * @param [IN] buffer Buffer containing data to be put on the FIFO.
GregCr 0:e6ceb13d2d05 187 * @param [IN] size Number of bytes to be written to the FIFO
GregCr 0:e6ceb13d2d05 188 */
GregCr 0:e6ceb13d2d05 189 virtual void WriteFifo( uint8_t *buffer, uint8_t size ) ;
GregCr 0:e6ceb13d2d05 190
GregCr 0:e6ceb13d2d05 191 /*!
GregCr 0:e6ceb13d2d05 192 * @brief Reads the contents of the SX1276 FIFO
GregCr 0:e6ceb13d2d05 193 *
GregCr 0:e6ceb13d2d05 194 * @param [OUT] buffer Buffer where to copy the FIFO read data.
GregCr 0:e6ceb13d2d05 195 * @param [IN] size Number of bytes to be read from the FIFO
GregCr 0:e6ceb13d2d05 196 */
GregCr 0:e6ceb13d2d05 197 virtual void ReadFifo( uint8_t *buffer, uint8_t size ) ;
GregCr 0:e6ceb13d2d05 198
GregCr 0:e6ceb13d2d05 199 /*!
GregCr 0:e6ceb13d2d05 200 * @brief Reset the SX1276
GregCr 0:e6ceb13d2d05 201 */
GregCr 0:e6ceb13d2d05 202 virtual void Reset( void );
GregCr 0:e6ceb13d2d05 203 };
GregCr 0:e6ceb13d2d05 204
GregCr 0:e6ceb13d2d05 205 #endif // __SX1276_HAL_H__