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main.cpp@0:882187e7521f, 2018-12-27 (annotated)
- Committer:
- amirchaudhary
- Date:
- Thu Dec 27 18:57:19 2018 +0000
- Revision:
- 0:882187e7521f
Successfully set the RCC->CR Register
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| amirchaudhary | 0:882187e7521f | 1 | #include "mbed.h" |
| amirchaudhary | 0:882187e7521f | 2 | |
| amirchaudhary | 0:882187e7521f | 3 | //------------------------------------ |
| amirchaudhary | 0:882187e7521f | 4 | // Hyperterminal configuration |
| amirchaudhary | 0:882187e7521f | 5 | // 9600 bauds, 8-bit data, no parity |
| amirchaudhary | 0:882187e7521f | 6 | //------------------------------------ |
| amirchaudhary | 0:882187e7521f | 7 | |
| amirchaudhary | 0:882187e7521f | 8 | Serial pc(SERIAL_TX, SERIAL_RX); |
| amirchaudhary | 0:882187e7521f | 9 | |
| amirchaudhary | 0:882187e7521f | 10 | // DigitalOut myled(LED1); |
| amirchaudhary | 0:882187e7521f | 11 | //DigitalOut myled(D8); |
| amirchaudhary | 0:882187e7521f | 12 | |
| amirchaudhary | 0:882187e7521f | 13 | uint8_t MY_SetSysClock_PLL_HSE(uint8_t bypass) |
| amirchaudhary | 0:882187e7521f | 14 | { |
| amirchaudhary | 0:882187e7521f | 15 | RCC_ClkInitTypeDef RCC_ClkInitStruct; |
| amirchaudhary | 0:882187e7521f | 16 | RCC_OscInitTypeDef RCC_OscInitStruct; |
| amirchaudhary | 0:882187e7521f | 17 | RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit; |
| amirchaudhary | 0:882187e7521f | 18 | |
| amirchaudhary | 0:882187e7521f | 19 | /* Used to gain time after DeepSleep in case HSI is used */ |
| amirchaudhary | 0:882187e7521f | 20 | if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) { |
| amirchaudhary | 0:882187e7521f | 21 | return 0; |
| amirchaudhary | 0:882187e7521f | 22 | } |
| amirchaudhary | 0:882187e7521f | 23 | |
| amirchaudhary | 0:882187e7521f | 24 | /* The voltage scaling allows optimizing the power consumption when the device is |
| amirchaudhary | 0:882187e7521f | 25 | clocked below the maximum system frequency, to update the voltage scaling value |
| amirchaudhary | 0:882187e7521f | 26 | regarding system frequency refer to product datasheet. */ |
| amirchaudhary | 0:882187e7521f | 27 | __PWR_CLK_ENABLE(); |
| amirchaudhary | 0:882187e7521f | 28 | __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); |
| amirchaudhary | 0:882187e7521f | 29 | |
| amirchaudhary | 0:882187e7521f | 30 | /* Enable HSE and HSI48 oscillators and activate PLL with HSE as source */ |
| amirchaudhary | 0:882187e7521f | 31 | RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_HSI48; |
| amirchaudhary | 0:882187e7521f | 32 | if (bypass == 0) { |
| amirchaudhary | 0:882187e7521f | 33 | RCC_OscInitStruct.HSEState = RCC_HSE_ON; /* External 8 MHz xtal on OSC_IN/OSC_OUT */ |
| amirchaudhary | 0:882187e7521f | 34 | } else { |
| amirchaudhary | 0:882187e7521f | 35 | RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; /* External 8 MHz clock on OSC_IN */ |
| amirchaudhary | 0:882187e7521f | 36 | } |
| amirchaudhary | 0:882187e7521f | 37 | RCC_OscInitStruct.HSIState = RCC_HSI_OFF; |
| amirchaudhary | 0:882187e7521f | 38 | RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; /* For USB and RNG clock */ |
| amirchaudhary | 0:882187e7521f | 39 | // PLLCLK = (8 MHz * 8)/2 = 32 MHz |
| amirchaudhary | 0:882187e7521f | 40 | RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; |
| amirchaudhary | 0:882187e7521f | 41 | RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; |
| amirchaudhary | 0:882187e7521f | 42 | RCC_OscInitStruct.PLL.PLLMUL = RCC_PLLMUL_8; |
| amirchaudhary | 0:882187e7521f | 43 | RCC_OscInitStruct.PLL.PLLDIV = RCC_PLLDIV_2; |
| amirchaudhary | 0:882187e7521f | 44 | if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { |
| amirchaudhary | 0:882187e7521f | 45 | return 0; // FAIL |
| amirchaudhary | 0:882187e7521f | 46 | } |
| amirchaudhary | 0:882187e7521f | 47 | |
| amirchaudhary | 0:882187e7521f | 48 | /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ |
| amirchaudhary | 0:882187e7521f | 49 | RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); |
| amirchaudhary | 0:882187e7521f | 50 | RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 32 MHz |
| amirchaudhary | 0:882187e7521f | 51 | RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 32 MHz |
| amirchaudhary | 0:882187e7521f | 52 | RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; // 32 MHz |
| amirchaudhary | 0:882187e7521f | 53 | RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 32 MHz |
| amirchaudhary | 0:882187e7521f | 54 | if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) { |
| amirchaudhary | 0:882187e7521f | 55 | return 0; // FAIL |
| amirchaudhary | 0:882187e7521f | 56 | } |
| amirchaudhary | 0:882187e7521f | 57 | |
| amirchaudhary | 0:882187e7521f | 58 | RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; |
| amirchaudhary | 0:882187e7521f | 59 | RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; |
| amirchaudhary | 0:882187e7521f | 60 | if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { |
| amirchaudhary | 0:882187e7521f | 61 | return 0; // FAIL |
| amirchaudhary | 0:882187e7521f | 62 | } |
| amirchaudhary | 0:882187e7521f | 63 | |
| amirchaudhary | 0:882187e7521f | 64 | return 1; // OK |
| amirchaudhary | 0:882187e7521f | 65 | } |
| amirchaudhary | 0:882187e7521f | 66 | |
| amirchaudhary | 0:882187e7521f | 67 | int main() |
| amirchaudhary | 0:882187e7521f | 68 | { |
| amirchaudhary | 0:882187e7521f | 69 | // RCC->CR|= (uint32_t)0x03030300U; |
| amirchaudhary | 0:882187e7521f | 70 | |
| amirchaudhary | 0:882187e7521f | 71 | //RCC->CR &= (uint32_t)0xFCFCFCFFU; |
| amirchaudhary | 0:882187e7521f | 72 | |
| amirchaudhary | 0:882187e7521f | 73 | //RCC->CR |= RCC_CR_CSSHSEON | RCC_CR_HSEBYP | RCC_CR_HSEON; |
| amirchaudhary | 0:882187e7521f | 74 | |
| amirchaudhary | 0:882187e7521f | 75 | //RCC->CR |= RCC_CR_CSSHSEON | RCC_CR_HSEON; |
| amirchaudhary | 0:882187e7521f | 76 | |
| amirchaudhary | 0:882187e7521f | 77 | // RCC->CR &= (uint32_t)0xFEF4FFFFU; |
| amirchaudhary | 0:882187e7521f | 78 | // RCC->CR |= (uint32_t)0x00000100U; |
| amirchaudhary | 0:882187e7521f | 79 | |
| amirchaudhary | 0:882187e7521f | 80 | |
| amirchaudhary | 0:882187e7521f | 81 | HAL_RCC_DeInit(); |
| amirchaudhary | 0:882187e7521f | 82 | // RCC->CR |= RCC_CR_CSSHSEON | RCC_CR_HSEON; |
| amirchaudhary | 0:882187e7521f | 83 | // while(1 |
| amirchaudhary | 0:882187e7521f | 84 | MY_SetSysClock_PLL_HSE(0); |
| amirchaudhary | 0:882187e7521f | 85 | |
| amirchaudhary | 0:882187e7521f | 86 | pc.printf("\n 2SystemCoreClock of PCB= %d, %08X", SystemCoreClock, RCC->CR); |
| amirchaudhary | 0:882187e7521f | 87 | |
| amirchaudhary | 0:882187e7521f | 88 | |
| amirchaudhary | 0:882187e7521f | 89 | } |