Revision 0:57d5f9a58ad1, committed 2020-03-31

Comitter:

amirchaudhary

Date:

Tue Mar 31 10:17:51 2020 +0000

Commit message:

Watchdog Test code --> IWDG Register Enable

Changed in this revision

diff -r 000000000000 -r 57d5f9a58ad1 main.cpp
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/main.cpp	Tue Mar 31 10:17:51 2020 +0000
@@ -0,0 +1,147 @@
+#include "mbed.h"
+#include "stm32l0xx_hal_iwdg.h"
+
+/*------------------------------------------------------------------------------
+Before to use this example, ensure that you an hyperterminal installed on your
+computer. More info here: https://developer.mbed.org/handbook/Terminals
+
+The default serial comm port uses the SERIAL_TX and SERIAL_RX pins (see their
+definition in the PinNames.h file).
+
+The default serial configuration in this case is 9600 bauds, 8-bit data, no parity
+
+If you want to change the baudrate for example, you have to redeclare the
+serial object in your code:
+
+Serial pc(SERIAL_TX, SERIAL_RX);
+
+Then, you can modify the baudrate and print like this:
+
+pc.baud(115200);
+pc.printf("Hello World !\n");
+------------------------------------------------------------------------------*/
+DigitalOut led(D7);
+DigitalOut myBlueLed(PA_11);
+DigitalOut relayPin(PB_10);
+
+int MY_SetSysClock_PLL_HSE(void)
+{
+    RCC_ClkInitTypeDef RCC_ClkInitStruct;
+    RCC_OscInitTypeDef RCC_OscInitStruct;
+
+    /* Enable HSE and activate PLL with HSE as source */
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+    RCC_OscInitStruct.HSEState       = RCC_HSE_ON; /* External 8 MHz xtal on OSC_IN/OSC_OUT */
+
+    // PLLCLK = (8 MHz * 8)/2 = 32 MHz
+    RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
+    RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSE;
+    RCC_OscInitStruct.PLL.PLLMUL          = RCC_PLLMUL_8;
+    RCC_OscInitStruct.PLL.PLLDIV          = RCC_PLLDIV_2;
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+        return (-1); // FAIL
+    }
+
+    /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
+    RCC_ClkInitStruct.ClockType      = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
+    RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK; // 32 MHz
+    RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1;         // 32 MHz
+    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;           // 32 MHz
+    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;           // 32 MHz
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
+        return (-2); // FAIL
+    }
+
+    /* Enable HSE and activate PLL with HSE as source */
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_MSI;
+    RCC_OscInitStruct.HSIState       = RCC_HSI_OFF;
+    RCC_OscInitStruct.MSIState       = RCC_MSI_OFF;
+    RCC_OscInitStruct.HSI48State     = RCC_HSI48_OFF;
+    RCC_OscInitStruct.PLL.PLLState   = RCC_PLL_NONE;
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+        return (-3); // FAIL
+    }
+        
+    return 0; // OK
+}
+
+void my_patch(void)
+{
+    int retVal;
+    
+    // Put device into default clock, i.e using MSI = 2MHz
+    HAL_RCC_DeInit();
+    
+    // Enable HSE clock
+    retVal = MY_SetSysClock_PLL_HSE();
+    if(retVal< 0)
+    {
+        //pc.printf("Failed to start HSE, ERR= %d\r\n", retVal);
+        
+        // indicate error
+        while(1)
+        {
+            led = !led;
+            wait(0.2);
+        }
+    }    
+}
+
+int main()
+{
+    Serial pc(SERIAL_TX, SERIAL_RX);
+    pc.baud(115200);
+
+    IWDG_HandleTypeDef wd;
+    wd.Instance = IWDG;
+    wd.Init.Prescaler = IWDG_PRESCALER_256; //About 32s
+    wd.Init.Reload = 0x0FFF;
+    HAL_IWDG_Init(&wd);
+    pc.printf("initialized watchdog CSR= %0X\r\n", RCC->CSR);
+
+
+    pc.printf("mbed-os-rev: %d.%d.%d   lib-rev: %d\r\n", \
+            MBED_MAJOR_VERSION, MBED_MINOR_VERSION,MBED_PATCH_VERSION,MBED_LIBRARY_VERSION);
+    pc.printf("BUILD= %s, SysClock= %d, RCC= %0X CSR= %0X\r\n", __TIME__, SystemCoreClock, RCC->CR, RCC->CSR);
+    my_patch();
+     pc.printf("NEW BUILD= %s, SysClock= %d, RCC= %0X CSR= %0X\r\n", __TIME__, SystemCoreClock, RCC->CR, RCC->CSR);
+    wait(3);
+    
+    int i = 1;
+
+
+        myBlueLed = 1; // LED is ON    
+        wait(0.5); // 500 ms
+        myBlueLed = 0; // LED is ON  
+        wait(0.5); // 500 ms
+        relayPin = 1; // LED is ON
+        wait(0.5); // 500 ms
+        relayPin = 0; // LED is ON
+        wait(0.5); // 500 ms
+
+                
+    pc.printf("Hello World 2 !\r\n");
+
+    while(1) {
+        wait(1); // 1 second
+        led = !led;
+        relayPin = !relayPin; // LED is ON
+      
+        
+        
+        if (i == 15) { 
+            
+            //https://github.com/ARMmbed/mbed-os/blob/mbed_lib_rev164/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_iwdg.c
+            /* Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers by writing 0x5555 in KR 
+            *  This is not done in HAL_IWDG_Refresh() (I THINK SO :->)
+            */
+            IWDG_ENABLE_WRITE_ACCESS(&wd); 
+            
+            HAL_IWDG_Refresh(&wd);
+            pc.printf("Fed the dog\r\n");
+        }
+        pc.printf("This program runs since %d seconds.\r\n", i++);
+    }
+
+    pc.printf("should never reach here\n");
+}

diff -r 000000000000 -r 57d5f9a58ad1 mbed.bld
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/mbed.bld	Tue Mar 31 10:17:51 2020 +0000
@@ -0,0 +1,1 @@
+https://os.mbed.com/users/mbed_official/code/mbed/builds/3a7713b1edbc
\ No newline at end of file