Ruprecht Altenburger / Library_Misc

2nd try

Dependents:   cuboid_balance

EncoderCounter.cpp@3:29602f4ade5c, 2021-02-25 (annotated)

Committer:
altb2
Date:
Thu Feb 25 20:28:16 2021 +0000
Revision:
3:29602f4ade5c
Parent:
0:72b60c5271cc 
First commit of Mirror actuato, still under construction, pins should be ok, next: check path planner;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
altb2 0:72b60c5271cc 1 /*
altb2 0:72b60c5271cc 2 * EncoderCounter.cpp
altb2 0:72b60c5271cc 3 * Copyright (c) 2017, ZHAW
altb2 0:72b60c5271cc 4 * All rights reserved.
altb2 0:72b60c5271cc 5 */
altb2 0:72b60c5271cc 6
altb2 0:72b60c5271cc 7 #include "EncoderCounter.h"
altb2 0:72b60c5271cc 8
altb2 0:72b60c5271cc 9 using namespace std;
altb2 0:72b60c5271cc 10
altb2 0:72b60c5271cc 11 /**
altb2 0:72b60c5271cc 12 * Creates and initializes the driver to read the quadrature
altb2 0:72b60c5271cc 13 * encoder counter of the STM32 microcontroller.
altb2 0:72b60c5271cc 14 * @param a the input pin for the channel A.
altb2 0:72b60c5271cc 15 * @param b the input pin for the channel B.
altb2 0:72b60c5271cc 16 */
altb2 0:72b60c5271cc 17 EncoderCounter::EncoderCounter(PinName a, PinName b) {
altb2 0:72b60c5271cc 18
altb2 0:72b60c5271cc 19 // check pins
altb2 0:72b60c5271cc 20
altb2 0:72b60c5271cc 21 if ((a == PA_6) && (b == PC_7)) {
altb2 0:72b60c5271cc 22
altb2 0:72b60c5271cc 23 // pinmap OK for TIM3 CH1 and CH2
altb2 0:72b60c5271cc 24
altb2 0:72b60c5271cc 25 TIM = TIM3;
altb2 0:72b60c5271cc 26
altb2 0:72b60c5271cc 27 // configure reset and clock control registers
altb2 0:72b60c5271cc 28
altb2 0:72b60c5271cc 29 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; // manually enable port C (port A enabled by mbed library)
altb2 0:72b60c5271cc 30
altb2 0:72b60c5271cc 31 // configure general purpose I/O registers
altb2 0:72b60c5271cc 32
altb2 0:72b60c5271cc 33 GPIOA->MODER &= ~GPIO_MODER_MODER6; // reset port A6
altb2 0:72b60c5271cc 34 GPIOA->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port A6
altb2 0:72b60c5271cc 35 GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port A6
altb2 0:72b60c5271cc 36 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down
altb2 0:72b60c5271cc 37 GPIOA->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port A6
altb2 0:72b60c5271cc 38 GPIOA->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port A6
altb2 0:72b60c5271cc 39
altb2 0:72b60c5271cc 40 GPIOC->MODER &= ~GPIO_MODER_MODER7; // reset port C7
altb2 0:72b60c5271cc 41 GPIOC->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port C7
altb2 0:72b60c5271cc 42 GPIOC->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port C7
altb2 0:72b60c5271cc 43 GPIOC->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down
altb2 0:72b60c5271cc 44 GPIOC->AFR[0] &= ~0xF0000000; // reset alternate function of port C7
altb2 0:72b60c5271cc 45 GPIOC->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port C7
altb2 0:72b60c5271cc 46
altb2 0:72b60c5271cc 47 // configure reset and clock control registers
altb2 0:72b60c5271cc 48
altb2 0:72b60c5271cc 49 RCC->APB1RSTR |= RCC_APB1RSTR_TIM3RST; //reset TIM3 controller
altb2 0:72b60c5271cc 50 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM3RST;
altb2 0:72b60c5271cc 51
altb2 0:72b60c5271cc 52 RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; // TIM3 clock enable
altb2 0:72b60c5271cc 53
altb2 0:72b60c5271cc 54 } else if ((a == PB_6) && (b == PB_7)) {
altb2 0:72b60c5271cc 55
altb2 0:72b60c5271cc 56 // pinmap OK for TIM4 CH1 and CH2
altb2 0:72b60c5271cc 57
altb2 0:72b60c5271cc 58 TIM = TIM4;
altb2 0:72b60c5271cc 59
altb2 0:72b60c5271cc 60 // configure reset and clock control registers
altb2 0:72b60c5271cc 61
altb2 0:72b60c5271cc 62 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; // manually enable port B (port A enabled by mbed library)
altb2 0:72b60c5271cc 63
altb2 0:72b60c5271cc 64 // configure general purpose I/O registers
altb2 0:72b60c5271cc 65
altb2 0:72b60c5271cc 66 GPIOB->MODER &= ~GPIO_MODER_MODER6; // reset port B6
altb2 0:72b60c5271cc 67 GPIOB->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port B6
altb2 0:72b60c5271cc 68 GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port B6
altb2 0:72b60c5271cc 69 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down
altb2 0:72b60c5271cc 70 GPIOB->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port B6
altb2 0:72b60c5271cc 71 GPIOB->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port B6
altb2 0:72b60c5271cc 72
altb2 0:72b60c5271cc 73 GPIOB->MODER &= ~GPIO_MODER_MODER7; // reset port B7
altb2 0:72b60c5271cc 74 GPIOB->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port B7
altb2 0:72b60c5271cc 75 GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port B7
altb2 0:72b60c5271cc 76 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down
altb2 0:72b60c5271cc 77 GPIOB->AFR[0] &= ~0xF0000000; // reset alternate function of port B7
altb2 0:72b60c5271cc 78 GPIOB->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port B7
altb2 0:72b60c5271cc 79
altb2 0:72b60c5271cc 80 // configure reset and clock control registers
altb2 0:72b60c5271cc 81
altb2 0:72b60c5271cc 82 RCC->APB1RSTR |= RCC_APB1RSTR_TIM4RST; //reset TIM4 controller
altb2 0:72b60c5271cc 83 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM4RST;
altb2 0:72b60c5271cc 84
altb2 0:72b60c5271cc 85 RCC->APB1ENR |= RCC_APB1ENR_TIM4EN; // TIM4 clock enable
altb2 0:72b60c5271cc 86
altb2 0:72b60c5271cc 87 } else {
altb2 0:72b60c5271cc 88
altb2 0:72b60c5271cc 89 printf("pinmap not found for peripheral\n");
altb2 0:72b60c5271cc 90 }
altb2 0:72b60c5271cc 91
altb2 0:72b60c5271cc 92 // configure general purpose timer 3 or 4
altb2 0:72b60c5271cc 93
altb2 0:72b60c5271cc 94 TIM->CR1 = 0x0000; // counter disable
altb2 0:72b60c5271cc 95 TIM->CR2 = 0x0000; // reset master mode selection
altb2 0:72b60c5271cc 96 TIM->SMCR = TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0; // counting on both TI1 & TI2 edges
altb2 0:72b60c5271cc 97 TIM->CCMR1 = TIM_CCMR1_CC2S_0 | TIM_CCMR1_CC1S_0;
altb2 0:72b60c5271cc 98 TIM->CCMR2 = 0x0000; // reset capture mode register 2
altb2 0:72b60c5271cc 99 TIM->CCER = TIM_CCER_CC2E | TIM_CCER_CC1E;
altb2 0:72b60c5271cc 100 TIM->CNT = 0x0000; // reset counter value
altb2 0:72b60c5271cc 101 TIM->ARR = 0xFFFF; // auto reload register
altb2 0:72b60c5271cc 102 TIM->CR1 = TIM_CR1_CEN; // counter enable
altb2 0:72b60c5271cc 103 }
altb2 0:72b60c5271cc 104
altb2 0:72b60c5271cc 105 EncoderCounter::~EncoderCounter() {}
altb2 0:72b60c5271cc 106
altb2 0:72b60c5271cc 107 /**
altb2 0:72b60c5271cc 108 * Resets the counter value to zero.
altb2 0:72b60c5271cc 109 */
altb2 0:72b60c5271cc 110 void EncoderCounter::reset() {
altb2 0:72b60c5271cc 111
altb2 0:72b60c5271cc 112 TIM->CNT = 0x0000;
altb2 0:72b60c5271cc 113 }
altb2 0:72b60c5271cc 114
altb2 0:72b60c5271cc 115 /**
altb2 0:72b60c5271cc 116 * Resets the counter value to a given offset value.
altb2 0:72b60c5271cc 117 * @param offset the offset value to reset the counter to.
altb2 0:72b60c5271cc 118 */
altb2 0:72b60c5271cc 119 void EncoderCounter::reset(short offset) {
altb2 0:72b60c5271cc 120
altb2 0:72b60c5271cc 121 TIM->CNT = -offset;
altb2 0:72b60c5271cc 122 }
altb2 0:72b60c5271cc 123
altb2 0:72b60c5271cc 124 /**
altb2 0:72b60c5271cc 125 * Reads the quadrature encoder counter value.
altb2 0:72b60c5271cc 126 * @return the quadrature encoder counter as a signed 16-bit integer value.
altb2 0:72b60c5271cc 127 */
altb2 0:72b60c5271cc 128 short EncoderCounter::read() {
altb2 0:72b60c5271cc 129
altb2 0:72b60c5271cc 130 return (short)(-TIM->CNT);
altb2 0:72b60c5271cc 131 }
altb2 0:72b60c5271cc 132
altb2 0:72b60c5271cc 133 /**
altb2 0:72b60c5271cc 134 * The empty operator is a shorthand notation of the <code>read()</code> method.
altb2 0:72b60c5271cc 135 */
altb2 0:72b60c5271cc 136 EncoderCounter::operator short() {
altb2 0:72b60c5271cc 137
altb2 0:72b60c5271cc 138 return read();
altb2 0:72b60c5271cc 139 }