//EE 202 hm2 //This is a program built for the mbed2 monitor mode //This code has been tested and should be function, if you has any problem, //please mail me.
Dependencies: 202hm2_slave mbed
Fork of 202hm2_slave by
main.cpp@0:7c4f7de16626, 2014-03-13 (annotated)
- Committer:
- allonq
- Date:
- Thu Mar 13 21:27:49 2014 +0000
- Revision:
- 0:7c4f7de16626
- Child:
- 1:76a206e19490
fdf
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
allonq | 0:7c4f7de16626 | 1 | //this is a program built for the slave mbed(bed1) |
allonq | 0:7c4f7de16626 | 2 | #include "mbed.h" |
allonq | 0:7c4f7de16626 | 3 | #include "MKL46Z4.h" |
allonq | 0:7c4f7de16626 | 4 | |
allonq | 0:7c4f7de16626 | 5 | #define buffer_size 9 |
allonq | 0:7c4f7de16626 | 6 | DigitalOut LED(LED_RED); |
allonq | 0:7c4f7de16626 | 7 | Serial pc(USBTX,USBRX); |
allonq | 0:7c4f7de16626 | 8 | |
allonq | 0:7c4f7de16626 | 9 | Serial uart(PTE0, PTE1); |
allonq | 0:7c4f7de16626 | 10 | static int loop_num=0; |
allonq | 0:7c4f7de16626 | 11 | int state=0; |
allonq | 0:7c4f7de16626 | 12 | int buffered=0; |
allonq | 0:7c4f7de16626 | 13 | uint32_t T2=0; |
allonq | 0:7c4f7de16626 | 14 | uint32_t T3=0; |
allonq | 0:7c4f7de16626 | 15 | int delay=0; |
allonq | 0:7c4f7de16626 | 16 | uint32_t mod=0; |
allonq | 0:7c4f7de16626 | 17 | char buffer[buffer_size]; |
allonq | 0:7c4f7de16626 | 18 | int buff=0; |
allonq | 0:7c4f7de16626 | 19 | uint32_t TIME(){return loop_num*mod+TPM0->CNT;} |
allonq | 0:7c4f7de16626 | 20 | |
allonq | 0:7c4f7de16626 | 21 | |
allonq | 0:7c4f7de16626 | 22 | void sycronize(){ |
allonq | 0:7c4f7de16626 | 23 | switch(state){ |
allonq | 0:7c4f7de16626 | 24 | case 0:{buff=0; |
allonq | 0:7c4f7de16626 | 25 | pc.printf("state0\n"); |
allonq | 0:7c4f7de16626 | 26 | while(uart.readable()&& buff<4){ |
allonq | 0:7c4f7de16626 | 27 | buffer[buff]=uart.getc();buff++;} |
allonq | 0:7c4f7de16626 | 28 | |
allonq | 0:7c4f7de16626 | 29 | pc.printf("0=%d\n",buffer[0]); |
allonq | 0:7c4f7de16626 | 30 | pc.printf("1=%d\n",buffer[1]); |
allonq | 0:7c4f7de16626 | 31 | pc.printf("2=%d\n",buffer[2]); |
allonq | 0:7c4f7de16626 | 32 | pc.printf("3=%d\n",buffer[3]); |
allonq | 0:7c4f7de16626 | 33 | T2=TIME(); |
allonq | 0:7c4f7de16626 | 34 | mod=((int)buffer[3])<<24+((int)buffer[2])<<16+((int)buffer[1])<<8+((int)buffer[0]); |
allonq | 0:7c4f7de16626 | 35 | pc.printf("mod=%d",mod); |
allonq | 0:7c4f7de16626 | 36 | pc.printf("\n"); |
allonq | 0:7c4f7de16626 | 37 | TPM0->MOD=mod; |
allonq | 0:7c4f7de16626 | 38 | state++;break;}//sending a 9 char command |
allonq | 0:7c4f7de16626 | 39 | case 1: { |
allonq | 0:7c4f7de16626 | 40 | T3=TIME(); |
allonq | 0:7c4f7de16626 | 41 | char* tmp=(char*)&T2; |
allonq | 0:7c4f7de16626 | 42 | pc.printf("state1\n"); |
allonq | 0:7c4f7de16626 | 43 | uart.putc((*tmp)); |
allonq | 0:7c4f7de16626 | 44 | uart.putc((*(tmp+1))); |
allonq | 0:7c4f7de16626 | 45 | uart.putc((*(tmp+2))); |
allonq | 0:7c4f7de16626 | 46 | uart.putc((*(tmp+3))); |
allonq | 0:7c4f7de16626 | 47 | state++;break; |
allonq | 0:7c4f7de16626 | 48 | }// send T2 value |
allonq | 0:7c4f7de16626 | 49 | case 2:{ |
allonq | 0:7c4f7de16626 | 50 | |
allonq | 0:7c4f7de16626 | 51 | char* tmp=(char*)&T3; |
allonq | 0:7c4f7de16626 | 52 | uart.putc((*tmp)); |
allonq | 0:7c4f7de16626 | 53 | uart.putc((*(tmp+1))); |
allonq | 0:7c4f7de16626 | 54 | uart.putc((*(tmp+2))); |
allonq | 0:7c4f7de16626 | 55 | uart.putc((*(tmp+3))); |
allonq | 0:7c4f7de16626 | 56 | state++;break; |
allonq | 0:7c4f7de16626 | 57 | }//send T3 |
allonq | 0:7c4f7de16626 | 58 | case 3:{ |
allonq | 0:7c4f7de16626 | 59 | pc.printf("wait for lanch state=%d\n",state); |
allonq | 0:7c4f7de16626 | 60 | buffer[0]=uart.getc(); |
allonq | 0:7c4f7de16626 | 61 | buffer[1]=uart.getc(); |
allonq | 0:7c4f7de16626 | 62 | buffer[2]=uart.getc(); |
allonq | 0:7c4f7de16626 | 63 | buffer[3]=uart.getc(); |
allonq | 0:7c4f7de16626 | 64 | |
allonq | 0:7c4f7de16626 | 65 | loop_num=0; |
allonq | 0:7c4f7de16626 | 66 | TPM0->CNT=0x0; |
allonq | 0:7c4f7de16626 | 67 | TPM0->SC=0x00000048; |
allonq | 0:7c4f7de16626 | 68 | NVIC_DisableIRQ(TPM0_IRQn); |
allonq | 0:7c4f7de16626 | 69 | state++; |
allonq | 0:7c4f7de16626 | 70 | break;//luanch |
allonq | 0:7c4f7de16626 | 71 | } |
allonq | 0:7c4f7de16626 | 72 | } |
allonq | 0:7c4f7de16626 | 73 | } |
allonq | 0:7c4f7de16626 | 74 | |
allonq | 0:7c4f7de16626 | 75 | void TPM0_IRQHandler(void){ |
allonq | 0:7c4f7de16626 | 76 | //if((TPM0->SC & 0x0080)==0x0080){ |
allonq | 0:7c4f7de16626 | 77 | if(LED){LED=0;} |
allonq | 0:7c4f7de16626 | 78 | else {LED=1;loop_num++;} |
allonq | 0:7c4f7de16626 | 79 | //pc.printf("MOD=%d",TPM0->MOD); |
allonq | 0:7c4f7de16626 | 80 | //pc.printf("Global_time=%d",loop_num); |
allonq | 0:7c4f7de16626 | 81 | //pc.printf(": %d\n",TPM0->CNT); |
allonq | 0:7c4f7de16626 | 82 | TPM0->SC|= 0x000000c8; |
allonq | 0:7c4f7de16626 | 83 | NVIC_ClearPendingIRQ(TPM0_IRQn); |
allonq | 0:7c4f7de16626 | 84 | //pc.printf("SC_after=%d\n",TPM0->SC); |
allonq | 0:7c4f7de16626 | 85 | //}//pc.printf("count=%d",TPM0->CNT); |
allonq | 0:7c4f7de16626 | 86 | return; |
allonq | 0:7c4f7de16626 | 87 | } |
allonq | 0:7c4f7de16626 | 88 | |
allonq | 0:7c4f7de16626 | 89 | |
allonq | 0:7c4f7de16626 | 90 | |
allonq | 0:7c4f7de16626 | 91 | void Syc(){ |
allonq | 0:7c4f7de16626 | 92 | state=0; |
allonq | 0:7c4f7de16626 | 93 | NVIC_DisableIRQ(TPM0_IRQn); |
allonq | 0:7c4f7de16626 | 94 | NVIC_ClearPendingIRQ(TPM0_IRQn); |
allonq | 0:7c4f7de16626 | 95 | pc.printf("set=%d\n",state); |
allonq | 0:7c4f7de16626 | 96 | while(state<4){sycronize();} |
allonq | 0:7c4f7de16626 | 97 | |
allonq | 0:7c4f7de16626 | 98 | } |
allonq | 0:7c4f7de16626 | 99 | void Initial(){ |
allonq | 0:7c4f7de16626 | 100 | LED=1; |
allonq | 0:7c4f7de16626 | 101 | SIM->SOPT2=0x07000000; |
allonq | 0:7c4f7de16626 | 102 | SIM->SCGC6=0x01000000;//enable TPM 0,1 |
allonq | 0:7c4f7de16626 | 103 | TPM0->SC=0x0; |
allonq | 0:7c4f7de16626 | 104 | //-------------------CnSC----------------------- |
allonq | 0:7c4f7de16626 | 105 | volatile uint32_t * ptrMyReg; |
allonq | 0:7c4f7de16626 | 106 | volatile uint32_t prev; |
allonq | 0:7c4f7de16626 | 107 | ptrMyReg = (volatile uint32_t *) 0x4003800C;//C0SC |
allonq | 0:7c4f7de16626 | 108 | prev = *ptrMyReg; |
allonq | 0:7c4f7de16626 | 109 | prev = prev | 0x00000040; |
allonq | 0:7c4f7de16626 | 110 | *ptrMyReg = prev; |
allonq | 0:7c4f7de16626 | 111 | //---------------------------------------------- |
allonq | 0:7c4f7de16626 | 112 | TPM0->CNT=0x0; |
allonq | 0:7c4f7de16626 | 113 | TPM0->SC=0x00000040; |
allonq | 0:7c4f7de16626 | 114 | TPM0->MOD=0x000000ff; |
allonq | 0:7c4f7de16626 | 115 | TPM0->SC=0x00000048;//0008 |
allonq | 0:7c4f7de16626 | 116 | |
allonq | 0:7c4f7de16626 | 117 | |
allonq | 0:7c4f7de16626 | 118 | } |
allonq | 0:7c4f7de16626 | 119 | int main() { |
allonq | 0:7c4f7de16626 | 120 | Initial(); |
allonq | 0:7c4f7de16626 | 121 | pc.baud(9600); |
allonq | 0:7c4f7de16626 | 122 | |
allonq | 0:7c4f7de16626 | 123 | NVIC_SetVector(TPM0_IRQn, (uint32_t)&TPM0_IRQHandler); |
allonq | 0:7c4f7de16626 | 124 | NVIC_SetPriority(TPM0_IRQn, 1); |
allonq | 0:7c4f7de16626 | 125 | NVIC_EnableIRQ(TPM0_IRQn); |
allonq | 0:7c4f7de16626 | 126 | char tmp; |
allonq | 0:7c4f7de16626 | 127 | pc.printf("done"); |
allonq | 0:7c4f7de16626 | 128 | |
allonq | 0:7c4f7de16626 | 129 | |
allonq | 0:7c4f7de16626 | 130 | while(1){ |
allonq | 0:7c4f7de16626 | 131 | if(uart.readable()){pc.printf("???\n"); |
allonq | 0:7c4f7de16626 | 132 | tmp=uart.getc();pc.printf(&tmp); |
allonq | 0:7c4f7de16626 | 133 | if(tmp=='#')Syc();} |
allonq | 0:7c4f7de16626 | 134 | } |
allonq | 0:7c4f7de16626 | 135 | } |