//EE 202 hm2 //This is a program built for the mbed1(master mbed) in generation mode //This code has been tested and should be function, if you has any problem, //please mail me.
main.cpp@0:fac0542384d7, 2014-03-13 (annotated)
- Committer:
- allonq
- Date:
- Thu Mar 13 21:28:39 2014 +0000
- Revision:
- 0:fac0542384d7
- Child:
- 1:55f3661a2050
hm2_master(mbed1)
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
allonq | 0:fac0542384d7 | 1 | //this is a program built for the master mbed(bed1) |
allonq | 0:fac0542384d7 | 2 | #include "mbed.h" |
allonq | 0:fac0542384d7 | 3 | //#include "MKL46Z4.h" |
allonq | 0:fac0542384d7 | 4 | |
allonq | 0:fac0542384d7 | 5 | #define mod 0x0000bb80 |
allonq | 0:fac0542384d7 | 6 | #define duty_cycle 0.5 |
allonq | 0:fac0542384d7 | 7 | #define high_cycle mod*duty_cycle |
allonq | 0:fac0542384d7 | 8 | #define low_cycle mod-high_cycle |
allonq | 0:fac0542384d7 | 9 | #define buffer_size 9 |
allonq | 0:fac0542384d7 | 10 | #define BBBbuff_size 30 |
allonq | 0:fac0542384d7 | 11 | |
allonq | 0:fac0542384d7 | 12 | DigitalOut LED(LED_RED); |
allonq | 0:fac0542384d7 | 13 | Serial pc(USBTX,USBRX); |
allonq | 0:fac0542384d7 | 14 | Serial uart(PTE0, PTE1); |
allonq | 0:fac0542384d7 | 15 | |
allonq | 0:fac0542384d7 | 16 | static int loop_num=0; |
allonq | 0:fac0542384d7 | 17 | int state=0; |
allonq | 0:fac0542384d7 | 18 | uint32_t T1=0; |
allonq | 0:fac0542384d7 | 19 | uint32_t T2=0; |
allonq | 0:fac0542384d7 | 20 | uint32_t T3=0; |
allonq | 0:fac0542384d7 | 21 | uint32_t T4=0; |
allonq | 0:fac0542384d7 | 22 | int delay=0; |
allonq | 0:fac0542384d7 | 23 | uint32_t Mod=mod; |
allonq | 0:fac0542384d7 | 24 | char BBBbuffer[BBBbuff_size]; |
allonq | 0:fac0542384d7 | 25 | bool cmd_received=false; |
allonq | 0:fac0542384d7 | 26 | int BBBbuff=0; |
allonq | 0:fac0542384d7 | 27 | char buffer[4]; |
allonq | 0:fac0542384d7 | 28 | |
allonq | 0:fac0542384d7 | 29 | uint32_t TIME(){return loop_num*Mod+TPM0->CNT;} |
allonq | 0:fac0542384d7 | 30 | |
allonq | 0:fac0542384d7 | 31 | void receive_handler(){ |
allonq | 0:fac0542384d7 | 32 | while( pc.readable() && BBBbuff<BBBbuff_size){ |
allonq | 0:fac0542384d7 | 33 | BBBbuffer[BBBbuff] =pc.getc(); |
allonq | 0:fac0542384d7 | 34 | pc.putc(BBBbuffer[BBBbuff]); |
allonq | 0:fac0542384d7 | 35 | //pc.printf(& rx_buffer[buff]); |
allonq | 0:fac0542384d7 | 36 | if (BBBbuffer[BBBbuff] == '#'){ |
allonq | 0:fac0542384d7 | 37 | BBBbuffer[BBBbuff] = '\0'; |
allonq | 0:fac0542384d7 | 38 | cmd_received=true; |
allonq | 0:fac0542384d7 | 39 | BBBbuff++; |
allonq | 0:fac0542384d7 | 40 | pc.printf("cmd received\n"); |
allonq | 0:fac0542384d7 | 41 | break; |
allonq | 0:fac0542384d7 | 42 | } |
allonq | 0:fac0542384d7 | 43 | BBBbuff++; |
allonq | 0:fac0542384d7 | 44 | } |
allonq | 0:fac0542384d7 | 45 | return; |
allonq | 0:fac0542384d7 | 46 | } |
allonq | 0:fac0542384d7 | 47 | void TPM1_IRQHandler(void); |
allonq | 0:fac0542384d7 | 48 | |
allonq | 0:fac0542384d7 | 49 | void sycronize(uint32_t Cmd_mod){ |
allonq | 0:fac0542384d7 | 50 | switch(state){ |
allonq | 0:fac0542384d7 | 51 | case 0: { |
allonq | 0:fac0542384d7 | 52 | |
allonq | 0:fac0542384d7 | 53 | |
allonq | 0:fac0542384d7 | 54 | char* tmp=(char*)&Cmd_mod; |
allonq | 0:fac0542384d7 | 55 | uint32_t T1=TIME(); |
allonq | 0:fac0542384d7 | 56 | pc.printf("T1=%d\n",T1); |
allonq | 0:fac0542384d7 | 57 | uart.putc((*tmp));pc.printf("0=%d\n",*tmp); |
allonq | 0:fac0542384d7 | 58 | uart.putc((*(tmp+1)));pc.printf("1=%d\n",(*(tmp+1))); |
allonq | 0:fac0542384d7 | 59 | uart.putc((*(tmp+2)));pc.printf("2=%d\n",(*(tmp+2))); |
allonq | 0:fac0542384d7 | 60 | uart.putc((*(tmp+3)));pc.printf("3=%d\n",(*(tmp+3))); |
allonq | 0:fac0542384d7 | 61 | pc.printf("T1 done%d\n"); |
allonq | 0:fac0542384d7 | 62 | state++; |
allonq | 0:fac0542384d7 | 63 | break;}//sending a 5 char command |
allonq | 0:fac0542384d7 | 64 | case 1:{ |
allonq | 0:fac0542384d7 | 65 | buffer[0]=uart.getc(); |
allonq | 0:fac0542384d7 | 66 | buffer[1]=uart.getc(); |
allonq | 0:fac0542384d7 | 67 | buffer[2]=uart.getc(); |
allonq | 0:fac0542384d7 | 68 | buffer[3]=uart.getc(); |
allonq | 0:fac0542384d7 | 69 | T4=TIME(); |
allonq | 0:fac0542384d7 | 70 | T2=((int)buffer[0])<<24+((int)buffer[1])<<16+((int)buffer[2])<<8+((int)buffer[3]); |
allonq | 0:fac0542384d7 | 71 | state++;break; |
allonq | 0:fac0542384d7 | 72 | }//receiving t2 from slave |
allonq | 0:fac0542384d7 | 73 | |
allonq | 0:fac0542384d7 | 74 | case 2:{ |
allonq | 0:fac0542384d7 | 75 | buffer[0]=uart.getc(); |
allonq | 0:fac0542384d7 | 76 | buffer[1]=uart.getc(); |
allonq | 0:fac0542384d7 | 77 | buffer[2]=uart.getc(); |
allonq | 0:fac0542384d7 | 78 | buffer[3]=uart.getc(); |
allonq | 0:fac0542384d7 | 79 | //receiveing t3 |
allonq | 0:fac0542384d7 | 80 | T3=((int)buffer[0])<<24+((int)buffer[1])<<16+((int)buffer[2])<<8+((int)buffer[3]); |
allonq | 0:fac0542384d7 | 81 | |
allonq | 0:fac0542384d7 | 82 | delay= (T4-T3+T2-T1)/2; |
allonq | 0:fac0542384d7 | 83 | //delay=0x0000ffff; |
allonq | 0:fac0542384d7 | 84 | TPM1->MOD=delay; |
allonq | 0:fac0542384d7 | 85 | |
allonq | 0:fac0542384d7 | 86 | TPM1->CNT=0x0; |
allonq | 0:fac0542384d7 | 87 | TPM1->SC=0x00000048; |
allonq | 0:fac0542384d7 | 88 | |
allonq | 0:fac0542384d7 | 89 | //NVIC_SetVector(TPM1_IRQn, (uint32_t)&TPM1_IRQHandler); |
allonq | 0:fac0542384d7 | 90 | //NVIC_SetPriority(TPM0_IRQn, 0); |
allonq | 0:fac0542384d7 | 91 | //NVIC_EnableIRQ(TPM1_IRQn); |
allonq | 0:fac0542384d7 | 92 | // open tpm1 |
allonq | 0:fac0542384d7 | 93 | |
allonq | 0:fac0542384d7 | 94 | uart.putc(0xff); |
allonq | 0:fac0542384d7 | 95 | uart.putc(0xff); |
allonq | 0:fac0542384d7 | 96 | uart.putc(0xff); |
allonq | 0:fac0542384d7 | 97 | uart.putc(0xff); |
allonq | 0:fac0542384d7 | 98 | state++; |
allonq | 0:fac0542384d7 | 99 | break;//} |
allonq | 0:fac0542384d7 | 100 | }//receiving t3 from slave, calculate and send transmit command to slave |
allonq | 0:fac0542384d7 | 101 | |
allonq | 0:fac0542384d7 | 102 | } |
allonq | 0:fac0542384d7 | 103 | } |
allonq | 0:fac0542384d7 | 104 | void TPM0_IRQHandler(void){ |
allonq | 0:fac0542384d7 | 105 | |
allonq | 0:fac0542384d7 | 106 | //if((TPM0->SC & 0x0080)==0x0080){ |
allonq | 0:fac0542384d7 | 107 | if(LED){LED=0;} |
allonq | 0:fac0542384d7 | 108 | else {LED=1;loop_num++;} |
allonq | 0:fac0542384d7 | 109 | pc.printf("MOD=%d",TPM0->MOD); |
allonq | 0:fac0542384d7 | 110 | //pc.printf("SC=%d",TPM0->SC); |
allonq | 0:fac0542384d7 | 111 | pc.printf("Global_time=%d\n",TIME()); |
allonq | 0:fac0542384d7 | 112 | //pc.printf(": %d\n",TPM0->CNT); |
allonq | 0:fac0542384d7 | 113 | TPM0->SC|= 0x000000c8; |
allonq | 0:fac0542384d7 | 114 | NVIC_ClearPendingIRQ(TPM0_IRQn); |
allonq | 0:fac0542384d7 | 115 | //pc.printf("SC_after=%d\n",TPM0->SC); |
allonq | 0:fac0542384d7 | 116 | //}//pc.printf("count=%d",TPM0->CNT); |
allonq | 0:fac0542384d7 | 117 | return; |
allonq | 0:fac0542384d7 | 118 | } |
allonq | 0:fac0542384d7 | 119 | |
allonq | 0:fac0542384d7 | 120 | void TPM1_IRQHandler(void){// time to restart the system |
allonq | 0:fac0542384d7 | 121 | TPM0->SC=0x00000040; |
allonq | 0:fac0542384d7 | 122 | |
allonq | 0:fac0542384d7 | 123 | TPM0->MOD=mod; |
allonq | 0:fac0542384d7 | 124 | loop_num=0;//clear clock |
allonq | 0:fac0542384d7 | 125 | //TPM0->SC= 0x000000c8; |
allonq | 0:fac0542384d7 | 126 | TPM0->CNT=0x0; |
allonq | 0:fac0542384d7 | 127 | TPM0->SC=0x00000048; |
allonq | 0:fac0542384d7 | 128 | NVIC_EnableIRQ(TPM0_IRQn); |
allonq | 0:fac0542384d7 | 129 | pc.printf("AfterMOD=%d\n",TPM0->MOD); |
allonq | 0:fac0542384d7 | 130 | //LED=1; |
allonq | 0:fac0542384d7 | 131 | |
allonq | 0:fac0542384d7 | 132 | TPM1->CNT=0x0; |
allonq | 0:fac0542384d7 | 133 | pc.printf("SC=%d",TPM1->SC); |
allonq | 0:fac0542384d7 | 134 | TPM1->SC= 0x00000080; |
allonq | 0:fac0542384d7 | 135 | TPM1->SC= 0x00000000; |
allonq | 0:fac0542384d7 | 136 | pc.printf("SC_after=%d\n",TPM1->SC); |
allonq | 0:fac0542384d7 | 137 | pc.printf("Tic-Toc\n"); |
allonq | 0:fac0542384d7 | 138 | NVIC_DisableIRQ(TPM1_IRQn); |
allonq | 0:fac0542384d7 | 139 | NVIC_ClearPendingIRQ(TPM1_IRQn); |
allonq | 0:fac0542384d7 | 140 | |
allonq | 0:fac0542384d7 | 141 | return; |
allonq | 0:fac0542384d7 | 142 | } |
allonq | 0:fac0542384d7 | 143 | |
allonq | 0:fac0542384d7 | 144 | void Syc(uint32_t Cmd_mod){ |
allonq | 0:fac0542384d7 | 145 | NVIC_DisableIRQ(TPM0_IRQn); |
allonq | 0:fac0542384d7 | 146 | NVIC_ClearPendingIRQ(TPM0_IRQn); |
allonq | 0:fac0542384d7 | 147 | state=0; |
allonq | 0:fac0542384d7 | 148 | pc.printf("set=%d\n",state); |
allonq | 0:fac0542384d7 | 149 | uart.putc('#'); |
allonq | 0:fac0542384d7 | 150 | while(state<3){sycronize(Cmd_mod);} |
allonq | 0:fac0542384d7 | 151 | |
allonq | 0:fac0542384d7 | 152 | } |
allonq | 0:fac0542384d7 | 153 | |
allonq | 0:fac0542384d7 | 154 | void Initial(){ |
allonq | 0:fac0542384d7 | 155 | LED=1; |
allonq | 0:fac0542384d7 | 156 | SIM->SOPT2=0x07000000; |
allonq | 0:fac0542384d7 | 157 | SIM->SCGC6=0x03000000;//enable TPM 0,1 |
allonq | 0:fac0542384d7 | 158 | TPM0->SC=0x0; |
allonq | 0:fac0542384d7 | 159 | //-------------------CnSC----------------------- |
allonq | 0:fac0542384d7 | 160 | volatile uint32_t * ptrMyReg; |
allonq | 0:fac0542384d7 | 161 | volatile uint32_t prev; |
allonq | 0:fac0542384d7 | 162 | ptrMyReg = (volatile uint32_t *) 0x4003800C;//C0SC |
allonq | 0:fac0542384d7 | 163 | prev = *ptrMyReg; |
allonq | 0:fac0542384d7 | 164 | prev = prev | 0x00000040; |
allonq | 0:fac0542384d7 | 165 | *ptrMyReg = prev; |
allonq | 0:fac0542384d7 | 166 | ptrMyReg = (volatile uint32_t *) 0x4003900C;//C1SC |
allonq | 0:fac0542384d7 | 167 | prev = *ptrMyReg; |
allonq | 0:fac0542384d7 | 168 | prev = prev | 0x00000040; |
allonq | 0:fac0542384d7 | 169 | *ptrMyReg = prev; |
allonq | 0:fac0542384d7 | 170 | //---------------------------------------------- |
allonq | 0:fac0542384d7 | 171 | TPM0->CNT=0x0; |
allonq | 0:fac0542384d7 | 172 | TPM0->SC=0x00000040; |
allonq | 0:fac0542384d7 | 173 | TPM0->MOD=0x0000bb80; |
allonq | 0:fac0542384d7 | 174 | TPM0->SC=0x00000048;//0008 |
allonq | 0:fac0542384d7 | 175 | |
allonq | 0:fac0542384d7 | 176 | TPM1->CNT=0x0; |
allonq | 0:fac0542384d7 | 177 | TPM1->SC=0x00000040; |
allonq | 0:fac0542384d7 | 178 | TPM1->MOD=0x0000ffff; |
allonq | 0:fac0542384d7 | 179 | TPM1->SC=0x00000008;//0008 |
allonq | 0:fac0542384d7 | 180 | } |
allonq | 0:fac0542384d7 | 181 | int main() { |
allonq | 0:fac0542384d7 | 182 | |
allonq | 0:fac0542384d7 | 183 | cmd_received=false; |
allonq | 0:fac0542384d7 | 184 | pc.attach(&receive_handler); |
allonq | 0:fac0542384d7 | 185 | int CMD_MOD=0; |
allonq | 0:fac0542384d7 | 186 | Initial(); |
allonq | 0:fac0542384d7 | 187 | |
allonq | 0:fac0542384d7 | 188 | pc.baud(9600); |
allonq | 0:fac0542384d7 | 189 | pc.attach(&receive_handler); |
allonq | 0:fac0542384d7 | 190 | uart.baud(9600); |
allonq | 0:fac0542384d7 | 191 | |
allonq | 0:fac0542384d7 | 192 | NVIC_SetVector(TPM0_IRQn, (uint32_t)&TPM0_IRQHandler); |
allonq | 0:fac0542384d7 | 193 | NVIC_SetPriority(TPM0_IRQn, 1); |
allonq | 0:fac0542384d7 | 194 | NVIC_EnableIRQ(TPM0_IRQn); |
allonq | 0:fac0542384d7 | 195 | |
allonq | 0:fac0542384d7 | 196 | NVIC_SetVector(TPM1_IRQn, (uint32_t)&TPM1_IRQHandler); |
allonq | 0:fac0542384d7 | 197 | NVIC_SetPriority(TPM1_IRQn, 0); |
allonq | 0:fac0542384d7 | 198 | NVIC_EnableIRQ(TPM1_IRQn); |
allonq | 0:fac0542384d7 | 199 | wait(5); |
allonq | 0:fac0542384d7 | 200 | pc.printf("Initial done\n"); |
allonq | 0:fac0542384d7 | 201 | |
allonq | 0:fac0542384d7 | 202 | |
allonq | 0:fac0542384d7 | 203 | //Syc(48000); |
allonq | 0:fac0542384d7 | 204 | |
allonq | 0:fac0542384d7 | 205 | while(1){ |
allonq | 0:fac0542384d7 | 206 | if(cmd_received){ |
allonq | 0:fac0542384d7 | 207 | pc.printf(BBBbuffer); |
allonq | 0:fac0542384d7 | 208 | for(int i=0;i<BBBbuff-1;i++){ |
allonq | 0:fac0542384d7 | 209 | CMD_MOD*=10; |
allonq | 0:fac0542384d7 | 210 | CMD_MOD+=(BBBbuffer[i]-'0'); |
allonq | 0:fac0542384d7 | 211 | } |
allonq | 0:fac0542384d7 | 212 | cmd_received=false; |
allonq | 0:fac0542384d7 | 213 | BBBbuff=0; |
allonq | 0:fac0542384d7 | 214 | TPM0->MOD=CMD_MOD; |
allonq | 0:fac0542384d7 | 215 | pc.printf("before_syc"); |
allonq | 0:fac0542384d7 | 216 | Syc(CMD_MOD); |
allonq | 0:fac0542384d7 | 217 | } |
allonq | 0:fac0542384d7 | 218 | |
allonq | 0:fac0542384d7 | 219 | } |
allonq | 0:fac0542384d7 | 220 | |
allonq | 0:fac0542384d7 | 221 | |
allonq | 0:fac0542384d7 | 222 | } |