Alan Ffrench / Mbed 2 deprecated Experiment_2_5

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Dependencies:   mbed

mbed-rtos/rtx/HAL_CM.c@0:52468b19aa21, 2020-07-29 (annotated)

Committer:
alanffrench
Date:
Wed Jul 29 18:51:38 2020 +0000
Revision:
0:52468b19aa21
Threads

Who changed what in which revision?

UserRevisionLine numberNew contents of line
alanffrench 0:52468b19aa21 1 /*----------------------------------------------------------------------------
alanffrench 0:52468b19aa21 2 * RL-ARM - RTX
alanffrench 0:52468b19aa21 3 *----------------------------------------------------------------------------
alanffrench 0:52468b19aa21 4 * Name: HAL_CM.C
alanffrench 0:52468b19aa21 5 * Purpose: Hardware Abstraction Layer for Cortex-M
alanffrench 0:52468b19aa21 6 * Rev.: V4.60
alanffrench 0:52468b19aa21 7 *----------------------------------------------------------------------------
alanffrench 0:52468b19aa21 8 *
alanffrench 0:52468b19aa21 9 * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
alanffrench 0:52468b19aa21 10 * All rights reserved.
alanffrench 0:52468b19aa21 11 * Redistribution and use in source and binary forms, with or without
alanffrench 0:52468b19aa21 12 * modification, are permitted provided that the following conditions are met:
alanffrench 0:52468b19aa21 13 * - Redistributions of source code must retain the above copyright
alanffrench 0:52468b19aa21 14 * notice, this list of conditions and the following disclaimer.
alanffrench 0:52468b19aa21 15 * - Redistributions in binary form must reproduce the above copyright
alanffrench 0:52468b19aa21 16 * notice, this list of conditions and the following disclaimer in the
alanffrench 0:52468b19aa21 17 * documentation and/or other materials provided with the distribution.
alanffrench 0:52468b19aa21 18 * - Neither the name of ARM nor the names of its contributors may be used
alanffrench 0:52468b19aa21 19 * to endorse or promote products derived from this software without
alanffrench 0:52468b19aa21 20 * specific prior written permission.
alanffrench 0:52468b19aa21 21 *
alanffrench 0:52468b19aa21 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
alanffrench 0:52468b19aa21 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
alanffrench 0:52468b19aa21 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
alanffrench 0:52468b19aa21 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
alanffrench 0:52468b19aa21 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
alanffrench 0:52468b19aa21 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
alanffrench 0:52468b19aa21 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
alanffrench 0:52468b19aa21 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
alanffrench 0:52468b19aa21 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
alanffrench 0:52468b19aa21 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
alanffrench 0:52468b19aa21 32 * POSSIBILITY OF SUCH DAMAGE.
alanffrench 0:52468b19aa21 33 *---------------------------------------------------------------------------*/
alanffrench 0:52468b19aa21 34
alanffrench 0:52468b19aa21 35 #include "rt_TypeDef.h"
alanffrench 0:52468b19aa21 36 #include "RTX_Config.h"
alanffrench 0:52468b19aa21 37 #include "rt_HAL_CM.h"
alanffrench 0:52468b19aa21 38
alanffrench 0:52468b19aa21 39
alanffrench 0:52468b19aa21 40 /*----------------------------------------------------------------------------
alanffrench 0:52468b19aa21 41 * Global Variables
alanffrench 0:52468b19aa21 42 *---------------------------------------------------------------------------*/
alanffrench 0:52468b19aa21 43
alanffrench 0:52468b19aa21 44 #ifdef DBG_MSG
alanffrench 0:52468b19aa21 45 BIT dbg_msg;
alanffrench 0:52468b19aa21 46 #endif
alanffrench 0:52468b19aa21 47
alanffrench 0:52468b19aa21 48 /*----------------------------------------------------------------------------
alanffrench 0:52468b19aa21 49 * Functions
alanffrench 0:52468b19aa21 50 *---------------------------------------------------------------------------*/
alanffrench 0:52468b19aa21 51
alanffrench 0:52468b19aa21 52
alanffrench 0:52468b19aa21 53 /*--------------------------- rt_init_stack ---------------------------------*/
alanffrench 0:52468b19aa21 54
alanffrench 0:52468b19aa21 55 void rt_init_stack (P_TCB p_TCB, FUNCP task_body) {
alanffrench 0:52468b19aa21 56 /* Prepare TCB and saved context for a first time start of a task. */
alanffrench 0:52468b19aa21 57 U32 *stk,i,size;
alanffrench 0:52468b19aa21 58
alanffrench 0:52468b19aa21 59 /* Prepare a complete interrupt frame for first task start */
alanffrench 0:52468b19aa21 60 size = p_TCB->priv_stack >> 2;
alanffrench 0:52468b19aa21 61
alanffrench 0:52468b19aa21 62 /* Write to the top of stack. */
alanffrench 0:52468b19aa21 63 stk = &p_TCB->stack[size];
alanffrench 0:52468b19aa21 64
alanffrench 0:52468b19aa21 65 /* Auto correct to 8-byte ARM stack alignment. */
alanffrench 0:52468b19aa21 66 if ((U32)stk & 0x04) {
alanffrench 0:52468b19aa21 67 stk--;
alanffrench 0:52468b19aa21 68 }
alanffrench 0:52468b19aa21 69
alanffrench 0:52468b19aa21 70 stk -= 16;
alanffrench 0:52468b19aa21 71
alanffrench 0:52468b19aa21 72 /* Default xPSR and initial PC */
alanffrench 0:52468b19aa21 73 stk[15] = INITIAL_xPSR;
alanffrench 0:52468b19aa21 74 stk[14] = (U32)task_body;
alanffrench 0:52468b19aa21 75
alanffrench 0:52468b19aa21 76 /* Clear R4-R11,R0-R3,R12,LR registers. */
alanffrench 0:52468b19aa21 77 for (i = 0; i < 14; i++) {
alanffrench 0:52468b19aa21 78 stk[i] = 0;
alanffrench 0:52468b19aa21 79 }
alanffrench 0:52468b19aa21 80
alanffrench 0:52468b19aa21 81 /* Assign a void pointer to R0. */
alanffrench 0:52468b19aa21 82 stk[8] = (U32)p_TCB->msg;
alanffrench 0:52468b19aa21 83
alanffrench 0:52468b19aa21 84 /* Initial Task stack pointer. */
alanffrench 0:52468b19aa21 85 p_TCB->tsk_stack = (U32)stk;
alanffrench 0:52468b19aa21 86
alanffrench 0:52468b19aa21 87 /* Task entry point. */
alanffrench 0:52468b19aa21 88 p_TCB->ptask = task_body;
alanffrench 0:52468b19aa21 89
alanffrench 0:52468b19aa21 90 /* Set a magic word for checking of stack overflow.
alanffrench 0:52468b19aa21 91 For the main thread (ID: 0x01) the stack is in a memory area shared with the
alanffrench 0:52468b19aa21 92 heap, therefore the last word of the stack is a moving target.
alanffrench 0:52468b19aa21 93 We want to do stack/heap collision detection instead.
alanffrench 0:52468b19aa21 94 */
alanffrench 0:52468b19aa21 95 if (p_TCB->task_id != 0x01)
alanffrench 0:52468b19aa21 96 p_TCB->stack[0] = MAGIC_WORD;
alanffrench 0:52468b19aa21 97 }
alanffrench 0:52468b19aa21 98
alanffrench 0:52468b19aa21 99
alanffrench 0:52468b19aa21 100 /*--------------------------- rt_ret_val ----------------------------------*/
alanffrench 0:52468b19aa21 101
alanffrench 0:52468b19aa21 102 static __inline U32 *rt_ret_regs (P_TCB p_TCB) {
alanffrench 0:52468b19aa21 103 /* Get pointer to task return value registers (R0..R3) in Stack */
alanffrench 0:52468b19aa21 104 #if (__TARGET_FPU_VFP)
alanffrench 0:52468b19aa21 105 if (p_TCB->stack_frame) {
alanffrench 0:52468b19aa21 106 /* Extended Stack Frame: R4-R11,S16-S31,R0-R3,R12,LR,PC,xPSR,S0-S15,FPSCR */
alanffrench 0:52468b19aa21 107 return (U32 *)(p_TCB->tsk_stack + 8*4 + 16*4);
alanffrench 0:52468b19aa21 108 } else {
alanffrench 0:52468b19aa21 109 /* Basic Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
alanffrench 0:52468b19aa21 110 return (U32 *)(p_TCB->tsk_stack + 8*4);
alanffrench 0:52468b19aa21 111 }
alanffrench 0:52468b19aa21 112 #else
alanffrench 0:52468b19aa21 113 /* Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
alanffrench 0:52468b19aa21 114 return (U32 *)(p_TCB->tsk_stack + 8*4);
alanffrench 0:52468b19aa21 115 #endif
alanffrench 0:52468b19aa21 116 }
alanffrench 0:52468b19aa21 117
alanffrench 0:52468b19aa21 118 void rt_ret_val (P_TCB p_TCB, U32 v0) {
alanffrench 0:52468b19aa21 119 U32 *ret;
alanffrench 0:52468b19aa21 120
alanffrench 0:52468b19aa21 121 ret = rt_ret_regs(p_TCB);
alanffrench 0:52468b19aa21 122 ret[0] = v0;
alanffrench 0:52468b19aa21 123 }
alanffrench 0:52468b19aa21 124
alanffrench 0:52468b19aa21 125 void rt_ret_val2(P_TCB p_TCB, U32 v0, U32 v1) {
alanffrench 0:52468b19aa21 126 U32 *ret;
alanffrench 0:52468b19aa21 127
alanffrench 0:52468b19aa21 128 ret = rt_ret_regs(p_TCB);
alanffrench 0:52468b19aa21 129 ret[0] = v0;
alanffrench 0:52468b19aa21 130 ret[1] = v1;
alanffrench 0:52468b19aa21 131 }
alanffrench 0:52468b19aa21 132
alanffrench 0:52468b19aa21 133
alanffrench 0:52468b19aa21 134 /*--------------------------- dbg_init --------------------------------------*/
alanffrench 0:52468b19aa21 135
alanffrench 0:52468b19aa21 136 #ifdef DBG_MSG
alanffrench 0:52468b19aa21 137 void dbg_init (void) {
alanffrench 0:52468b19aa21 138 if ((DEMCR & DEMCR_TRCENA) &&
alanffrench 0:52468b19aa21 139 (ITM_CONTROL & ITM_ITMENA) &&
alanffrench 0:52468b19aa21 140 (ITM_ENABLE & (1UL << 31))) {
alanffrench 0:52468b19aa21 141 dbg_msg = __TRUE;
alanffrench 0:52468b19aa21 142 }
alanffrench 0:52468b19aa21 143 }
alanffrench 0:52468b19aa21 144 #endif
alanffrench 0:52468b19aa21 145
alanffrench 0:52468b19aa21 146 /*--------------------------- dbg_task_notify -------------------------------*/
alanffrench 0:52468b19aa21 147
alanffrench 0:52468b19aa21 148 #ifdef DBG_MSG
alanffrench 0:52468b19aa21 149 void dbg_task_notify (P_TCB p_tcb, BOOL create) {
alanffrench 0:52468b19aa21 150 while (ITM_PORT31_U32 == 0);
alanffrench 0:52468b19aa21 151 ITM_PORT31_U32 = (U32)p_tcb->ptask;
alanffrench 0:52468b19aa21 152 while (ITM_PORT31_U32 == 0);
alanffrench 0:52468b19aa21 153 ITM_PORT31_U16 = (create << 8) | p_tcb->task_id;
alanffrench 0:52468b19aa21 154 }
alanffrench 0:52468b19aa21 155 #endif
alanffrench 0:52468b19aa21 156
alanffrench 0:52468b19aa21 157 /*--------------------------- dbg_task_switch -------------------------------*/
alanffrench 0:52468b19aa21 158
alanffrench 0:52468b19aa21 159 #ifdef DBG_MSG
alanffrench 0:52468b19aa21 160 void dbg_task_switch (U32 task_id) {
alanffrench 0:52468b19aa21 161 while (ITM_PORT31_U32 == 0);
alanffrench 0:52468b19aa21 162 ITM_PORT31_U8 = task_id;
alanffrench 0:52468b19aa21 163 }
alanffrench 0:52468b19aa21 164 #endif
alanffrench 0:52468b19aa21 165
alanffrench 0:52468b19aa21 166
alanffrench 0:52468b19aa21 167 /*----------------------------------------------------------------------------
alanffrench 0:52468b19aa21 168 * end of file
alanffrench 0:52468b19aa21 169 *---------------------------------------------------------------------------*/
alanffrench 0:52468b19aa21 170