Arnav Jindia / Mbed 2 deprecated Missile_Control_Game

Missile Control Game with uLCD

Dependencies:   4DGL-uLCD-SE SDFileSystem mbed wave_player

Fork of missile_command by ECE 2035 TA

segment_display/dig_out.s@2:eba4ed0263a4, 2015-10-20 (annotated)

Committer:
ajindia6
Date:
Tue Oct 20 19:13:03 2015 +0000
Revision:
2:eba4ed0263a4
Parent:
0:532cb55d6136 
Mbed Mission Control Game

Who changed what in which revision?

UserRevisionLine numberNew contents of line
arvahsu 0:532cb55d6136 1 AREA dig_out, CODE, READONLY
arvahsu 0:532cb55d6136 2 ;--------------------OVERVIEW------------------------
arvahsu 0:532cb55d6136 3 ; This file contains ARM Assembly language functions to set
arvahsu 0:532cb55d6136 4 ; designated pins to General Purpose Output. It uses
arvahsu 0:532cb55d6136 5 ; the PINSELx Register to Set the Pin Function to GPIO.
arvahsu 0:532cb55d6136 6 ; Then, it uses the FIOxDIR register to set the
arvahsu 0:532cb55d6136 7 ; direction of the pin to output. It also contains functions
arvahsu 0:532cb55d6136 8 ; to write a digital HIGH or LOW to these output pins. It uses
arvahsu 0:532cb55d6136 9 ; the FIOxCLR AND FIOxSET registers to clear/set the
arvahsu 0:532cb55d6136 10 ; port bits respectively. Refer to the Pinnames.h
arvahsu 0:532cb55d6136 11 ; file to see which LPC1768 pins a given mbed module is
arvahsu 0:532cb55d6136 12 ; connected to. Then, refer to Chapters 8 and 9 of the
arvahsu 0:532cb55d6136 13 ; LPC1768 User Manual to acquire information on the GPIO
arvahsu 0:532cb55d6136 14 ; registers and their addresses.
arvahsu 0:532cb55d6136 15 ;
arvahsu 0:532cb55d6136 16 ; Example:
arvahsu 0:532cb55d6136 17 ; LED1 is on GPIO port 1 bit 18 according to Pinnames.h
arvahsu 0:532cb55d6136 18 ; For this bit: -the PINSEL3 register determines its pin function
arvahsu 0:532cb55d6136 19 ; -the FIO1DIR register determines its pin direction
arvahsu 0:532cb55d6136 20 ; According to the LPC1768 User Manual: -PINSEL3 is located at 0x4002C00C
arvahsu 0:532cb55d6136 21 ; -FIO1DIR is located at 0x2009C020
arvahsu 0:532cb55d6136 22 ; Now refer to the dig_out_LED1 function below to see the execution
arvahsu 0:532cb55d6136 23 ;------------------------------------------------------
arvahsu 0:532cb55d6136 24 ;
arvahsu 0:532cb55d6136 25 ; EXPORT FUNCTION LOCATION SO THAT C-COMPILER CAN LINK
arvahsu 0:532cb55d6136 26 EXPORT dig_out_LED1
arvahsu 0:532cb55d6136 27 dig_out_LED1
arvahsu 0:532cb55d6136 28 ;========dig_out_LED1========
arvahsu 0:532cb55d6136 29 ; LED1 LOCATED AT PORT-1 PIN-18
arvahsu 0:532cb55d6136 30 LDR R0, =0x4002C00C ; LOAD ADDRESS OF PINSEL3 REGISTER
arvahsu 0:532cb55d6136 31 MOV.W R1, #0x00040000 ; MOVE BIT MASK (FOR BIT 18) INTO TEMP REGISTER (0x40000 = 0x01 << 18)
arvahsu 0:532cb55d6136 32 ; ; NOTE: THE ABOVE IS A 32-BIT INSTRUCTION BC OF ".W" QUALIFIER
arvahsu 0:532cb55d6136 33 LDR R2, =0x2009C020 ; LOAD ADDRESS OF FIO1DIR REGISTER
arvahsu 0:532cb55d6136 34 MOV R3, #0x30 ; FORM BITMASK FOR PINSEL3 REGISTER (clear appropriate bits)
arvahsu 0:532cb55d6136 35 B dig_out_exec ; CALL SUBROUTINE TO EXECUTE YOUR CHANGES
arvahsu 0:532cb55d6136 36 ;
arvahsu 0:532cb55d6136 37 ;
arvahsu 0:532cb55d6136 38 ;
arvahsu 0:532cb55d6136 39 ; EXPORT FUNCTION LOCATION SO THAT C-COMPILER CAN LINK
arvahsu 0:532cb55d6136 40 EXPORT LED1_write
arvahsu 0:532cb55d6136 41 LED1_write
arvahsu 0:532cb55d6136 42 ;========LED1_write=========
arvahsu 0:532cb55d6136 43 ; LED1 LOCATED AT PORT-1 PIN-18
arvahsu 0:532cb55d6136 44 LDR R1, =0x2009C020 ; LOAD ADDRESS OF FIO1DIR (PORT 1 BASE REGISTER)
arvahsu 0:532cb55d6136 45 MOV.W R2, #0x040000 ; MOVE BIT MASK (FOR BIT 18) INTO TEMP REGISTER (0x40000 = 0x01 << 18)
arvahsu 0:532cb55d6136 46 B write_exec ; CALL SUBROUTINE TO EXECUTE YOUR CHANGES
arvahsu 0:532cb55d6136 47 ;
arvahsu 0:532cb55d6136 48 ;
arvahsu 0:532cb55d6136 49 ;
arvahsu 0:532cb55d6136 50 ; EXPORT FUNCTION LOCATION SO THAT C-COMPILER CAN LINK
arvahsu 0:532cb55d6136 51 EXPORT dig_out_LED2
arvahsu 0:532cb55d6136 52 dig_out_LED2
arvahsu 0:532cb55d6136 53 ;========dig_out_LED2========
arvahsu 0:532cb55d6136 54 ; LED2 LOCATED AT PORT-1 PIN-20
arvahsu 0:532cb55d6136 55 LDR R0, =0x4002C00C ; LOAD ADDRESS OF PINSEL3 REGISTER
arvahsu 0:532cb55d6136 56 LDR R1, =0x00100000 ; MOVE BIT MASK (FOR BIT 20) INTO TEMP REGISTER (0x100000 = 0x01 << 20)
arvahsu 0:532cb55d6136 57 LDR R2, =0x2009C020 ; LOAD ADDRESS OF FIO1DIR REGISTER
arvahsu 0:532cb55d6136 58 MOV.W R3, #0x300 ; FORM BITMASK FOR PINSEL3 REGISTER (clear appropriate bits)
arvahsu 0:532cb55d6136 59 ; ; NOTE: THE ABOVE IS A 32-BIT INSTRUCTION BC OF ".W" QUALIFIER
arvahsu 0:532cb55d6136 60 B dig_out_exec ; CALL SUBROUTINE TO EXECUTE YOUR CHANGES
arvahsu 0:532cb55d6136 61 ;
arvahsu 0:532cb55d6136 62 ;
arvahsu 0:532cb55d6136 63 ;
arvahsu 0:532cb55d6136 64 ; EXPORT FUNCTION LOCATION SO THAT C-COMPILER CAN LINK
arvahsu 0:532cb55d6136 65 EXPORT LED2_write
arvahsu 0:532cb55d6136 66 LED2_write
arvahsu 0:532cb55d6136 67 ;========LED2_write=========
arvahsu 0:532cb55d6136 68 ; LED2 LOCATED AT PORT-1 PIN-20
arvahsu 0:532cb55d6136 69 LDR R1, =0x2009C020 ; LOAD ADDRESS OF FIO1DIR (PORT 1 BASE REGISTER)
arvahsu 0:532cb55d6136 70 LDR R2, =0x0100000 ; MOVE BIT MASK (FOR BIT 20) INTO TEMP REGISTER (0x100000 = 0x01 << 20)
arvahsu 0:532cb55d6136 71 B write_exec ; CALL SUBROUTINE TO EXECUTE YOUR CHANGES
arvahsu 0:532cb55d6136 72 ;
arvahsu 0:532cb55d6136 73 ;
arvahsu 0:532cb55d6136 74 ;
arvahsu 0:532cb55d6136 75 ; EXPORT FUNCTION LOCATION SO THAT C-COMPILER CAN LINK
arvahsu 0:532cb55d6136 76 EXPORT dig_out_LED3
arvahsu 0:532cb55d6136 77 dig_out_LED3
arvahsu 0:532cb55d6136 78 ;========dig_out_LED3========
arvahsu 0:532cb55d6136 79 ; LED3 LOCATED AT PORT-1 PIN-21
arvahsu 0:532cb55d6136 80 LDR R0, =0x4002C00C ; LOAD ADDRESS OF PINSEL3 REGISTER
arvahsu 0:532cb55d6136 81 LDR R1, =0x00200000 ; MOVE BIT MASK (FOR BIT 21) INTO TEMP REGISTER (0x200000 = 0x01 << 21)
arvahsu 0:532cb55d6136 82 LDR R2, =0x2009C020 ; LOAD ADDRESS OF FIO1DIR REGISTER
arvahsu 0:532cb55d6136 83 MOV.W R3, #0xC00 ; FORM BITMASK FOR PINSEL3 REGISTER (clear appropriate bits)
arvahsu 0:532cb55d6136 84 ; ; NOTE: THE ABOVE IS A 32-BIT INSTRUCTION BC OF ".W" QUALIFIER
arvahsu 0:532cb55d6136 85 B dig_out_exec ; CALL SUBROUTINE TO EXECUTE YOUR CHANGES
arvahsu 0:532cb55d6136 86 ;
arvahsu 0:532cb55d6136 87 ;
arvahsu 0:532cb55d6136 88 ;
arvahsu 0:532cb55d6136 89 ; EXPORT FUNCTION LOCATION SO THAT C-COMPILER CAN LINK
arvahsu 0:532cb55d6136 90 EXPORT LED3_write
arvahsu 0:532cb55d6136 91 LED3_write
arvahsu 0:532cb55d6136 92 ;========LED3_write=========
arvahsu 0:532cb55d6136 93 ; LED3 LOCATED AT PORT-1 PIN-21
arvahsu 0:532cb55d6136 94 LDR R1, =0x2009C020 ; LOAD ADDRESS OF FIO1DIR (PORT 1 BASE REGISTER)
arvahsu 0:532cb55d6136 95 LDR R2, =0x0200000 ; MOVE BIT MASK (FOR BIT 21) INTO TEMP REGISTER (0x200000 = 0x01 << 21)
arvahsu 0:532cb55d6136 96 B write_exec ; CALL SUBROUTINE TO EXECUTE YOUR CHANGES
arvahsu 0:532cb55d6136 97 ;
arvahsu 0:532cb55d6136 98 ;
arvahsu 0:532cb55d6136 99 ;
arvahsu 0:532cb55d6136 100 ; EXPORT FUNCTION LOCATION SO THAT C-COMPILER CAN LINK
arvahsu 0:532cb55d6136 101 EXPORT dig_out_LED4
arvahsu 0:532cb55d6136 102 dig_out_LED4
arvahsu 0:532cb55d6136 103 ;========dig_out_LED4========
arvahsu 0:532cb55d6136 104 ; LED4 LOCATED AT PORT-1 PIN-23
arvahsu 0:532cb55d6136 105 LDR R0, =0x4002C00C ; LOAD ADDRESS OF PINSEL3 REGISTER
arvahsu 0:532cb55d6136 106 LDR R1, =0x00800000 ; MOVE BIT MASK (FOR BIT 23) INTO TEMP REGISTER (0x800000 = 0x01 << 23)
arvahsu 0:532cb55d6136 107 LDR R2, =0x2009C020 ; LOAD ADDRESS OF FIO1DIR REGISTER
arvahsu 0:532cb55d6136 108 MOV.W R3, #0xC000 ; FORM BITMASK FOR PINSEL3 REGISTER (clear appropriate bits)
arvahsu 0:532cb55d6136 109 ; ; NOTE: THE ABOVE IS A 32-BIT INSTRUCTION BC OF ".W" QUALIFIER
arvahsu 0:532cb55d6136 110 B dig_out_exec ; CALL SUBROUTINE TO EXECUTE YOUR CHANGES
arvahsu 0:532cb55d6136 111 ;
arvahsu 0:532cb55d6136 112 ;
arvahsu 0:532cb55d6136 113 ;
arvahsu 0:532cb55d6136 114 ; EXPORT FUNCTION LOCATION SO THAT C-COMPILER CAN LINK
arvahsu 0:532cb55d6136 115 EXPORT LED4_write
arvahsu 0:532cb55d6136 116 LED4_write
arvahsu 0:532cb55d6136 117 ;========LED4_write=========
arvahsu 0:532cb55d6136 118 ; LED4 LOCATED AT PORT-1 PIN-23
arvahsu 0:532cb55d6136 119 LDR R1, =0x2009C020 ; LOAD ADDRESS OF FIO1DIR (PORT 1 BASE REGISTER)
arvahsu 0:532cb55d6136 120 LDR R2, =0x0800000 ; MOVE BIT MASK (FOR BIT 21) INTO TEMP REGISTER (0x800000 = 0x01 << 23)
arvahsu 0:532cb55d6136 121 B write_exec ; CALL SUBROUTINE TO EXECUTE YOUR CHANGES
arvahsu 0:532cb55d6136 122 ;
arvahsu 0:532cb55d6136 123 ;
arvahsu 0:532cb55d6136 124 ;
arvahsu 0:532cb55d6136 125 ; EXPORT FUNCTION LOCATION SO THAT C-COMPILER CAN LINK
arvahsu 0:532cb55d6136 126 EXPORT dig_out_P11
arvahsu 0:532cb55d6136 127 dig_out_P11
arvahsu 0:532cb55d6136 128 ;========dig_out_P11========
arvahsu 0:532cb55d6136 129 ; P11 LOCATED AT PORT-0 PIN-18
arvahsu 0:532cb55d6136 130 LDR R0, =0x4002C004 ; LOAD ADDRESS OF PINSEL1 REGISTER
arvahsu 0:532cb55d6136 131 MOV.W R1, #0x00040000 ; MOVE BIT MASK (FOR BIT 18) INTO TEMP REGISTER (0x40000 = 0x01 << 18)
arvahsu 0:532cb55d6136 132 ; ; NOTE: THE ABOVE IS A 32-BIT INSTRUCTION BC OF ".W" QUALIFIER
arvahsu 0:532cb55d6136 133 LDR R2, =0x2009C000 ; LOAD ADDRESS OF FIO0DIR0 REGISTER
arvahsu 0:532cb55d6136 134 MOV R3, #0x30 ; FORM BITMASK FOR PINSEL1 REGISTER (clear appropriate bits)
arvahsu 0:532cb55d6136 135 B dig_out_exec ; CALL SUBROUTINE TO EXECUTE YOUR CHANGES
arvahsu 0:532cb55d6136 136 ;
arvahsu 0:532cb55d6136 137 ;
arvahsu 0:532cb55d6136 138 ;
arvahsu 0:532cb55d6136 139 ; EXPORT FUNCTION LOCATION SO THAT C-COMPILER CAN LINK
arvahsu 0:532cb55d6136 140 EXPORT P11_write
arvahsu 0:532cb55d6136 141 P11_write
arvahsu 0:532cb55d6136 142 ;========P11_write=========
arvahsu 0:532cb55d6136 143 ; P11 LOCATED AT PORT-0 PIN-18
arvahsu 0:532cb55d6136 144 LDR R1, =0x2009C000 ; LOAD ADDRESS OF FIO0DIR0 (PORT 0 BASE REGISTER)
arvahsu 0:532cb55d6136 145 MOV.W R2, #0x040000 ; MOVE BIT MASK (FOR BIT 18) INTO TEMP REGISTER (0x40000 = 0x01 << 18)
arvahsu 0:532cb55d6136 146 B write_exec ; CALL SUBROUTINE TO EXECUTE YOUR CHANGES
arvahsu 0:532cb55d6136 147 ;
arvahsu 0:532cb55d6136 148 ;
arvahsu 0:532cb55d6136 149 ;
arvahsu 0:532cb55d6136 150 ; EXPORT FUNCTION LOCATION SO THAT C-COMPILER CAN LINK
arvahsu 0:532cb55d6136 151 EXPORT dig_out_P12
arvahsu 0:532cb55d6136 152 dig_out_P12
arvahsu 0:532cb55d6136 153 ;========dig_out_P12========
arvahsu 0:532cb55d6136 154 ; P12 LOCATED AT PORT-0 PIN-17
arvahsu 0:532cb55d6136 155 LDR R0, =0x4002C004 ; LOAD ADDRESS OF PINSEL1 REGISTER
arvahsu 0:532cb55d6136 156 MOV.W R1, #0x00020000 ; MOVE BIT MASK (FOR BIT 17) INTO TEMP REGISTER (0x40000 = 0x01 << 18)
arvahsu 0:532cb55d6136 157 ; ; NOTE: THE ABOVE IS A 32-BIT INSTRUCTION BC OF ".W" QUALIFIER
arvahsu 0:532cb55d6136 158 LDR R2, =0x2009C000 ; LOAD ADDRESS OF FIO0DIR0 REGISTER
arvahsu 0:532cb55d6136 159 MOV R3, #0xC ; FORM BITMASK FOR PINSEL1 REGISTER (clear appropriate bits)
arvahsu 0:532cb55d6136 160 B dig_out_exec ; CALL SUBROUTINE TO EXECUTE YOUR CHANGES
arvahsu 0:532cb55d6136 161 ;
arvahsu 0:532cb55d6136 162 ;
arvahsu 0:532cb55d6136 163 ;
arvahsu 0:532cb55d6136 164 ; EXPORT FUNCTION LOCATION SO THAT C-COMPILER CAN LINK
arvahsu 0:532cb55d6136 165 EXPORT P12_write
arvahsu 0:532cb55d6136 166 P12_write
arvahsu 0:532cb55d6136 167 ;========P12_write=========
arvahsu 0:532cb55d6136 168 ; P12 LOCATED AT PORT-0 PIN-17
arvahsu 0:532cb55d6136 169 LDR R1, =0x2009C000 ; LOAD ADDRESS OF FIO0DIR0 (PORT 0 BASE REGISTER)
arvahsu 0:532cb55d6136 170 MOV.W R2, #0x020000 ; MOVE BIT MASK (FOR BIT 17) INTO TEMP REGISTER (0x40000 = 0x01 << 18)
arvahsu 0:532cb55d6136 171 B write_exec ; CALL SUBROUTINE TO EXECUTE YOUR CHANGES
arvahsu 0:532cb55d6136 172 ;
arvahsu 0:532cb55d6136 173 ;
arvahsu 0:532cb55d6136 174 ; EXPORT FUNCTION LOCATION SO THAT C-COMPILER CAN LINK
arvahsu 0:532cb55d6136 175 EXPORT dig_out_P13
arvahsu 0:532cb55d6136 176 dig_out_P13
arvahsu 0:532cb55d6136 177 ;========dig_out_P13========
arvahsu 0:532cb55d6136 178 ; P13 LOCATED AT PORT-0 PIN-15
arvahsu 0:532cb55d6136 179 LDR R0, =0x4002C000 ; LOAD ADDRESS OF PINSEL0 REGISTER
arvahsu 0:532cb55d6136 180 MOV.W R1, #0x00008000 ; MOVE BIT MASK (FOR BIT 15) INTO TEMP REGISTER (0x08000 = 0x01 << 15)
arvahsu 0:532cb55d6136 181 ; ; NOTE: THE ABOVE IS A 32-BIT INSTRUCTION BC OF ".W" QUALIFIER
arvahsu 0:532cb55d6136 182 LDR R2, =0x2009C000 ; LOAD ADDRESS OF FIO0DIR0 REGISTER
arvahsu 0:532cb55d6136 183 LDR R3, =0x70000000 ; FORM BITMASK FOR PINSEL0 REGISTER (clear appropriate bits)
arvahsu 0:532cb55d6136 184 B dig_out_exec ; CALL SUBROUTINE TO EXECUTE YOUR CHANGES
arvahsu 0:532cb55d6136 185 ;
arvahsu 0:532cb55d6136 186 ;
arvahsu 0:532cb55d6136 187 ;
arvahsu 0:532cb55d6136 188 ; EXPORT FUNCTION LOCATION SO THAT C-COMPILER CAN LINK
arvahsu 0:532cb55d6136 189 EXPORT P13_write
arvahsu 0:532cb55d6136 190 P13_write
arvahsu 0:532cb55d6136 191 ;========P13_write=========
arvahsu 0:532cb55d6136 192 ; P13 LOCATED AT PORT-0 PIN-15
arvahsu 0:532cb55d6136 193 LDR R1, =0x2009C000 ; LOAD ADDRESS OF FIO0DIR0 (PORT 0 BASE REGISTER)
arvahsu 0:532cb55d6136 194 MOV.W R2, #0x008000 ; MOVE BIT MASK (FOR BIT 15) INTO TEMP REGISTER (0x08000 = 0x01 << 15)
arvahsu 0:532cb55d6136 195 B write_exec ; CALL SUBROUTINE TO EXECUTE YOUR CHANGES
arvahsu 0:532cb55d6136 196 ;
arvahsu 0:532cb55d6136 197 ;
arvahsu 0:532cb55d6136 198 ;
arvahsu 0:532cb55d6136 199 ; EXPORT FUNCTION LOCATION SO THAT C-COMPILER CAN LINK
arvahsu 0:532cb55d6136 200 EXPORT dig_out_P14
arvahsu 0:532cb55d6136 201 dig_out_P14
arvahsu 0:532cb55d6136 202 ;========dig_out_P14========
arvahsu 0:532cb55d6136 203 ; P14 LOCATED AT PORT-0 PIN-16
arvahsu 0:532cb55d6136 204 LDR R0, =0x4002C004 ; LOAD ADDRESS OF PINSEL1 REGISTER
arvahsu 0:532cb55d6136 205 MOV.W R1, #0x00010000 ; MOVE BIT MASK (FOR BIT 16) INTO TEMP REGISTER (0x10000 = 0x01 << 16)
arvahsu 0:532cb55d6136 206 ; ; NOTE: THE ABOVE IS A 32-BIT INSTRUCTION BC OF ".W" QUALIFIER
arvahsu 0:532cb55d6136 207 LDR R2, =0x2009C000 ; LOAD ADDRESS OF FIO0DIR0 REGISTER
arvahsu 0:532cb55d6136 208 MOV R3, #0x03 ; FORM BITMASK FOR PINSEL0 REGISTER (clear appropriate bits)
arvahsu 0:532cb55d6136 209 B dig_out_exec ; CALL SUBROUTINE TO EXECUTE YOUR CHANGES
arvahsu 0:532cb55d6136 210 ;
arvahsu 0:532cb55d6136 211 ;
arvahsu 0:532cb55d6136 212 ;
arvahsu 0:532cb55d6136 213 ; EXPORT FUNCTION LOCATION SO THAT C-COMPILER CAN LINK
arvahsu 0:532cb55d6136 214 EXPORT P14_write
arvahsu 0:532cb55d6136 215 P14_write
arvahsu 0:532cb55d6136 216 ;========P14_write=========
arvahsu 0:532cb55d6136 217 ; P14 LOCATED AT PORT-0 PIN-16
arvahsu 0:532cb55d6136 218 LDR R1, =0x2009C000 ; LOAD ADDRESS OF FIO0DIR0 (PORT 0 BASE REGISTER)
arvahsu 0:532cb55d6136 219 MOV.W R2, #0x010000 ; MOVE BIT MASK (FOR BIT 16) INTO TEMP REGISTER (0x10000 = 0x01 << 16)
arvahsu 0:532cb55d6136 220 B write_exec ; CALL SUBROUTINE TO EXECUTE YOUR CHANGES
arvahsu 0:532cb55d6136 221 ;
arvahsu 0:532cb55d6136 222 ;
arvahsu 0:532cb55d6136 223 ;
arvahsu 0:532cb55d6136 224 ; EXPORT FUNCTION LOCATION SO THAT C-COMPILER CAN LINK
arvahsu 0:532cb55d6136 225 EXPORT dig_out_P15
arvahsu 0:532cb55d6136 226 dig_out_P15
arvahsu 0:532cb55d6136 227 ;========dig_out_P15========
arvahsu 0:532cb55d6136 228 ; P15 LOCATED AT PORT-0 PIN-23
arvahsu 0:532cb55d6136 229 LDR R0, =0x4002C004 ; LOAD ADDRESS OF PINSEL1 REGISTER
arvahsu 0:532cb55d6136 230 LDR R1, =0x00800000 ; MOVE BIT MASK (FOR BIT 23) INTO TEMP REGISTER (0x800000 = 0x01 << 23)
arvahsu 0:532cb55d6136 231 LDR R2, =0x2009C000 ; LOAD ADDRESS OF FIO0DIR0 REGISTER
arvahsu 0:532cb55d6136 232 MOV.W R3, #0x7000 ; FORM BITMASK FOR PINSEL1 REGISTER (clear appropriate bits)
arvahsu 0:532cb55d6136 233 ; ; NOTE: THE ABOVE IS A 32-BIT INSTRUCTION BC OF ".W" QUALIFIER
arvahsu 0:532cb55d6136 234 B dig_out_exec ; CALL SUBROUTINE TO EXECUTE YOUR CHANGES
arvahsu 0:532cb55d6136 235 ;
arvahsu 0:532cb55d6136 236 ;
arvahsu 0:532cb55d6136 237 ;
arvahsu 0:532cb55d6136 238 ; EXPORT FUNCTION LOCATION SO THAT C-COMPILER CAN LINK
arvahsu 0:532cb55d6136 239 EXPORT P15_write
arvahsu 0:532cb55d6136 240 P15_write
arvahsu 0:532cb55d6136 241 ;========P15_write=========
arvahsu 0:532cb55d6136 242 ; P15 LOCATED AT PORT-0 PIN-23
arvahsu 0:532cb55d6136 243 LDR R1, =0x2009C000 ; LOAD ADDRESS OF FIO0DIR0 (PORT 0 BASE REGISTER)
arvahsu 0:532cb55d6136 244 MOV.W R2, #0x0800000 ; MOVE BIT MASK (FOR BIT 23) INTO TEMP REGISTER (0x800000 = 0x01 << 23)
arvahsu 0:532cb55d6136 245 B write_exec ; CALL SUBROUTINE TO EXECUTE YOUR CHANGES
arvahsu 0:532cb55d6136 246 ;
arvahsu 0:532cb55d6136 247 ;
arvahsu 0:532cb55d6136 248 ;
arvahsu 0:532cb55d6136 249 ; EXPORT FUNCTION LOCATION SO THAT C-COMPILER CAN LINK
arvahsu 0:532cb55d6136 250 EXPORT dig_out_P16
arvahsu 0:532cb55d6136 251 dig_out_P16
arvahsu 0:532cb55d6136 252 ;========dig_out_P16========
arvahsu 0:532cb55d6136 253 ; P16 LOCATED AT PORT-0 PIN-24
arvahsu 0:532cb55d6136 254 LDR R0, =0x4002C004 ; LOAD ADDRESS OF PINSEL1 REGISTER
arvahsu 0:532cb55d6136 255 LDR R1, =0x01000000 ; MOVE BIT MASK (FOR BIT 24) INTO TEMP REGISTER (0x1000000 = 0x01 << 24)
arvahsu 0:532cb55d6136 256 LDR R2, =0x2009C000 ; LOAD ADDRESS OF FIO0DIR0 REGISTER
arvahsu 0:532cb55d6136 257 MOV.W R3, #0x30000 ; FORM BITMASK FOR PINSEL1 REGISTER (clear appropriate bits)
arvahsu 0:532cb55d6136 258 ; ; NOTE: THE ABOVE IS A 32-BIT INSTRUCTION BC OF ".W" QUALIFIER
arvahsu 0:532cb55d6136 259 B dig_out_exec ; CALL SUBROUTINE TO EXECUTE YOUR CHANGES
arvahsu 0:532cb55d6136 260 ;
arvahsu 0:532cb55d6136 261 ;
arvahsu 0:532cb55d6136 262 ;
arvahsu 0:532cb55d6136 263 ; EXPORT FUNCTION LOCATION SO THAT C-COMPILER CAN LINK
arvahsu 0:532cb55d6136 264 EXPORT P16_write
arvahsu 0:532cb55d6136 265 P16_write
arvahsu 0:532cb55d6136 266 ;========P16_write=========
arvahsu 0:532cb55d6136 267 ; P16 LOCATED AT PORT-0 PIN-24
arvahsu 0:532cb55d6136 268 LDR R1, =0x2009C000 ; LOAD ADDRESS OF FIO0DIR0 (PORT 0 BASE REGISTER)
arvahsu 0:532cb55d6136 269 MOV.W R2, #0x1000000 ; MOVE BIT MASK (FOR BIT 23) INTO TEMP REGISTER (0x1000000 = 0x01 << 24)
arvahsu 0:532cb55d6136 270 B write_exec ; CALL SUBROUTINE TO EXECUTE YOUR CHANGES
arvahsu 0:532cb55d6136 271 ;
arvahsu 0:532cb55d6136 272 ;
arvahsu 0:532cb55d6136 273 ;
arvahsu 0:532cb55d6136 274 ; EXPORT FUNCTION LOCATION SO THAT C-COMPILER CAN LINK
arvahsu 0:532cb55d6136 275 EXPORT dig_out_P17
arvahsu 0:532cb55d6136 276 dig_out_P17
arvahsu 0:532cb55d6136 277 ;========dig_out_P17========
arvahsu 0:532cb55d6136 278 ; P17 LOCATED AT PORT-0 PIN-25
arvahsu 0:532cb55d6136 279 LDR R0, =0x4002C004 ; LOAD ADDRESS OF PINSEL1 REGISTER
arvahsu 0:532cb55d6136 280 MOV.W R1, #0x02000000 ; MOVE BIT MASK (FOR BIT 25) INTO TEMP REGISTER (0x40000 = 0x01 << 25)
arvahsu 0:532cb55d6136 281 ; ; NOTE: THE ABOVE IS A 32-BIT INSTRUCTION BC OF ".W" QUALIFIER
arvahsu 0:532cb55d6136 282 LDR R2, =0x2009C000 ; LOAD ADDRESS OF FIO0DIR0 REGISTER
arvahsu 0:532cb55d6136 283 MOV R3, #0xC0000 ; FORM BITMASK FOR PINSEL1 REGISTER (clear appropriate bits)
arvahsu 0:532cb55d6136 284 B dig_out_exec ; CALL SUBROUTINE TO EXECUTE YOUR CHANGES
arvahsu 0:532cb55d6136 285 ;
arvahsu 0:532cb55d6136 286 ;
arvahsu 0:532cb55d6136 287 ;
arvahsu 0:532cb55d6136 288 ; EXPORT FUNCTION LOCATION SO THAT C-COMPILER CAN LINK
arvahsu 0:532cb55d6136 289 EXPORT P17_write
arvahsu 0:532cb55d6136 290 P17_write
arvahsu 0:532cb55d6136 291 ;========P17_write=========
arvahsu 0:532cb55d6136 292 ; P17 LOCATED AT PORT-0 PIN-25
arvahsu 0:532cb55d6136 293 LDR R1, =0x2009C000 ; LOAD ADDRESS OF FIO0DIR0 (PORT 0 BASE REGISTER)
arvahsu 0:532cb55d6136 294 MOV.W R2, #0x2000000 ; MOVE BIT MASK (FOR BIT 25) INTO TEMP REGISTER (0x1000000 = 0x01 << 25)
arvahsu 0:532cb55d6136 295 B write_exec ; CALL SUBROUTINE TO EXECUTE YOUR CHANGES
arvahsu 0:532cb55d6136 296 ;
arvahsu 0:532cb55d6136 297 ;
arvahsu 0:532cb55d6136 298 ;
arvahsu 0:532cb55d6136 299 dig_out_exec
arvahsu 0:532cb55d6136 300 ;========dig_out_execution========
arvahsu 0:532cb55d6136 301 ; SET PIN FUNCTION TO GPIO
arvahsu 0:532cb55d6136 302 LDR R4, [R0] ; \
arvahsu 0:532cb55d6136 303 BIC R4, R3 ; - APPLY BITMASK FOR PINSELx REGISTER (clear appropriate bits)
arvahsu 0:532cb55d6136 304 STR R4, [R0] ; STORE BITMASK IN PINSELx REGISTER
arvahsu 0:532cb55d6136 305 ;
arvahsu 0:532cb55d6136 306 ; SET UP GPIO PORT FOR OUTPUT DIRECTION (WITH SPECIFIED BITMASK IN REGISTER R2)
arvahsu 0:532cb55d6136 307 LDR R6, [R2] ; \
arvahsu 0:532cb55d6136 308 ORR R6, R1 ; - ACQUIRE BITMASK FOR FIOxDIR REGISTER (1 = Output)
arvahsu 0:532cb55d6136 309 STR R6, [R2] ; STORE BITMASK IN FIOxDIR REGISTER
arvahsu 0:532cb55d6136 310 ;
arvahsu 0:532cb55d6136 311 ;RETURN TO MAIN
arvahsu 0:532cb55d6136 312 BX LR ; RETURN TO MAIN USING LINKER REGISTER
arvahsu 0:532cb55d6136 313 ;
arvahsu 0:532cb55d6136 314 ;
arvahsu 0:532cb55d6136 315 ;
arvahsu 0:532cb55d6136 316 write_exec
arvahsu 0:532cb55d6136 317 ;========write_execution=========
arvahsu 0:532cb55d6136 318 ; CLEAR/SET BASED ON INPUT VALUE
arvahsu 0:532cb55d6136 319 CMP R0, #0 ; VALUE == 0 ?
arvahsu 0:532cb55d6136 320 ITE EQ ; (IF-THEN-ELSE) ON NEXT TWO INSTRUCTIONS USING "EQ" FLAG
arvahsu 0:532cb55d6136 321 STREQ R2, [R1,#0x1C] ; if==0, CLEAR LED1 BIT
arvahsu 0:532cb55d6136 322 STRNE R2, [R1,#0x18] ; if==1, SET LED1 BIT
arvahsu 0:532cb55d6136 323 ;
arvahsu 0:532cb55d6136 324 ; RETURN TO MAIN
arvahsu 0:532cb55d6136 325 BX LR ; RETURN TO MAIN USING LINKER REGISTER
arvahsu 0:532cb55d6136 326 ;
arvahsu 0:532cb55d6136 327 ;
arvahsu 0:532cb55d6136 328 ;
arvahsu 0:532cb55d6136 329 ALIGN 4 ; make sure the file is ended with align 4
arvahsu 0:532cb55d6136 330 NOP
arvahsu 0:532cb55d6136 331 NOP
arvahsu 0:532cb55d6136 332 END