Diff: Lora.h

Revision:

64:64982192a2af

Parent:

60:7985b4783af9

Child:

65:acc0468b9aec

--- a/Lora.h	Tue Jun 19 13:13:52 2018 -0500
+++ b/Lora.h	Thu Aug 23 14:18:55 2018 -0500
@@ -140,19 +140,44 @@
     const uint32_t AU915_FREQ_MAX = 928000000;
 
     const uint8_t AU915_MIN_DATARATE = (uint8_t) DR_0;       //!< Minimum transmit datarate for AU915
-    const uint8_t AU915_MAX_DATARATE = (uint8_t) DR_4;       //!< Maximum transmit datarate for AU915
+    const uint8_t AU915_MAX_DATARATE = (uint8_t) DR_6;       //!< Maximum transmit datarate for AU915
 
     const uint8_t AU915_MIN_DATARATE_OFFSET = (uint8_t) 0;       //!< Minimum transmit datarate for AU915
-    const uint8_t AU915_MAX_DATARATE_OFFSET = (uint8_t) 3;       //!< Maximum transmit datarate for AU915
+    const uint8_t AU915_MAX_DATARATE_OFFSET = (uint8_t) 5;       //!< Maximum transmit datarate for AU915
 
     const uint8_t EU868_125K_NUM_CHANS = 16;                    //!< Number of 125k channels in EU868 channel plan
-    const uint8_t EU868_DEFAULT_NUM_CHANS = 3;                  //!< Number of defualt channels in EU868 channel plan
+    const uint8_t EU868_DEFAULT_NUM_CHANS = 3;                  //!< Number of default channels in EU868 channel plan
     const uint32_t EU868_125K_FREQ_BASE = 868100000;            //!< Frequency base for 125k EU868 uplink channels
     const uint32_t EU868_125K_FREQ_STEP = 200000;               //!< Frequency step for 125k EU868 uplink channels
     const uint32_t EU868_RX2_FREQ = 869525000;                  //!< Frequency default for second rx window in EU868
 
     const uint8_t EU868_TX_POWER_MAX = 14;                      //!< Max power for EU868 channel plan
 
+    const uint8_t KR920_125K_NUM_CHANS = 16;                    //!< Number of 125k channels in KR920 channel plan
+    const uint8_t KR920_DEFAULT_NUM_CHANS = 3;                  //!< Number of default channels in KR920 channel plan
+    const uint32_t KR920_125K_FREQ_BASE = 868100000;            //!< Frequency base for 125k KR920 uplink channels
+    const uint32_t KR920_125K_FREQ_STEP = 200000;               //!< Frequency step for 125k KR920 uplink channels
+    const uint32_t KR920_RX2_FREQ = 869525000;                  //!< Frequency default for second rx window in KR920
+
+    const uint8_t KR920_TX_POWER_MAX = 14;                      //!< Max power for KR920 channel plan
+
+    const uint8_t AS923_125K_NUM_CHANS = 16;                    //!< Number of 125k channels in AS923 channel plan
+    const uint8_t AS923_DEFAULT_NUM_CHANS = 2;                  //!< Number of default channels in AS923 channel plan
+    const uint32_t AS923_125K_FREQ_BASE = 868100000;            //!< Frequency base for 125k AS923 uplink channels
+    const uint32_t AS923_125K_FREQ_STEP = 200000;               //!< Frequency step for 125k AS923 uplink channels
+    const uint32_t AS923_RX2_FREQ = 869525000;                  //!< Frequency default for second rx window in AS923
+
+    const uint8_t AS923_TX_POWER_MAX = 14;                      //!< Max power for AS923 channel plan
+
+    const uint8_t IN865_125K_NUM_CHANS = 16;                    //!< Number of 125k channels in IN865 channel plan
+    const uint8_t IN865_DEFAULT_NUM_CHANS = 3;                  //!< Number of default channels in IN865 channel plan
+    const uint32_t IN865_125K_DEF_FREQ_1 = 865062500;
+    const uint32_t IN865_125K_DEF_FREQ_2 = 865402500;
+    const uint32_t IN865_125K_DEF_FREQ_3 = 865985000;
+    const uint32_t IN865_RX2_FREQ = 866550000;                  //!< Frequency default for second rx window in IN865
+
+    const uint8_t IN865_TX_POWER_MAX = 30;                      //!< Max power for IN865 channel plan
+
     // 0.1% duty cycle 863-868
     // Limiting to 865-868 allows for 1% duty cycle
     const uint32_t EU868_MILLI_FREQ_MIN = 865000000;
@@ -208,14 +233,21 @@
 
     const uint8_t FRAME_OVERHEAD = 13;                          //!< Bytes of network info overhead in a frame
 
+    const uint16_t MAX_OFF_AIR_WAIT = 5000U;                    //!< Max time in ms to block for a duty cycle restriction to expire before erroring out
     /**
      * Settings for type of network
-     * PUBLIC - defaults to 5/6 second join windows and 0x34 sync word
-     * PRIVATE - defaults to 1/2 second join windows and 0x12 sync word
+     *
+     * PRIVATE_MTS - Sync Word 0x12, US/AU Downlink frequencies per Frequency Sub Band
+     * PUBLIC_LORAWAN - Sync Word 0x34
+     * PRIVATE_LORAWAN - Sync Word 0x12
+     * PEER_TO_PEER - Sync Word 0x56 used for Dot to Dot communication
+     *
+     * Join Delay window settings are independent of Network Type setting
      */
     enum NetworkType {
-        PRIVATE = 0,
-        PUBLIC = 1,
+        PRIVATE_MTS = 0,
+        PUBLIC_LORAWAN = 1,
+        PRIVATE_LORAWAN = 2,
         PEER_TO_PEER = 4
     };
 
@@ -306,7 +338,8 @@
         RX_1 = 1,           //!< First receive window
         RX_2,               //!< Second receive window
         RX_BEACON,          //!< Beacon receive window
-        RX_SLOT,             //!< Beacon Slot receive window
+        RX_SLOT,            //!< Ping Slot receive window
+        RXC,                //!< Class C continuous window
         RX_TEST
     };