#include <sgtl5000.h>

Public Member Functions
	SGTL5000 (PinName i2c_sda, PinName i2c_scl, int _i2c_freq=100000, bool i2c_ctrl_adr0_cs=0, IRQn _ctrl_IRQn=Reserved109_IRQn)
	Create an SGTL5000 object defined on the I2C port using DMA transfers of I2S data. The class is not defined as a singleton, as future development may require multiple instances. However currently only a single object for each CODEC should only be instantiated. It is possible to instantiate more, but care must be taken. After the init() function is called, state within the class becomes indpendent of the object that modified it. The class is wrapped in the SGTL5000 namespace to avoid collisions with statics needed by the ISRs. Only the CODEC using CTRL_ADR0_CS = 0 can be used to manage the I2S setup and data flow, such as sample_rate, attach, start, stop etc. If a second CODEC is available then its data flow is locked to the 1st, TX & RX FIFO buffers of both CODECs will be synchronised and only one DMA channel is used to TX data to both codecs and one DMA channel to RX data from both codecs.
int32_t	read_i2c (uint32_t reg_addr, uint32_t mask=0xFFFF, int _i2c_addr=0)
	Read 16bit register of SGTL5000.
int32_t	write_i2c (uint32_t reg_addr, uint32_t data, int _i2c_addr=0)
	Write 16bit register of SGTL5000.
int32_t	modify_i2c (uint32_t reg_addr, uint32_t data, uint32_t mask, int _i2c_addr=0)
	Modify masked bits within 16bit register of SGTL5000.
int32_t	attach_TX (Callback< void()> func)
	Attach a callback function to TX.
int32_t	attach_TX_NB (void *user_ISR, uint32_t irq_pri=1, IRQn sw_irq=Reserved54_IRQn)
	Attach an ISR function to DMA TX.
int32_t	detach_TX (void)
	Stop TX channel and flag as detached. During running stream, the callback based function can not be changed. It must therefore be deteched first. However changes to the NB IRQ based attachment can have the vector changed on-the-fly.
int32_t	stop_TX (void)
	Disables I2S TX function. This stops all DMA requests and supresses any IRQs from the driver and tristates the inbound CODEC I2S interface. It also stops bit clocks and word sync clocks. Note: Stopping the TX will also stop the RX stream because the RX is synchronous to the TX function. It is recommended that TX is the last enabled and first disabled.
int32_t	pause_TX (void)
	Pauses I2S TX channels. Halts the TX stream(s) by masking all data words. This can be used to suspend the codec when a user wishes to run critical tasks where IRQs must be suppressed. To restart call the resume function.
int32_t	resume_TX (void)
	Resumes a paused I2S TX channels. Resumes the TX stream(s) by un-masking all data words.
int32_t	start_TX (uint32_t _BufTX_L_safe, uint32_t _BufTX_R_safe, uint32_t _block_size=4, bool _packed_TX=false, bool _TX_shift=true, uint32_t _TX_DMAch=15, uint32_t _DMA_irq_pri=0, uint32_t _BufTX_L_safe2=NULL, uint32_t _BufTX_R_safe2=NULL)
	Starts the codec I2S interface and begins transferring TX buffers. Transfers use DMA.
int32_t	attach_RX (Callback< void()> func)
	Attach a callback function to RX.
int32_t	attach_RX_NB (void *user_ISR, uint32_t irq_pri=1, IRQn sw_irq=Reserved55_IRQn)
	Attach an ISR function to DMA RX.
int32_t	detach_RX (void)
	Stop RX channel and flag as detached. During running stream, the callback based function can not be changed. It must therefore be deteched first. However changes to the NB IRQ based attachment can have the vector changed on-the-fly.
int32_t	stop_RX (void)
	Disables I2S RX function. Stops all DMA requests and supresses any IRQs from the driver and tristates the outbound CODEC I2S interface(s). Note: Bit clock and Word Sync clock will continue as long as TX is running (started).
int32_t	pause_RX (void)
	Pauses I2S RX channels. Halts the RX stream(s) by masking all data words. This can be used to suspend the codec when a user wishes to run critical tasks where IRQs must be suppressed. To restart call the resume function.
int32_t	resume_RX (void)
	Resumes a paused I2S RX channels. Resumes the RX stream(s) by un-masking all data words.
int32_t	start_RX (uint32_t _BufRX_L_safe, uint32_t _BufRX_R_safe, uint32_t _block_size=4, bool _packed_RX=false, bool _RX_shift=true, uint32_t _RX_DMAch=14, uint32_t _DMA_irq_pri=0, uint32_t _BufRX_L_safe2=NULL, uint32_t _BufRX_R_safe2=NULL)
	Starts the codec I2S interface and begins transferring RX buffers. Transfers use DMA.
int32_t	attach_SYNC (Callback< void()> func)
	Attach a callback function to DMA SYNC.
int32_t	attach_SYNC_NB (void *user_ISR, uint32_t irq_pri=1, IRQn sw_irq=Reserved53_IRQn)
	Attach a ISR function to DMA SYNC.
int32_t	detach_SYNC (void)
	Stop both TX & RX channels and flag as detached. During running stream, the callback based function can not be changed. It must therefore be deteched first. However changes to the NB IRQ based attachment can have the vector changed on-the-fly.
int32_t	start_SYNC (uint32_t _BufRX_L_safe, uint32_t _BufRX_R_safe, uint32_t _BufTX_L_safe, uint32_t _BufTX_R_safe, uint32_t _block_size=4, bool _packed_RX=false, bool _packed_TX=false, bool _RX_shift=true, bool _TX_shift=true, uint32_t _RX_DMAch=14, uint32_t _TX_DMAch=15, uint32_t _DMA_irq_pri=0, uint32_t _BufRX_L_safe2=NULL, uint32_t _BufRX_R_safe2=NULL, uint32_t _BufTX_L_safe2=NULL, uint32_t _BufTX_R_safe2=NULL)
	Starts the codec I2S interface and begins transferring RX and TX buffers.
int32_t	stop_SYNC (void)
	Stops I2S TX & RX channels. Stops all DMA requests and supresses any IRQs from the driver and tristates the CODEC I2S interface.
int32_t	pause_SYNC (void)
	Pauses I2S RX & TX channels. Halts the RX & TX stream(s) by masking all data words. This can be used to suspend the codec when a user wishes to run critical tasks where IRQs must be suppressed. To restart call the resume function.
int32_t	resume_SYNC (void)
	Resumes a paused I2S RX & TX channels. Resumes the RX & TX stream(s) by un-masking all data words.
int32_t	sample_rate (uint32_t rate)
	Set codec and I2S Sampling frequency.
int32_t	init (void)
	Initialise codec. Resets the codec and sends initial default configuration data to the codec over I2C. This function must be called after instantiation and before most other functions. It allows control over when I2C communications with the codec takes place. Failure to initialize will prevent operation of the codec. However it possible to attach and detach functions before init.
int32_t	read_debug (uint32_t index, bool finished=false)
	Read debug data from the codec.

Detailed Description

SGTL5000 codec driver class

Class for NXP SGTL5000 codec instance. Supports dual codecs. One using I2S TX&RX channel_0 the other I2S TX&RX channel_1. The instance created for codec1 (I2S channel_0 CODEC CS = LOW) is the master, all stream ctrl functions (start, stop, pause & resume) are synchronous to this master codec and must be initiated by the master codec object.

   #include 'SGTL5000.h'

   SGTL5000::SGTL5000  codec(I2C_SDA, I2C_SCL);

   static q31_t *RX_AudioL = NULL;
   static q31_t *RX_AudioR = NULL;
   static q31_t *TX_AudioL = NULL;
   static q31_t *TX_AudioR = NULL;

   const uint32_t I2S_FIFO_BS = 4;


   uint32_t main()
   {
       codec.init();    
       codec.modify_i2c(SGTL5000_ANA_HP_CTRL, 0x18, SGTL5000_ANA_HP_CTRL_HP_VOL_RIGHT_MASK);   // Headphone volume control with 0.5 dB steps.0x00 = +12 dB, 0x01 = +11.5 dB, 0x18 = 0 dB,...0x7F = -51.5 dB
       codec.modify_i2c(SGTL5000_ANA_HP_CTRL, 0x18, SGTL5000_ANA_HP_CTRL_HP_VOL_LEFT_MASK);

       codec.attach_SYNC_NB((uint32_t)&I2S_SYNC_ISR);
       codec.sample_rate(96);
       codec.start_SYNC((uint32_t)&RX_AudioL, (uint32_t)&RX_AudioR, (uint32_t)&TX_AudioL, (uint32_t)&TX_AudioR, I2S_FIFO_BS)
   }

   void I2S_SYNC_ISR(void)
   {
       for(uint32_t i = 0; i < (I2S_FIFO_BS >> 1); ++i)
       {
           TX_AudioL[i] = RX_AudioL[i];
           TX_AudioR[i] = RX_AudioR[i];
       }
   }

To implement dual CODECs

   #include 'SGTL5000.h'

   SGTL5000::SGTL5000  codec1_ctrl(I2C_SDA, I2C_SCL);
   SGTL5000::SGTL5000  codec2(I2C_SDA, I2C_SCL);

   static q31_t *RX_AudioL1 = NULL;
   static q31_t *RX_AudioR1 = NULL;
   static q31_t *TX_AudioL1 = NULL;
   static q31_t *TX_AudioR1 = NULL;
   static q31_t *RX_AudioL2 = NULL;
   static q31_t *RX_AudioR2 = NULL;
   static q31_t *TX_AudioL2 = NULL;
   static q31_t *TX_AudioR2 = NULL;

   const uint32_t I2S_FIFO_BS = 4;


   uint32_t main()
   {
       codec1_ctrl.init();
       codec2.init();
       codec1_ctrl.modify_i2c(SGTL5000_ANA_HP_CTRL, 0x18, SGTL5000_ANA_HP_CTRL_HP_VOL_RIGHT_MASK);     // Headphone volume control with 0.5 dB steps.0x00 = +12 dB, 0x01 = +11.5 dB, 0x18 = 0 dB,...0x7F = -51.5 dB
       codec1_ctrl.modify_i2c(SGTL5000_ANA_HP_CTRL, 0x18, SGTL5000_ANA_HP_CTRL_HP_VOL_LEFT_MASK);
       codec2.modify_i2c(SGTL5000_ANA_HP_CTRL, 0x01, SGTL5000_ANA_HP_CTRL_HP_VOL_RIGHT_MASK);          // Headphone volume control with 0.5 dB steps.0x00 = +12 dB, 0x01 = +11.5 dB, 0x18 = 0 dB,...0x7F = -51.5 dB
       codec2.modify_i2c(SGTL5000_ANA_HP_CTRL, 0x01, SGTL5000_ANA_HP_CTRL_HP_VOL_LEFT_MASK);           // Seperate codec settings.

       codec1_ctrl.attach_SYNC_NB((uint32_t)&I2S_SYNC_ISR);
       codec1_ctrl.sample_rate(96);
       codec1_ctrl.start_SYNC((uint32_t)&RX_AudioL1, (uint32_t)&RX_AudioR1, (uint32_t)&TX_AudioL1, (uint32_t)&TX_AudioR1, I2S_FIFO_BS, true, true, false, false, 14, 15, 
                              (uint32_t)&RX_AudioL2, (uint32_t)&RX_AudioR2, (uint32_t)&TX_AudioL2, (uint32_t)&TX_AudioR2)
   }

   void I2S_SYNC_ISR(void)
   {
       for(uint32_t i = 0; i < (I2S_FIFO_BS >> 1); ++i)
       {
           // CODEC 1
           TX_AudioL1[i] = RX_AudioL1[i];
           TX_AudioR1[i] = RX_AudioR1[i];

           // CODEC 2
           TX_AudioL2[i] = RX_AudioL2[i];
           TX_AudioR2[i] = RX_AudioR2[i];
       }
   }

Definition at line 130 of file sgtl5000.h.

Constructor & Destructor Documentation

SGTL5000	(	PinName	i2c_sda,
		PinName	i2c_scl,
		int	_i2c_freq = `100000`,
		bool	i2c_ctrl_adr0_cs = `0`,
		IRQn	_ctrl_IRQn = `Reserved109_IRQn`
	)

Create an SGTL5000 object defined on the I2C port using DMA transfers of I2S data. The class is not defined as a singleton, as future development may require multiple instances. However currently only a single object for each CODEC should only be instantiated. It is possible to instantiate more, but care must be taken. After the init() function is called, state within the class becomes indpendent of the object that modified it. The class is wrapped in the SGTL5000 namespace to avoid collisions with statics needed by the ISRs. Only the CODEC using CTRL_ADR0_CS = 0 can be used to manage the I2S setup and data flow, such as sample_rate, attach, start, stop etc. If a second CODEC is available then its data flow is locked to the 1st, TX & RX FIFO buffers of both CODECs will be synchronised and only one DMA channel is used to TX data to both codecs and one DMA channel to RX data from both codecs.

In SYNC mode FIFO buffers depths are synchronised to bring DMA transfers as close as possible to each other. After both TX & RX DMA transfers are complete, user code is called. Therefore, please note, there will always be a minimum delay of 1 I2S sample between TX & RX DMA transfers. In most circumstances this is irrelevant, but needs to be considered. For example; if the codecs run at 48KHz, and a FIFO depth of 8 samples is implemented. User code will be called every 83.3uS. At the end of this 83.3uS period there will be a short period equal to the length of time needed to transfer 1 channel sample (@48Khz this will be (1/48000)/2 = 10.42uS + the time required to swap pointers ~ 800nS. Therefore ~ 11.3uS). During this period just before user code is called again, the data in the transfer buffers should not be read or written. It is suggested that upon entry into user code, all TX data is first written out followed by processing of RX data, which must complete in less than (83.3 - 11.3 = 72uS). If the sample rate changes this period changes, getting shorter as the sample rate increases. However the pointer swaps take a fixed time, dependent only on system core clock frequency. If this behaviour needs to ber avoided, run the TX & RX streams independently. However this then increases the overhead associated with IRQs and the user will need to manage synchronisation between TX & RX streams.

Parameters:

i2c_sda	i2c Serial data pin (D18 Teensy 3.2 header / PTB3 MK20DX256)
i2c_scl	i2c Serial clock pin (D19 Teensy 3.2 header / PTB2 MK20DX256)
i2c_freq	Frequency in Hz at which the i2c codec interface clocks data
i2c_ctrl_adr0_cs	State on SGTL5000 CTRL_ADR0_CS pin i2c addr = 0n01010(R/W) :R/W = 1 to write R/W = 0 to read, n = 0 pull down / n = 1 pull up on CTRL_ADR0_CS pin of SGTL5000)
_ctrl_IRQn	A system IRQ number used to control the codec. All time sensitive commands are elevated to highest IRQ priority using this IRQ number. Note: This is only used by the master codec (which is the codec with CS pin LOW). All commands to control data flow must be issued through the master codec object. This includes setting sample rate. Both codecs are linked by default at the same rate. Setting the master codecs rate also sets the same rate for the 2nd codec. However each codec instance has fully independent access to all the other codec internal features, through its respective object.

Pin Configs for i2s hardcoded as follows to match Teensy Audio Shield i2s_mclk i2s master clock (D11 Teensy 3.2 header / PTC6 MK20DX256) i2s_bclk i2s bit clock (D9 Teensy 3.2 header / PTC3 MK20DX256) i2s_fs i2s Frame Sync / L/R clock / WordSelect (D23 Teensy 3.2 header / PTC2 MK20DX256) i2s_rx i2s tx_data (from bus master perspective) (D22 Teensy 3.2 header / PTC1 MK20DX256) i2s_tx i2s rx_data (from bus master perspective) (D13 Teensy 3.2 header /PTC5 MK20DX256)

Definition at line 100 of file sgtl5000.cpp.

Member Function Documentation

int32_t attach_RX ( Callback< void()> func )

Attach a callback function to RX.

Parameters:

func	User function to be called from the RX FIFO triggered ISR. This is blocking. If the user function does not complete before the next DMA completes the system will crash, however using this function avoids the latency of a stack push.

Returns:: 0 = success, -1 = fail. Fails if already attached, must detach first.

Definition at line 1364 of file sgtl5000.cpp.

int32_t attach_RX_NB	(	void *	user_ISR,
		uint32_t	irq_pri = `1`,
		IRQn	sw_irq = `Reserved55_IRQn`
	)

Attach an ISR function to DMA RX.

Parameters:

user_ISR	User function address pointer to be assigned as the NVIC vector for the DMA RX FIFO triggered user_ISR.
irq_pri	Set the system wide priority of the user_ISR.
sw_irq	The IRQ assigned. Default uses Reserved55_IRQn. See "MK20DX256.h" for available. This is non-blocking provided the priority of the IRQ associated with user_ISR is lower than the priority of the DMA triggered ISR. It can be useful to use a non-blocking call, however this involves the extra time needed to push the stack and manageing IRQ priorities across the whole system needs consideration.

Definition at line 1374 of file sgtl5000.cpp.

int32_t attach_SYNC ( Callback< void()> func )

Attach a callback function to DMA SYNC.

Parameters:

func	User function to be called from the DMA SYNC FIFO triggered ISR. This is blocking. If the user function does not complete before the next DMA triggered IRQ the system will crash, however using this function avoids the latency of a stack push.

Returns:: 0 = success, -1 = fail. Fails if already attached, must detach first.

Definition at line 660 of file sgtl5000.cpp.

int32_t attach_SYNC_NB	(	void *	user_ISR,
		uint32_t	irq_pri = `1`,
		IRQn	sw_irq = `Reserved53_IRQn`
	)

Attach a ISR function to DMA SYNC.

Parameters:

user_ISR	User function address pointer to be assigned as the NVIC vector for the DMA SYNC FIFO triggered user_ISR.
irq_pri	Set the system wide priority of the user_ISR.
sw_irq	The IRQ assigned. Default uses Reserved53_IRQn. See "MK20DX256.h" for available. This creates a non-blocking call, which tests to see if the users ISR has completed before calling again. It requires that the priority of the IRQ associated with user_ISR is lower than the priority of the DMA triggered ISR. It can be useful to use a non-blocking call, however this involves the extra time needed to push the stack and manageing IRQ priorities across the whole system needs consideration.

Definition at line 671 of file sgtl5000.cpp.

int32_t attach_TX ( Callback< void()> func )

Attach a callback function to TX.

Parameters:

func	Address of the user function to be called from the TX FIFO triggered ISR. This is blocking. If the user function does not complete before the next DMA completes the system will likely crash, however using this function avoids the latency of an IRQ stack push.

Returns:: 0 = success, -1 = fail. Fails if already attached, must detach first.

Definition at line 1111 of file sgtl5000.cpp.

int32_t attach_TX_NB	(	void *	user_ISR,
		uint32_t	irq_pri = `1`,
		IRQn	sw_irq = `Reserved54_IRQn`
	)

Attach an ISR function to DMA TX.

Parameters:

user_ISR	User function address pointer to be assigned as the NVIC vector for the DMA TX FIFO triggered user_ISR.
irq_pri	Set the system wide priority of the user_ISR.
sw_irq	The IRQ assigned. Default uses Reserved54_IRQn. See "MK20DX256.h" for available. This is non-blocking provided the priority of the IRQ associated with user_ISR is lower than the priority of the DMA triggered ISR. It can be useful to use a non-blocking call, however this involves the extra time needed to push the stack and manageing IRQ priorities across the whole system needs consideration.

Definition at line 1122 of file sgtl5000.cpp.

int32_t detach_RX ( void )

Stop RX channel and flag as detached. During running stream, the callback based function can not be changed. It must therefore be deteched first. However changes to the NB IRQ based attachment can have the vector changed on-the-fly.

Definition at line 1387 of file sgtl5000.cpp.

int32_t detach_SYNC ( void )

Stop both TX & RX channels and flag as detached. During running stream, the callback based function can not be changed. It must therefore be deteched first. However changes to the NB IRQ based attachment can have the vector changed on-the-fly.

Definition at line 683 of file sgtl5000.cpp.

int32_t detach_TX ( void )

Stop TX channel and flag as detached. During running stream, the callback based function can not be changed. It must therefore be deteched first. However changes to the NB IRQ based attachment can have the vector changed on-the-fly.

Definition at line 1135 of file sgtl5000.cpp.

int32_t init ( void )

Initialise codec. Resets the codec and sends initial default configuration data to the codec over I2C. This function must be called after instantiation and before most other functions. It allows control over when I2C communications with the codec takes place. Failure to initialize will prevent operation of the codec. However it possible to attach and detach functions before init.

Returns:: 0 = success, -1 = fail

Definition at line 123 of file sgtl5000.cpp.

int32_t modify_i2c	(	uint32_t	reg_addr,
		uint32_t	data,
		uint32_t	mask,
		int	_i2c_addr = `0`
	)

Modify masked bits within 16bit register of SGTL5000.

Parameters:

reg_addr	16bit address of the codec control register
data	16bit data to write into the address
mask	16bit mask of the bits to modify. The function automatically shifts the data to the position of the first masked bit.
_i2c_addr	Default = 0. If none zero, overrides the address associated with the current object.

Returns:: 0 = success, -1 = fail

Definition at line 398 of file sgtl5000.cpp.

int32_t pause_RX ( void )

Pauses I2S RX channels. Halts the RX stream(s) by masking all data words. This can be used to suspend the codec when a user wishes to run critical tasks where IRQs must be suppressed. To restart call the resume function.

Definition at line 1475 of file sgtl5000.cpp.

int32_t pause_SYNC ( void )

Pauses I2S RX & TX channels. Halts the RX & TX stream(s) by masking all data words. This can be used to suspend the codec when a user wishes to run critical tasks where IRQs must be suppressed. To restart call the resume function.

Definition at line 894 of file sgtl5000.cpp.

int32_t pause_TX ( void )

Pauses I2S TX channels. Halts the TX stream(s) by masking all data words. This can be used to suspend the codec when a user wishes to run critical tasks where IRQs must be suppressed. To restart call the resume function.

Definition at line 1224 of file sgtl5000.cpp.

int32_t read_debug	(	uint32_t	index,
		bool	finished = `false`
	)

Read debug data from the codec.

Parameters:

index	0-15
finished	a simple semaphore, indicating that debug data should be aquired again. (Can be used in combination with the internal bool SGTL5000::debug_read, to gate data collection.) Just a simple way for user code to grab running variables if you need it.

Returns:: 0 = success, -1 = fail

Definition at line 1801 of file sgtl5000.cpp.

int32_t read_i2c	(	uint32_t	reg_addr,
		uint32_t	mask = `0xFFFF`,
		int	_i2c_addr = `0`
	)

Read 16bit register of SGTL5000.

Parameters:

reg_addr	16bit address of the codec control register
data	16bit data to read from the address
mask	16bit mask applied over the data read from the codec. The final returned value is the register data automatically shifted to the position of the first masked bit.
_i2c_addr	Default = 0. If none zero, overrides the address associated with the current object.

Returns:: 0 = register data, -1 = fail

Definition at line 366 of file sgtl5000.cpp.

int32_t resume_RX ( void )

Resumes a paused I2S RX channels. Resumes the RX stream(s) by un-masking all data words.

Definition at line 1484 of file sgtl5000.cpp.

int32_t resume_SYNC ( void )

Resumes a paused I2S RX & TX channels. Resumes the RX & TX stream(s) by un-masking all data words.

Definition at line 903 of file sgtl5000.cpp.

int32_t resume_TX ( void )

Resumes a paused I2S TX channels. Resumes the TX stream(s) by un-masking all data words.

Definition at line 1233 of file sgtl5000.cpp.

int32_t sample_rate ( uint32_t rate )

Set codec and I2S Sampling frequency.

Parameters:

rate	8, 11, 12, 16, 22, 24, 32, 44, 48, 96, 192 Base sampling rate of the codec

In all cases the SGTL5000 is programmed to use MCLK 256 times faster than sampling freq. MCU MCLK output = MCLK_Input((FRACT + 1)/(DIVIDE + 1)) MCU MCLK Divide Register ratio is therefore = (Fs * 256)/PLL Clk The Teensy 3.1 & 3.2 have PLL freq @ 96MHz. However 120Mhz is supported dependent on the global 'SystemCoreClock' variable indicating this.

Note: To achieve some of these rates the codec SYS_FS is adjusted. This needs to be considered for several internal codec processes such as filter co-efficients and AVC.

Returns:: 0 = success, -1 = fail

Definition at line 137 of file sgtl5000.cpp.

int32_t start_RX	(	uint32_t	_BufRX_L_safe,
		uint32_t	_BufRX_R_safe,
		uint32_t	_block_size = `4`,
		bool	_packed_RX = `false`,
		bool	_RX_shift = `true`,
		uint32_t	_RX_DMAch = `14`,
		uint32_t	_DMA_irq_pri = `0`,
		uint32_t	_BufRX_L_safe2 = `NULL`,
		uint32_t	_BufRX_R_safe2 = `NULL`
	)

Starts the codec I2S interface and begins transferring RX buffers. Transfers use DMA.

Parameters:

_BufRX_L_safe	A pointer address to the RX Left channel_0 data. The address pointed to by the users pointer is managed by the library and changes to implement a double buffer. It is suggested that a suitable declaration in the users code would be in the form: 'q31_t *RX_AudioL = NULL;' To pass into the class, dereference this pointer and cast as uint32_t, as follows: 'codec.start_SYNC((uint32_t)&RX_AudioL .....'
_BufRX_R_safe	A pointer address to the RX Right channel_0 data.
_block_size	2 \| 4 \| 8 words of both Left and Right channels combined. This defines the number of samples that are transferred to the RX FIFO each time a FIFO demand is detected.
_packed_RX	If true the 2 * 16bit words from the codec are packed into a single 32bit word towards the user. This allows user code to use SIMD operations on the data If False a single 16bit word from the wire is placed into a single 32bit word towards the user.
_RX_shift	True = The 16bits of RX FIFO data are shifted to the MSBs of the RX buffer. Default = true False = The 16bits of RX FIFO data are placed in the LSBs of the RX buffer Note: If data is not shifted, the 32bit word delivered to the user will not be sign extended. If packed is true, then shift has no relevance.
_rx_DMAch	Defines the system DMA channel to assign to the RX transfer. Default is 14. 14 is used as default to avoid using channels 0 - 3 which are the only channels available for gated triggers. Gated triggering is not needed, so these 4 channels are avoided.
_DMA_irq_pri	Default = 0. Highest priority. This is the priority of the I2S RX DMA demands.
_BufRX_L_safe2	A pointer address to the RX Left channel_1 data.
_BufRX_R_safe2	A pointer address to the RX Right channel_1 data.

Returns:: 0 = success, -1 = fail Fails on variable sanity checks.

Definition at line 1398 of file sgtl5000.cpp.

int32_t start_SYNC	(	uint32_t	_BufRX_L_safe,
		uint32_t	_BufRX_R_safe,
		uint32_t	_BufTX_L_safe,
		uint32_t	_BufTX_R_safe,
		uint32_t	_block_size = `4`,
		bool	_packed_RX = `false`,
		bool	_packed_TX = `false`,
		bool	_RX_shift = `true`,
		bool	_TX_shift = `true`,
		uint32_t	_RX_DMAch = `14`,
		uint32_t	_TX_DMAch = `15`,
		uint32_t	_DMA_irq_pri = `0`,
		uint32_t	_BufRX_L_safe2 = `NULL`,
		uint32_t	_BufRX_R_safe2 = `NULL`,
		uint32_t	_BufTX_L_safe2 = `NULL`,
		uint32_t	_BufTX_R_safe2 = `NULL`
	)

Starts the codec I2S interface and begins transferring RX and TX buffers.

Transfers use DMA.

Parameters:

_BufRX_L_safe	A pointer address to the RX Left channel_0 data. The address pointed to by the users pointer is managed by the library and changes to implement a double buffer. It is suggested that a suitable declaration in the users code would be in the form: 'q31_t *RX_AudioL = NULL;' To pass into the class, dereference this pointer and cast as uint32_t, as follows: 'codec.start_SYNC((uint32_t)&RX_AudioL .....'
_BufRX_R_safe	A pointer address to the RX Right channel_0 data.
_BufTX_L_safe	A pointer address to the TX Left channel_0 data.
_BufTX_R_safe	A pointer address to the TX Right channel_0 data.
_block_size	2 \| 4 \| 8 words of both Left and Right channels combined. This defines the number of samples that are transferred to both FIFOs each time a FIFO demand is detected.
_packed_TX	If true the 2 * 16bit words for wire transmission are expected packed into a single 32bit word. If False each 32bit word from the user should contain a single 16bit word for transmission.
_packed_RX	If true the 2 * 16bit words from the codec are packed into a single 32bit word towards the user. This allows user code to use SIMD operations on the data If False a single 16bit word from the wire is placed into a single 32bit word towards the user.
_RX_shift	True = The 16bits of RX FIFO data are shifted to the MSBs of the RX buffer. Default = true False = The 16bits of RX FIFO data are placed in the LSBs of the RX buffer. Note: If data is not shifted, the 32bit word delivered to the user will not be sign extended. If RX packed is true, then shift has no relevance.
_TX_shift	True = The MS16bits of TX buffer are sent to the TX FIFO. Default = true. False = The LS16bits of TX buffer are sent to the TX FIFO. If TX packed is true, then shift has no relevance.
_RX_DMAch	Defines the system DMA channel to assign to the RX transfer. Default is 14.
_TX_DMAch	Defines the system DMA channel to assign to the TX transfer. Default is 15. 14 & 15 are used as default to avoid using channels 0 - 3 which are the only channels available for gated triggers. Gated triggering is not needed, so these 4 channels are avoided.
_DMA_irq_pri	Default = 0. Highest priority. This is the priority of the I2S DMA demands.
_BufRX_L_safe2	A pointer address to the RX Left channel_1 data.
_BufRX_R_safe2	A pointer address to the RX Right channel_1 data.
_BufTX_L_safe2	A pointer address to the TX Left channel_1 data.
_BufTX_R_safe2	A pointer address to the TX Right channel_1 data.

Returns:: 0 = success, -1 = fail Fails on variable sanity checks.

Definition at line 776 of file sgtl5000.cpp.

int32_t start_TX	(	uint32_t	_BufTX_L_safe,
		uint32_t	_BufTX_R_safe,
		uint32_t	_block_size = `4`,
		bool	_packed_TX = `false`,
		bool	_TX_shift = `true`,
		uint32_t	_TX_DMAch = `15`,
		uint32_t	_DMA_irq_pri = `0`,
		uint32_t	_BufTX_L_safe2 = `NULL`,
		uint32_t	_BufTX_R_safe2 = `NULL`
	)

Starts the codec I2S interface and begins transferring TX buffers. Transfers use DMA.

Parameters:

_BufTX_L_safe	A pointer address to the TX Left channel_0 data. The address pointed to by the users pointer is managed by the library and changes to implement a double buffer. It is suggested that a suitable declaration in the users code would be in the form: 'q31_t *TX_AudioL = NULL;' To pass into the class, dereference this pointer and cast as uint32_t, as follows: 'codec.start_SYNC((uint32_t)&TX_AudioL .....'
_BufTX_R_safe	A pointer address to the TX Right channel_0 data.
_block_size	2 \| 4 \| 8 words of both Left and Right channels combined. This defines the number of samples that are transferred to the TX FIFO each time a FIFO demand is detected.
_packed_TX	If true 2 * 16bit words for wire transmission are expected packed into a single 32bit word. If False each 32bit word from the user should contain a single 16bit word for transmission.
_TX_shift	True = The MS16bits of TX buffer are sent to the TX FIFO. Default = true. False = The LS16bits of TX buffer are sent to the TX FIFO. If packed is true, then shift has no relevance.
_tx_DMAch	Defines the system DMA channel to assign to the TX transfer. Default is 15. 15 is used as default to avoid using channels 0 - 3 which are the only channels available for gated triggers. Gated triggering is not needed, so these 4 channels are avoided.
_DMA_irq_pri	Default = 0. Highest priority. This is the priority of the I2S TX DMA demands.
_BufTX_L_safe2	A pointer address to the TX Left channel_1 data.
_BufTX_R_safe2	A pointer address to the TX Right channel_1 data.

Returns:: 0 = success, -1 = fail Fails on variable sanity checks.

Definition at line 1146 of file sgtl5000.cpp.

int32_t stop_RX ( void )

Disables I2S RX function. Stops all DMA requests and supresses any IRQs from the driver and tristates the outbound CODEC I2S interface(s). Note: Bit clock and Word Sync clock will continue as long as TX is running (started).

Definition at line 1493 of file sgtl5000.cpp.

int32_t stop_SYNC ( void )

Stops I2S TX & RX channels. Stops all DMA requests and supresses any IRQs from the driver and tristates the CODEC I2S interface.

Definition at line 912 of file sgtl5000.cpp.

int32_t stop_TX ( void )

Disables I2S TX function. This stops all DMA requests and supresses any IRQs from the driver and tristates the inbound CODEC I2S interface. It also stops bit clocks and word sync clocks. Note: Stopping the TX will also stop the RX stream because the RX is synchronous to the TX function. It is recommended that TX is the last enabled and first disabled.

Definition at line 1243 of file sgtl5000.cpp.

int32_t write_i2c	(	uint32_t	reg_addr,
		uint32_t	data,
		int	_i2c_addr = `0`
	)

Write 16bit register of SGTL5000.

Parameters:

reg_addr	16bit address of the codec control register
data	16bit data to write into the address
_i2c_addr	Default = 0. If none zero, overrides the address associated with the current object.

Returns:: 0 = success, -1 = fail

Definition at line 386 of file sgtl5000.cpp.

Type:	Library
Created:	15 Jun 2017
Imports:	27
Forks:	0
Commits:	15
Dependents:	0
Dependencies:	0
Followers:	2

SGTL5000 Class Reference

Public Member Functions

Detailed Description

Constructor & Destructor Documentation

Member Function Documentation

Repository toolbox

Repository details

Important Information for this Arm website

SGTL5000 Class Reference

Public Member Functions

Detailed Description

Constructor & Destructor Documentation

Member Function Documentation

Repository toolbox

Repository details

Important Information for this Arm website

Access Warning