123
Diff: sx127x_lora.h
- Revision:
- 18:0ecb6adb7c0b
- Parent:
- 17:59279bc8cdab
- Child:
- 19:1ee6ef1ab73f
--- a/sx127x_lora.h Wed May 27 22:42:30 2015 +0000 +++ b/sx127x_lora.h Tue Jun 02 01:25:47 2015 +0000 @@ -42,8 +42,10 @@ #define REG_LR_TEST33 0x33 // invert IQ #define REG_LR_CAD_PEAK_TO_NOISE_RATIO 0x34 #define REG_LR_CAD_MIN_PEAK 0x35 +#define REG_LR_SX1276_AUTO_DRIFT 0x36 #define REG_LR_DETECTION_THRESHOLD 0x37 #define REG_LR_SYNC_BYTE 0x39 // default 0x12 (value of 0x21 will isolate network) +#define REG_LR_GAIN_DRIFT 0x3a #define REG_LR_DRIFT_INVERT 0x3b typedef union { @@ -151,6 +153,23 @@ } RegTest33_t; typedef union { + struct { // sx1276 register 0x36 + uint8_t freq_to_time_drift_auto : 1; // 0 manual control of 0x3a register + uint8_t sd_max_freq_deviation_auto : 1; // 1 manual control of 0x3b[3:1] + uint8_t reserved : 6; // + } bits; + uint8_t octet; +} RegAutoDrift_t; + +typedef union { + struct { // sx127x register 0x3a + uint8_t freq_to_time_drift : 6; // 0,1,2,3,4,5 manual control of 0x3a register + uint8_t preamble_timing_gain : 1; // 6,7 + } bits; + uint8_t octet; +} RegGainDrift_t; + +typedef union { struct { // sx127x register 0x3b uint8_t coarse_sync : 1; // 0 must be set to 1 uint8_t fine_sync : 1; // 1 must be clr to 0