Diff: sx127x_lora.cpp

Revision:

17:59279bc8cdab

Parent:

16:3de8e1c465eb

Child:

18:0ecb6adb7c0b

--- a/sx127x_lora.cpp	Thu May 21 18:24:04 2015 +0000
+++ b/sx127x_lora.cpp	Wed May 27 22:42:30 2015 +0000
@@ -21,6 +21,8 @@
     RegModemConfig.octet = m_xcvr.read_reg(REG_LR_MODEMCONFIG);
     RegModemConfig2.octet = m_xcvr.read_reg(REG_LR_MODEMCONFIG2);
     RegTest31.octet = m_xcvr.read_reg(REG_LR_TEST31);
+    RegTest33.octet = m_xcvr.read_reg(REG_LR_TEST33);     // invert_i_q
+    RegDriftInvert.octet = m_xcvr.read_reg(REG_LR_DRIFT_INVERT);
     
     // CRC for TX is disabled by default
     setRxPayloadCrcOn(true);
@@ -372,6 +374,21 @@
     
 }
 
+void SX127x_lora::invert_tx(bool inv)
+{
+    RegTest33.bits.chirp_invert_tx = !inv;
+    m_xcvr.write_reg(REG_LR_TEST33, RegTest33.octet);    
+}
+
+void SX127x_lora::invert_rx(bool inv)
+{
+    RegTest33.bits.invert_i_q = inv;
+    m_xcvr.write_reg(REG_LR_TEST33, RegTest33.octet);
+    /**/
+    RegDriftInvert.bits.invert_timing_error_per_symbol = !RegTest33.bits.invert_i_q;    
+    m_xcvr.write_reg(REG_LR_DRIFT_INVERT, RegDriftInvert.octet);
+}
+
 void SX127x_lora::start_tx(uint8_t len)
 {                   
     // DIO0 to TxDone