Diff: sx127x_lora.cpp

Revision:

26:4876e515ff4c

Parent:

23:1df3dddcb43e

Child:

27:da6341d9d5b1

--- a/sx127x_lora.cpp	Thu Oct 22 01:27:18 2015 +0000
+++ b/sx127x_lora.cpp	Mon Jul 18 21:13:50 2016 +0000
@@ -31,9 +31,6 @@
     if (m_xcvr.type == SX1276) {
         RegAutoDrift.octet = m_xcvr.read_reg(REG_LR_SX1276_AUTO_DRIFT);
     }
-    
-    // CRC for TX is disabled by default
-    setRxPayloadCrcOn(true);
 }
 
 SX127x_lora::~SX127x_lora()
@@ -115,11 +112,13 @@
 
 bool SX127x_lora::getHeaderMode(void)
 {
-    if (m_xcvr.type == SX1276)
+    if (m_xcvr.type == SX1276) {
+        RegModemConfig.octet = m_xcvr.read_reg(REG_LR_MODEMCONFIG);
         return RegModemConfig.sx1276bits.ImplicitHeaderModeOn;
-    else if (m_xcvr.type == SX1272)
+    } else if (m_xcvr.type == SX1272) {
+        RegModemConfig.octet = m_xcvr.read_reg(REG_LR_MODEMCONFIG);
         return RegModemConfig.sx1272bits.ImplicitHeaderModeOn;
-    else
+    } else
         return false;
 }
 
@@ -311,11 +310,15 @@
         
 bool SX127x_lora::getRxPayloadCrcOn(void)
 {
-    if (m_xcvr.type == SX1276)
+    /* RxPayloadCrcOn enables CRC generation in transmitter */
+    /* in implicit mode, this bit also enables CRC in receiver */
+    if (m_xcvr.type == SX1276) {
+        RegModemConfig2.octet = m_xcvr.read_reg(REG_LR_MODEMCONFIG2);
         return RegModemConfig2.sx1276bits.RxPayloadCrcOn;
-    else if (m_xcvr.type == SX1272)
+    } else if (m_xcvr.type == SX1272) {
+        RegModemConfig.octet = m_xcvr.read_reg(REG_LR_MODEMCONFIG);
         return RegModemConfig.sx1272bits.RxPayloadCrcOn;
-    else
+    } else
         return 0;
 }