Aditya Mehrotra / mbed-dev

Biomimetics MBED Library w/ Added Support for CAN3

Dependents:   CAN_TEST SPIne_Plus_DYNO_SENSORS SPIne_Plus_v2 SPIne_Plus_Dyno_v2

cmsis/TARGET_CORTEX_A/core_ca9.h@3:993b4d6ff61e, 2021-03-09 (annotated)

Committer:
adimmit
Date:
Tue Mar 09 20:33:24 2021 +0000
Revision:
3:993b4d6ff61e
Parent:
0:083111ae2a11 
added CAN3

Who changed what in which revision?

UserRevisionLine numberNew contents of line
saloutos 0:083111ae2a11 1 /**************************************************************************//**
saloutos 0:083111ae2a11 2 * @file core_ca9.h
saloutos 0:083111ae2a11 3 * @brief CMSIS Cortex-A9 Core Peripheral Access Layer Header File
saloutos 0:083111ae2a11 4 * @version
saloutos 0:083111ae2a11 5 * @date 25 March 2013
saloutos 0:083111ae2a11 6 *
saloutos 0:083111ae2a11 7 * @note
saloutos 0:083111ae2a11 8 *
saloutos 0:083111ae2a11 9 ******************************************************************************/
saloutos 0:083111ae2a11 10 /* Copyright (c) 2009 - 2012 ARM LIMITED
saloutos 0:083111ae2a11 11
saloutos 0:083111ae2a11 12 All rights reserved.
saloutos 0:083111ae2a11 13 Redistribution and use in source and binary forms, with or without
saloutos 0:083111ae2a11 14 modification, are permitted provided that the following conditions are met:
saloutos 0:083111ae2a11 15 - Redistributions of source code must retain the above copyright
saloutos 0:083111ae2a11 16 notice, this list of conditions and the following disclaimer.
saloutos 0:083111ae2a11 17 - Redistributions in binary form must reproduce the above copyright
saloutos 0:083111ae2a11 18 notice, this list of conditions and the following disclaimer in the
saloutos 0:083111ae2a11 19 documentation and/or other materials provided with the distribution.
saloutos 0:083111ae2a11 20 - Neither the name of ARM nor the names of its contributors may be used
saloutos 0:083111ae2a11 21 to endorse or promote products derived from this software without
saloutos 0:083111ae2a11 22 specific prior written permission.
saloutos 0:083111ae2a11 23 *
saloutos 0:083111ae2a11 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
saloutos 0:083111ae2a11 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
saloutos 0:083111ae2a11 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
saloutos 0:083111ae2a11 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
saloutos 0:083111ae2a11 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
saloutos 0:083111ae2a11 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
saloutos 0:083111ae2a11 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
saloutos 0:083111ae2a11 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
saloutos 0:083111ae2a11 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
saloutos 0:083111ae2a11 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
saloutos 0:083111ae2a11 34 POSSIBILITY OF SUCH DAMAGE.
saloutos 0:083111ae2a11 35 ---------------------------------------------------------------------------*/
saloutos 0:083111ae2a11 36
saloutos 0:083111ae2a11 37
saloutos 0:083111ae2a11 38 #if defined ( __ICCARM__ )
saloutos 0:083111ae2a11 39 #pragma system_include /* treat file as system include file for MISRA check */
saloutos 0:083111ae2a11 40 #endif
saloutos 0:083111ae2a11 41
saloutos 0:083111ae2a11 42 #ifdef __cplusplus
saloutos 0:083111ae2a11 43 extern "C" {
saloutos 0:083111ae2a11 44 #endif
saloutos 0:083111ae2a11 45
saloutos 0:083111ae2a11 46 #ifndef __CORE_CA9_H_GENERIC
saloutos 0:083111ae2a11 47 #define __CORE_CA9_H_GENERIC
saloutos 0:083111ae2a11 48
saloutos 0:083111ae2a11 49
saloutos 0:083111ae2a11 50 /** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
saloutos 0:083111ae2a11 51 CMSIS violates the following MISRA-C:2004 rules:
saloutos 0:083111ae2a11 52
saloutos 0:083111ae2a11 53 \li Required Rule 8.5, object/function definition in header file.<br>
saloutos 0:083111ae2a11 54 Function definitions in header files are used to allow 'inlining'.
saloutos 0:083111ae2a11 55
saloutos 0:083111ae2a11 56 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
saloutos 0:083111ae2a11 57 Unions are used for effective representation of core registers.
saloutos 0:083111ae2a11 58
saloutos 0:083111ae2a11 59 \li Advisory Rule 19.7, Function-like macro defined.<br>
saloutos 0:083111ae2a11 60 Function-like macros are used to allow more efficient code.
saloutos 0:083111ae2a11 61 */
saloutos 0:083111ae2a11 62
saloutos 0:083111ae2a11 63
saloutos 0:083111ae2a11 64 /*******************************************************************************
saloutos 0:083111ae2a11 65 * CMSIS definitions
saloutos 0:083111ae2a11 66 ******************************************************************************/
saloutos 0:083111ae2a11 67 /** \ingroup Cortex_A9
saloutos 0:083111ae2a11 68 @{
saloutos 0:083111ae2a11 69 */
saloutos 0:083111ae2a11 70
saloutos 0:083111ae2a11 71 /* CMSIS CA9 definitions */
saloutos 0:083111ae2a11 72 #define __CA9_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
saloutos 0:083111ae2a11 73 #define __CA9_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */
saloutos 0:083111ae2a11 74 #define __CA9_CMSIS_VERSION ((__CA9_CMSIS_VERSION_MAIN << 16) | \
saloutos 0:083111ae2a11 75 __CA9_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
saloutos 0:083111ae2a11 76
saloutos 0:083111ae2a11 77 #define __CORTEX_A (0x09) /*!< Cortex-A Core */
saloutos 0:083111ae2a11 78
saloutos 0:083111ae2a11 79
saloutos 0:083111ae2a11 80 #if defined ( __CC_ARM )
saloutos 0:083111ae2a11 81 #define __ASM __asm /*!< asm keyword for ARM Compiler */
saloutos 0:083111ae2a11 82 #define __INLINE __inline /*!< inline keyword for ARM Compiler */
saloutos 0:083111ae2a11 83 #define __STATIC_INLINE static __inline
saloutos 0:083111ae2a11 84 #define __STATIC_ASM static __asm
saloutos 0:083111ae2a11 85
saloutos 0:083111ae2a11 86 #elif defined ( __ICCARM__ )
saloutos 0:083111ae2a11 87 #define __ASM __asm /*!< asm keyword for IAR Compiler */
saloutos 0:083111ae2a11 88 #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
saloutos 0:083111ae2a11 89 #define __STATIC_INLINE static inline
saloutos 0:083111ae2a11 90 #define __STATIC_ASM static __asm
saloutos 0:083111ae2a11 91
saloutos 0:083111ae2a11 92 #include <stdint.h>
saloutos 0:083111ae2a11 93 inline uint32_t __get_PSR(void) {
saloutos 0:083111ae2a11 94 __ASM("mrs r0, cpsr");
saloutos 0:083111ae2a11 95 }
saloutos 0:083111ae2a11 96
saloutos 0:083111ae2a11 97 #elif defined ( __TMS470__ )
saloutos 0:083111ae2a11 98 #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
saloutos 0:083111ae2a11 99 #define __STATIC_INLINE static inline
saloutos 0:083111ae2a11 100 #define __STATIC_ASM static __asm
saloutos 0:083111ae2a11 101
saloutos 0:083111ae2a11 102 #elif defined ( __GNUC__ )
saloutos 0:083111ae2a11 103 #define __ASM __asm /*!< asm keyword for GNU Compiler */
saloutos 0:083111ae2a11 104 #define __INLINE inline /*!< inline keyword for GNU Compiler */
saloutos 0:083111ae2a11 105 #define __STATIC_INLINE static inline
saloutos 0:083111ae2a11 106 #define __STATIC_ASM static __asm
saloutos 0:083111ae2a11 107
saloutos 0:083111ae2a11 108 #elif defined ( __TASKING__ )
saloutos 0:083111ae2a11 109 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
saloutos 0:083111ae2a11 110 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
saloutos 0:083111ae2a11 111 #define __STATIC_INLINE static inline
saloutos 0:083111ae2a11 112 #define __STATIC_ASM static __asm
saloutos 0:083111ae2a11 113
saloutos 0:083111ae2a11 114 #endif
saloutos 0:083111ae2a11 115
saloutos 0:083111ae2a11 116 /** __FPU_USED indicates whether an FPU is used or not. For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
saloutos 0:083111ae2a11 117 */
saloutos 0:083111ae2a11 118 #if defined ( __CC_ARM )
saloutos 0:083111ae2a11 119 #if defined __TARGET_FPU_VFP
saloutos 0:083111ae2a11 120 #if (__FPU_PRESENT == 1)
saloutos 0:083111ae2a11 121 #define __FPU_USED 1
saloutos 0:083111ae2a11 122 #else
saloutos 0:083111ae2a11 123 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
saloutos 0:083111ae2a11 124 #define __FPU_USED 0
saloutos 0:083111ae2a11 125 #endif
saloutos 0:083111ae2a11 126 #else
saloutos 0:083111ae2a11 127 #define __FPU_USED 0
saloutos 0:083111ae2a11 128 #endif
saloutos 0:083111ae2a11 129
saloutos 0:083111ae2a11 130 #elif defined ( __ICCARM__ )
saloutos 0:083111ae2a11 131 #if defined __ARMVFP__
saloutos 0:083111ae2a11 132 #if (__FPU_PRESENT == 1)
saloutos 0:083111ae2a11 133 #define __FPU_USED 1
saloutos 0:083111ae2a11 134 #else
saloutos 0:083111ae2a11 135 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
saloutos 0:083111ae2a11 136 #define __FPU_USED 0
saloutos 0:083111ae2a11 137 #endif
saloutos 0:083111ae2a11 138 #else
saloutos 0:083111ae2a11 139 #define __FPU_USED 0
saloutos 0:083111ae2a11 140 #endif
saloutos 0:083111ae2a11 141
saloutos 0:083111ae2a11 142 #elif defined ( __TMS470__ )
saloutos 0:083111ae2a11 143 #if defined __TI_VFP_SUPPORT__
saloutos 0:083111ae2a11 144 #if (__FPU_PRESENT == 1)
saloutos 0:083111ae2a11 145 #define __FPU_USED 1
saloutos 0:083111ae2a11 146 #else
saloutos 0:083111ae2a11 147 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
saloutos 0:083111ae2a11 148 #define __FPU_USED 0
saloutos 0:083111ae2a11 149 #endif
saloutos 0:083111ae2a11 150 #else
saloutos 0:083111ae2a11 151 #define __FPU_USED 0
saloutos 0:083111ae2a11 152 #endif
saloutos 0:083111ae2a11 153
saloutos 0:083111ae2a11 154 #elif defined ( __GNUC__ )
saloutos 0:083111ae2a11 155 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
saloutos 0:083111ae2a11 156 #if (__FPU_PRESENT == 1)
saloutos 0:083111ae2a11 157 #define __FPU_USED 1
saloutos 0:083111ae2a11 158 #else
saloutos 0:083111ae2a11 159 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
saloutos 0:083111ae2a11 160 #define __FPU_USED 0
saloutos 0:083111ae2a11 161 #endif
saloutos 0:083111ae2a11 162 #else
saloutos 0:083111ae2a11 163 #define __FPU_USED 0
saloutos 0:083111ae2a11 164 #endif
saloutos 0:083111ae2a11 165
saloutos 0:083111ae2a11 166 #elif defined ( __TASKING__ )
saloutos 0:083111ae2a11 167 #if defined __FPU_VFP__
saloutos 0:083111ae2a11 168 #if (__FPU_PRESENT == 1)
saloutos 0:083111ae2a11 169 #define __FPU_USED 1
saloutos 0:083111ae2a11 170 #else
saloutos 0:083111ae2a11 171 #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
saloutos 0:083111ae2a11 172 #define __FPU_USED 0
saloutos 0:083111ae2a11 173 #endif
saloutos 0:083111ae2a11 174 #else
saloutos 0:083111ae2a11 175 #define __FPU_USED 0
saloutos 0:083111ae2a11 176 #endif
saloutos 0:083111ae2a11 177 #endif
saloutos 0:083111ae2a11 178
saloutos 0:083111ae2a11 179 #include <stdint.h> /*!< standard types definitions */
saloutos 0:083111ae2a11 180 #include "core_caInstr.h" /*!< Core Instruction Access */
saloutos 0:083111ae2a11 181 #include "core_caFunc.h" /*!< Core Function Access */
saloutos 0:083111ae2a11 182 #include "core_cm4_simd.h" /*!< Compiler specific SIMD Intrinsics */
saloutos 0:083111ae2a11 183
saloutos 0:083111ae2a11 184 #endif /* __CORE_CA9_H_GENERIC */
saloutos 0:083111ae2a11 185
saloutos 0:083111ae2a11 186 #ifndef __CMSIS_GENERIC
saloutos 0:083111ae2a11 187
saloutos 0:083111ae2a11 188 #ifndef __CORE_CA9_H_DEPENDANT
saloutos 0:083111ae2a11 189 #define __CORE_CA9_H_DEPENDANT
saloutos 0:083111ae2a11 190
saloutos 0:083111ae2a11 191 /* check device defines and use defaults */
saloutos 0:083111ae2a11 192 #if defined __CHECK_DEVICE_DEFINES
saloutos 0:083111ae2a11 193 #ifndef __CA9_REV
saloutos 0:083111ae2a11 194 #define __CA9_REV 0x0000
saloutos 0:083111ae2a11 195 #warning "__CA9_REV not defined in device header file; using default!"
saloutos 0:083111ae2a11 196 #endif
saloutos 0:083111ae2a11 197
saloutos 0:083111ae2a11 198 #ifndef __FPU_PRESENT
saloutos 0:083111ae2a11 199 #define __FPU_PRESENT 1
saloutos 0:083111ae2a11 200 #warning "__FPU_PRESENT not defined in device header file; using default!"
saloutos 0:083111ae2a11 201 #endif
saloutos 0:083111ae2a11 202
saloutos 0:083111ae2a11 203 #ifndef __Vendor_SysTickConfig
saloutos 0:083111ae2a11 204 #define __Vendor_SysTickConfig 1
saloutos 0:083111ae2a11 205 #endif
saloutos 0:083111ae2a11 206
saloutos 0:083111ae2a11 207 #if __Vendor_SysTickConfig == 0
saloutos 0:083111ae2a11 208 #error "__Vendor_SysTickConfig set to 0, but vendor systick timer must be supplied for Cortex-A9"
saloutos 0:083111ae2a11 209 #endif
saloutos 0:083111ae2a11 210 #endif
saloutos 0:083111ae2a11 211
saloutos 0:083111ae2a11 212 /* IO definitions (access restrictions to peripheral registers) */
saloutos 0:083111ae2a11 213 /**
saloutos 0:083111ae2a11 214 \defgroup CMSIS_glob_defs CMSIS Global Defines
saloutos 0:083111ae2a11 215
saloutos 0:083111ae2a11 216 <strong>IO Type Qualifiers</strong> are used
saloutos 0:083111ae2a11 217 \li to specify the access to peripheral variables.
saloutos 0:083111ae2a11 218 \li for automatic generation of peripheral register debug information.
saloutos 0:083111ae2a11 219 */
saloutos 0:083111ae2a11 220 #ifdef __cplusplus
saloutos 0:083111ae2a11 221 #define __I volatile /*!< Defines 'read only' permissions */
saloutos 0:083111ae2a11 222 #else
saloutos 0:083111ae2a11 223 #define __I volatile const /*!< Defines 'read only' permissions */
saloutos 0:083111ae2a11 224 #endif
saloutos 0:083111ae2a11 225 #define __O volatile /*!< Defines 'write only' permissions */
saloutos 0:083111ae2a11 226 #define __IO volatile /*!< Defines 'read / write' permissions */
saloutos 0:083111ae2a11 227
saloutos 0:083111ae2a11 228 /*@} end of group Cortex_A9 */
saloutos 0:083111ae2a11 229
saloutos 0:083111ae2a11 230
saloutos 0:083111ae2a11 231 /*******************************************************************************
saloutos 0:083111ae2a11 232 * Register Abstraction
saloutos 0:083111ae2a11 233 ******************************************************************************/
saloutos 0:083111ae2a11 234 /** \defgroup CMSIS_core_register Defines and Type Definitions
saloutos 0:083111ae2a11 235 \brief Type definitions and defines for Cortex-A processor based devices.
saloutos 0:083111ae2a11 236 */
saloutos 0:083111ae2a11 237
saloutos 0:083111ae2a11 238 /** \ingroup CMSIS_core_register
saloutos 0:083111ae2a11 239 \defgroup CMSIS_CORE Status and Control Registers
saloutos 0:083111ae2a11 240 \brief Core Register type definitions.
saloutos 0:083111ae2a11 241 @{
saloutos 0:083111ae2a11 242 */
saloutos 0:083111ae2a11 243
saloutos 0:083111ae2a11 244 /** \brief Union type to access the Application Program Status Register (APSR).
saloutos 0:083111ae2a11 245 */
saloutos 0:083111ae2a11 246 typedef union
saloutos 0:083111ae2a11 247 {
saloutos 0:083111ae2a11 248 struct
saloutos 0:083111ae2a11 249 {
saloutos 0:083111ae2a11 250 uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
saloutos 0:083111ae2a11 251 uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
saloutos 0:083111ae2a11 252 uint32_t reserved1:7; /*!< bit: 20..23 Reserved */
saloutos 0:083111ae2a11 253 uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
saloutos 0:083111ae2a11 254 uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
saloutos 0:083111ae2a11 255 uint32_t C:1; /*!< bit: 29 Carry condition code flag */
saloutos 0:083111ae2a11 256 uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
saloutos 0:083111ae2a11 257 uint32_t N:1; /*!< bit: 31 Negative condition code flag */
saloutos 0:083111ae2a11 258 } b; /*!< Structure used for bit access */
saloutos 0:083111ae2a11 259 uint32_t w; /*!< Type used for word access */
saloutos 0:083111ae2a11 260 } APSR_Type;
saloutos 0:083111ae2a11 261
saloutos 0:083111ae2a11 262
saloutos 0:083111ae2a11 263 /*@} end of group CMSIS_CORE */
saloutos 0:083111ae2a11 264
saloutos 0:083111ae2a11 265 /*@} end of CMSIS_Core_FPUFunctions */
saloutos 0:083111ae2a11 266
saloutos 0:083111ae2a11 267
saloutos 0:083111ae2a11 268 #endif /* __CORE_CA9_H_GENERIC */
saloutos 0:083111ae2a11 269
saloutos 0:083111ae2a11 270 #endif /* __CMSIS_GENERIC */
saloutos 0:083111ae2a11 271
saloutos 0:083111ae2a11 272 #ifdef __cplusplus
saloutos 0:083111ae2a11 273 }
saloutos 0:083111ae2a11 274
saloutos 0:083111ae2a11 275
saloutos 0:083111ae2a11 276 #endif