Aditya Mehrotra / mbed-dev

Biomimetics MBED Library w/ Added Support for CAN3

Dependents:   CAN_TEST SPIne_Plus_DYNO_SENSORS SPIne_Plus_v2 SPIne_Plus_Dyno_v2

cmsis/TARGET_CORTEX_A/core_cmInstr.h@3:993b4d6ff61e, 2021-03-09 (annotated)

Committer:
adimmit
Date:
Tue Mar 09 20:33:24 2021 +0000
Revision:
3:993b4d6ff61e
Parent:
0:083111ae2a11 
added CAN3

Who changed what in which revision?

UserRevisionLine numberNew contents of line
saloutos 0:083111ae2a11 1 /**************************************************************************//**
saloutos 0:083111ae2a11 2 * @file core_cmInstr.h
saloutos 0:083111ae2a11 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
saloutos 0:083111ae2a11 4 * @version V4.10
saloutos 0:083111ae2a11 5 * @date 18. March 2015
saloutos 0:083111ae2a11 6 *
saloutos 0:083111ae2a11 7 * @note
saloutos 0:083111ae2a11 8 *
saloutos 0:083111ae2a11 9 ******************************************************************************/
saloutos 0:083111ae2a11 10 /* Copyright (c) 2009 - 2014 ARM LIMITED
saloutos 0:083111ae2a11 11
saloutos 0:083111ae2a11 12 All rights reserved.
saloutos 0:083111ae2a11 13 Redistribution and use in source and binary forms, with or without
saloutos 0:083111ae2a11 14 modification, are permitted provided that the following conditions are met:
saloutos 0:083111ae2a11 15 - Redistributions of source code must retain the above copyright
saloutos 0:083111ae2a11 16 notice, this list of conditions and the following disclaimer.
saloutos 0:083111ae2a11 17 - Redistributions in binary form must reproduce the above copyright
saloutos 0:083111ae2a11 18 notice, this list of conditions and the following disclaimer in the
saloutos 0:083111ae2a11 19 documentation and/or other materials provided with the distribution.
saloutos 0:083111ae2a11 20 - Neither the name of ARM nor the names of its contributors may be used
saloutos 0:083111ae2a11 21 to endorse or promote products derived from this software without
saloutos 0:083111ae2a11 22 specific prior written permission.
saloutos 0:083111ae2a11 23 *
saloutos 0:083111ae2a11 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
saloutos 0:083111ae2a11 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
saloutos 0:083111ae2a11 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
saloutos 0:083111ae2a11 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
saloutos 0:083111ae2a11 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
saloutos 0:083111ae2a11 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
saloutos 0:083111ae2a11 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
saloutos 0:083111ae2a11 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
saloutos 0:083111ae2a11 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
saloutos 0:083111ae2a11 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
saloutos 0:083111ae2a11 34 POSSIBILITY OF SUCH DAMAGE.
saloutos 0:083111ae2a11 35 ---------------------------------------------------------------------------*/
saloutos 0:083111ae2a11 36
saloutos 0:083111ae2a11 37
saloutos 0:083111ae2a11 38 #ifndef __CORE_CMINSTR_H
saloutos 0:083111ae2a11 39 #define __CORE_CMINSTR_H
saloutos 0:083111ae2a11 40
saloutos 0:083111ae2a11 41
saloutos 0:083111ae2a11 42 /* ########################## Core Instruction Access ######################### */
saloutos 0:083111ae2a11 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
saloutos 0:083111ae2a11 44 Access to dedicated instructions
saloutos 0:083111ae2a11 45 @{
saloutos 0:083111ae2a11 46 */
saloutos 0:083111ae2a11 47
saloutos 0:083111ae2a11 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
saloutos 0:083111ae2a11 49 /* ARM armcc specific functions */
saloutos 0:083111ae2a11 50
saloutos 0:083111ae2a11 51 #if (__ARMCC_VERSION < 400677)
saloutos 0:083111ae2a11 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
saloutos 0:083111ae2a11 53 #endif
saloutos 0:083111ae2a11 54
saloutos 0:083111ae2a11 55
saloutos 0:083111ae2a11 56 /** \brief No Operation
saloutos 0:083111ae2a11 57
saloutos 0:083111ae2a11 58 No Operation does nothing. This instruction can be used for code alignment purposes.
saloutos 0:083111ae2a11 59 */
saloutos 0:083111ae2a11 60 #define __NOP __nop
saloutos 0:083111ae2a11 61
saloutos 0:083111ae2a11 62
saloutos 0:083111ae2a11 63 /** \brief Wait For Interrupt
saloutos 0:083111ae2a11 64
saloutos 0:083111ae2a11 65 Wait For Interrupt is a hint instruction that suspends execution
saloutos 0:083111ae2a11 66 until one of a number of events occurs.
saloutos 0:083111ae2a11 67 */
saloutos 0:083111ae2a11 68 #define __WFI __wfi
saloutos 0:083111ae2a11 69
saloutos 0:083111ae2a11 70
saloutos 0:083111ae2a11 71 /** \brief Wait For Event
saloutos 0:083111ae2a11 72
saloutos 0:083111ae2a11 73 Wait For Event is a hint instruction that permits the processor to enter
saloutos 0:083111ae2a11 74 a low-power state until one of a number of events occurs.
saloutos 0:083111ae2a11 75 */
saloutos 0:083111ae2a11 76 #define __WFE __wfe
saloutos 0:083111ae2a11 77
saloutos 0:083111ae2a11 78
saloutos 0:083111ae2a11 79 /** \brief Send Event
saloutos 0:083111ae2a11 80
saloutos 0:083111ae2a11 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
saloutos 0:083111ae2a11 82 */
saloutos 0:083111ae2a11 83 #define __SEV __sev
saloutos 0:083111ae2a11 84
saloutos 0:083111ae2a11 85
saloutos 0:083111ae2a11 86 /** \brief Instruction Synchronization Barrier
saloutos 0:083111ae2a11 87
saloutos 0:083111ae2a11 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
saloutos 0:083111ae2a11 89 so that all instructions following the ISB are fetched from cache or
saloutos 0:083111ae2a11 90 memory, after the instruction has been completed.
saloutos 0:083111ae2a11 91 */
saloutos 0:083111ae2a11 92 #define __ISB() do {\
saloutos 0:083111ae2a11 93 __schedule_barrier();\
saloutos 0:083111ae2a11 94 __isb(0xF);\
saloutos 0:083111ae2a11 95 __schedule_barrier();\
saloutos 0:083111ae2a11 96 } while (0)
saloutos 0:083111ae2a11 97
saloutos 0:083111ae2a11 98 /** \brief Data Synchronization Barrier
saloutos 0:083111ae2a11 99
saloutos 0:083111ae2a11 100 This function acts as a special kind of Data Memory Barrier.
saloutos 0:083111ae2a11 101 It completes when all explicit memory accesses before this instruction complete.
saloutos 0:083111ae2a11 102 */
saloutos 0:083111ae2a11 103 #define __DSB() do {\
saloutos 0:083111ae2a11 104 __schedule_barrier();\
saloutos 0:083111ae2a11 105 __dsb(0xF);\
saloutos 0:083111ae2a11 106 __schedule_barrier();\
saloutos 0:083111ae2a11 107 } while (0)
saloutos 0:083111ae2a11 108
saloutos 0:083111ae2a11 109 /** \brief Data Memory Barrier
saloutos 0:083111ae2a11 110
saloutos 0:083111ae2a11 111 This function ensures the apparent order of the explicit memory operations before
saloutos 0:083111ae2a11 112 and after the instruction, without ensuring their completion.
saloutos 0:083111ae2a11 113 */
saloutos 0:083111ae2a11 114 #define __DMB() do {\
saloutos 0:083111ae2a11 115 __schedule_barrier();\
saloutos 0:083111ae2a11 116 __dmb(0xF);\
saloutos 0:083111ae2a11 117 __schedule_barrier();\
saloutos 0:083111ae2a11 118 } while (0)
saloutos 0:083111ae2a11 119
saloutos 0:083111ae2a11 120 /** \brief Reverse byte order (32 bit)
saloutos 0:083111ae2a11 121
saloutos 0:083111ae2a11 122 This function reverses the byte order in integer value.
saloutos 0:083111ae2a11 123
saloutos 0:083111ae2a11 124 \param [in] value Value to reverse
saloutos 0:083111ae2a11 125 \return Reversed value
saloutos 0:083111ae2a11 126 */
saloutos 0:083111ae2a11 127 #define __REV __rev
saloutos 0:083111ae2a11 128
saloutos 0:083111ae2a11 129
saloutos 0:083111ae2a11 130 /** \brief Reverse byte order (16 bit)
saloutos 0:083111ae2a11 131
saloutos 0:083111ae2a11 132 This function reverses the byte order in two unsigned short values.
saloutos 0:083111ae2a11 133
saloutos 0:083111ae2a11 134 \param [in] value Value to reverse
saloutos 0:083111ae2a11 135 \return Reversed value
saloutos 0:083111ae2a11 136 */
saloutos 0:083111ae2a11 137 #ifndef __NO_EMBEDDED_ASM
saloutos 0:083111ae2a11 138 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
saloutos 0:083111ae2a11 139 {
saloutos 0:083111ae2a11 140 rev16 r0, r0
saloutos 0:083111ae2a11 141 bx lr
saloutos 0:083111ae2a11 142 }
saloutos 0:083111ae2a11 143 #endif
saloutos 0:083111ae2a11 144
saloutos 0:083111ae2a11 145 /** \brief Reverse byte order in signed short value
saloutos 0:083111ae2a11 146
saloutos 0:083111ae2a11 147 This function reverses the byte order in a signed short value with sign extension to integer.
saloutos 0:083111ae2a11 148
saloutos 0:083111ae2a11 149 \param [in] value Value to reverse
saloutos 0:083111ae2a11 150 \return Reversed value
saloutos 0:083111ae2a11 151 */
saloutos 0:083111ae2a11 152 #ifndef __NO_EMBEDDED_ASM
saloutos 0:083111ae2a11 153 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
saloutos 0:083111ae2a11 154 {
saloutos 0:083111ae2a11 155 revsh r0, r0
saloutos 0:083111ae2a11 156 bx lr
saloutos 0:083111ae2a11 157 }
saloutos 0:083111ae2a11 158 #endif
saloutos 0:083111ae2a11 159
saloutos 0:083111ae2a11 160
saloutos 0:083111ae2a11 161 /** \brief Rotate Right in unsigned value (32 bit)
saloutos 0:083111ae2a11 162
saloutos 0:083111ae2a11 163 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
saloutos 0:083111ae2a11 164
saloutos 0:083111ae2a11 165 \param [in] value Value to rotate
saloutos 0:083111ae2a11 166 \param [in] value Number of Bits to rotate
saloutos 0:083111ae2a11 167 \return Rotated value
saloutos 0:083111ae2a11 168 */
saloutos 0:083111ae2a11 169 #define __ROR __ror
saloutos 0:083111ae2a11 170
saloutos 0:083111ae2a11 171
saloutos 0:083111ae2a11 172 /** \brief Breakpoint
saloutos 0:083111ae2a11 173
saloutos 0:083111ae2a11 174 This function causes the processor to enter Debug state.
saloutos 0:083111ae2a11 175 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
saloutos 0:083111ae2a11 176
saloutos 0:083111ae2a11 177 \param [in] value is ignored by the processor.
saloutos 0:083111ae2a11 178 If required, a debugger can use it to store additional information about the breakpoint.
saloutos 0:083111ae2a11 179 */
saloutos 0:083111ae2a11 180 #define __BKPT(value) __breakpoint(value)
saloutos 0:083111ae2a11 181
saloutos 0:083111ae2a11 182
saloutos 0:083111ae2a11 183 /** \brief Reverse bit order of value
saloutos 0:083111ae2a11 184
saloutos 0:083111ae2a11 185 This function reverses the bit order of the given value.
saloutos 0:083111ae2a11 186
saloutos 0:083111ae2a11 187 \param [in] value Value to reverse
saloutos 0:083111ae2a11 188 \return Reversed value
saloutos 0:083111ae2a11 189 */
saloutos 0:083111ae2a11 190 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
saloutos 0:083111ae2a11 191 #define __RBIT __rbit
saloutos 0:083111ae2a11 192 #else
saloutos 0:083111ae2a11 193 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
saloutos 0:083111ae2a11 194 {
saloutos 0:083111ae2a11 195 uint32_t result;
saloutos 0:083111ae2a11 196 int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end
saloutos 0:083111ae2a11 197
saloutos 0:083111ae2a11 198 result = value; // r will be reversed bits of v; first get LSB of v
saloutos 0:083111ae2a11 199 for (value >>= 1; value; value >>= 1)
saloutos 0:083111ae2a11 200 {
saloutos 0:083111ae2a11 201 result <<= 1;
saloutos 0:083111ae2a11 202 result |= value & 1;
saloutos 0:083111ae2a11 203 s--;
saloutos 0:083111ae2a11 204 }
saloutos 0:083111ae2a11 205 result <<= s; // shift when v's highest bits are zero
saloutos 0:083111ae2a11 206 return(result);
saloutos 0:083111ae2a11 207 }
saloutos 0:083111ae2a11 208 #endif
saloutos 0:083111ae2a11 209
saloutos 0:083111ae2a11 210
saloutos 0:083111ae2a11 211 /** \brief Count leading zeros
saloutos 0:083111ae2a11 212
saloutos 0:083111ae2a11 213 This function counts the number of leading zeros of a data value.
saloutos 0:083111ae2a11 214
saloutos 0:083111ae2a11 215 \param [in] value Value to count the leading zeros
saloutos 0:083111ae2a11 216 \return number of leading zeros in value
saloutos 0:083111ae2a11 217 */
saloutos 0:083111ae2a11 218 #define __CLZ __clz
saloutos 0:083111ae2a11 219
saloutos 0:083111ae2a11 220
saloutos 0:083111ae2a11 221 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
saloutos 0:083111ae2a11 222
saloutos 0:083111ae2a11 223 /** \brief LDR Exclusive (8 bit)
saloutos 0:083111ae2a11 224
saloutos 0:083111ae2a11 225 This function executes a exclusive LDR instruction for 8 bit value.
saloutos 0:083111ae2a11 226
saloutos 0:083111ae2a11 227 \param [in] ptr Pointer to data
saloutos 0:083111ae2a11 228 \return value of type uint8_t at (*ptr)
saloutos 0:083111ae2a11 229 */
saloutos 0:083111ae2a11 230 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
saloutos 0:083111ae2a11 231
saloutos 0:083111ae2a11 232
saloutos 0:083111ae2a11 233 /** \brief LDR Exclusive (16 bit)
saloutos 0:083111ae2a11 234
saloutos 0:083111ae2a11 235 This function executes a exclusive LDR instruction for 16 bit values.
saloutos 0:083111ae2a11 236
saloutos 0:083111ae2a11 237 \param [in] ptr Pointer to data
saloutos 0:083111ae2a11 238 \return value of type uint16_t at (*ptr)
saloutos 0:083111ae2a11 239 */
saloutos 0:083111ae2a11 240 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
saloutos 0:083111ae2a11 241
saloutos 0:083111ae2a11 242
saloutos 0:083111ae2a11 243 /** \brief LDR Exclusive (32 bit)
saloutos 0:083111ae2a11 244
saloutos 0:083111ae2a11 245 This function executes a exclusive LDR instruction for 32 bit values.
saloutos 0:083111ae2a11 246
saloutos 0:083111ae2a11 247 \param [in] ptr Pointer to data
saloutos 0:083111ae2a11 248 \return value of type uint32_t at (*ptr)
saloutos 0:083111ae2a11 249 */
saloutos 0:083111ae2a11 250 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
saloutos 0:083111ae2a11 251
saloutos 0:083111ae2a11 252
saloutos 0:083111ae2a11 253 /** \brief STR Exclusive (8 bit)
saloutos 0:083111ae2a11 254
saloutos 0:083111ae2a11 255 This function executes a exclusive STR instruction for 8 bit values.
saloutos 0:083111ae2a11 256
saloutos 0:083111ae2a11 257 \param [in] value Value to store
saloutos 0:083111ae2a11 258 \param [in] ptr Pointer to location
saloutos 0:083111ae2a11 259 \return 0 Function succeeded
saloutos 0:083111ae2a11 260 \return 1 Function failed
saloutos 0:083111ae2a11 261 */
saloutos 0:083111ae2a11 262 #define __STREXB(value, ptr) __strex(value, ptr)
saloutos 0:083111ae2a11 263
saloutos 0:083111ae2a11 264
saloutos 0:083111ae2a11 265 /** \brief STR Exclusive (16 bit)
saloutos 0:083111ae2a11 266
saloutos 0:083111ae2a11 267 This function executes a exclusive STR instruction for 16 bit values.
saloutos 0:083111ae2a11 268
saloutos 0:083111ae2a11 269 \param [in] value Value to store
saloutos 0:083111ae2a11 270 \param [in] ptr Pointer to location
saloutos 0:083111ae2a11 271 \return 0 Function succeeded
saloutos 0:083111ae2a11 272 \return 1 Function failed
saloutos 0:083111ae2a11 273 */
saloutos 0:083111ae2a11 274 #define __STREXH(value, ptr) __strex(value, ptr)
saloutos 0:083111ae2a11 275
saloutos 0:083111ae2a11 276
saloutos 0:083111ae2a11 277 /** \brief STR Exclusive (32 bit)
saloutos 0:083111ae2a11 278
saloutos 0:083111ae2a11 279 This function executes a exclusive STR instruction for 32 bit values.
saloutos 0:083111ae2a11 280
saloutos 0:083111ae2a11 281 \param [in] value Value to store
saloutos 0:083111ae2a11 282 \param [in] ptr Pointer to location
saloutos 0:083111ae2a11 283 \return 0 Function succeeded
saloutos 0:083111ae2a11 284 \return 1 Function failed
saloutos 0:083111ae2a11 285 */
saloutos 0:083111ae2a11 286 #define __STREXW(value, ptr) __strex(value, ptr)
saloutos 0:083111ae2a11 287
saloutos 0:083111ae2a11 288
saloutos 0:083111ae2a11 289 /** \brief Remove the exclusive lock
saloutos 0:083111ae2a11 290
saloutos 0:083111ae2a11 291 This function removes the exclusive lock which is created by LDREX.
saloutos 0:083111ae2a11 292
saloutos 0:083111ae2a11 293 */
saloutos 0:083111ae2a11 294 #define __CLREX __clrex
saloutos 0:083111ae2a11 295
saloutos 0:083111ae2a11 296
saloutos 0:083111ae2a11 297 /** \brief Signed Saturate
saloutos 0:083111ae2a11 298
saloutos 0:083111ae2a11 299 This function saturates a signed value.
saloutos 0:083111ae2a11 300
saloutos 0:083111ae2a11 301 \param [in] value Value to be saturated
saloutos 0:083111ae2a11 302 \param [in] sat Bit position to saturate to (1..32)
saloutos 0:083111ae2a11 303 \return Saturated value
saloutos 0:083111ae2a11 304 */
saloutos 0:083111ae2a11 305 #define __SSAT __ssat
saloutos 0:083111ae2a11 306
saloutos 0:083111ae2a11 307
saloutos 0:083111ae2a11 308 /** \brief Unsigned Saturate
saloutos 0:083111ae2a11 309
saloutos 0:083111ae2a11 310 This function saturates an unsigned value.
saloutos 0:083111ae2a11 311
saloutos 0:083111ae2a11 312 \param [in] value Value to be saturated
saloutos 0:083111ae2a11 313 \param [in] sat Bit position to saturate to (0..31)
saloutos 0:083111ae2a11 314 \return Saturated value
saloutos 0:083111ae2a11 315 */
saloutos 0:083111ae2a11 316 #define __USAT __usat
saloutos 0:083111ae2a11 317
saloutos 0:083111ae2a11 318
saloutos 0:083111ae2a11 319 /** \brief Rotate Right with Extend (32 bit)
saloutos 0:083111ae2a11 320
saloutos 0:083111ae2a11 321 This function moves each bit of a bitstring right by one bit.
saloutos 0:083111ae2a11 322 The carry input is shifted in at the left end of the bitstring.
saloutos 0:083111ae2a11 323
saloutos 0:083111ae2a11 324 \param [in] value Value to rotate
saloutos 0:083111ae2a11 325 \return Rotated value
saloutos 0:083111ae2a11 326 */
saloutos 0:083111ae2a11 327 #ifndef __NO_EMBEDDED_ASM
saloutos 0:083111ae2a11 328 __attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
saloutos 0:083111ae2a11 329 {
saloutos 0:083111ae2a11 330 rrx r0, r0
saloutos 0:083111ae2a11 331 bx lr
saloutos 0:083111ae2a11 332 }
saloutos 0:083111ae2a11 333 #endif
saloutos 0:083111ae2a11 334
saloutos 0:083111ae2a11 335
saloutos 0:083111ae2a11 336 /** \brief LDRT Unprivileged (8 bit)
saloutos 0:083111ae2a11 337
saloutos 0:083111ae2a11 338 This function executes a Unprivileged LDRT instruction for 8 bit value.
saloutos 0:083111ae2a11 339
saloutos 0:083111ae2a11 340 \param [in] ptr Pointer to data
saloutos 0:083111ae2a11 341 \return value of type uint8_t at (*ptr)
saloutos 0:083111ae2a11 342 */
saloutos 0:083111ae2a11 343 #define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
saloutos 0:083111ae2a11 344
saloutos 0:083111ae2a11 345
saloutos 0:083111ae2a11 346 /** \brief LDRT Unprivileged (16 bit)
saloutos 0:083111ae2a11 347
saloutos 0:083111ae2a11 348 This function executes a Unprivileged LDRT instruction for 16 bit values.
saloutos 0:083111ae2a11 349
saloutos 0:083111ae2a11 350 \param [in] ptr Pointer to data
saloutos 0:083111ae2a11 351 \return value of type uint16_t at (*ptr)
saloutos 0:083111ae2a11 352 */
saloutos 0:083111ae2a11 353 #define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
saloutos 0:083111ae2a11 354
saloutos 0:083111ae2a11 355
saloutos 0:083111ae2a11 356 /** \brief LDRT Unprivileged (32 bit)
saloutos 0:083111ae2a11 357
saloutos 0:083111ae2a11 358 This function executes a Unprivileged LDRT instruction for 32 bit values.
saloutos 0:083111ae2a11 359
saloutos 0:083111ae2a11 360 \param [in] ptr Pointer to data
saloutos 0:083111ae2a11 361 \return value of type uint32_t at (*ptr)
saloutos 0:083111ae2a11 362 */
saloutos 0:083111ae2a11 363 #define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
saloutos 0:083111ae2a11 364
saloutos 0:083111ae2a11 365
saloutos 0:083111ae2a11 366 /** \brief STRT Unprivileged (8 bit)
saloutos 0:083111ae2a11 367
saloutos 0:083111ae2a11 368 This function executes a Unprivileged STRT instruction for 8 bit values.
saloutos 0:083111ae2a11 369
saloutos 0:083111ae2a11 370 \param [in] value Value to store
saloutos 0:083111ae2a11 371 \param [in] ptr Pointer to location
saloutos 0:083111ae2a11 372 */
saloutos 0:083111ae2a11 373 #define __STRBT(value, ptr) __strt(value, ptr)
saloutos 0:083111ae2a11 374
saloutos 0:083111ae2a11 375
saloutos 0:083111ae2a11 376 /** \brief STRT Unprivileged (16 bit)
saloutos 0:083111ae2a11 377
saloutos 0:083111ae2a11 378 This function executes a Unprivileged STRT instruction for 16 bit values.
saloutos 0:083111ae2a11 379
saloutos 0:083111ae2a11 380 \param [in] value Value to store
saloutos 0:083111ae2a11 381 \param [in] ptr Pointer to location
saloutos 0:083111ae2a11 382 */
saloutos 0:083111ae2a11 383 #define __STRHT(value, ptr) __strt(value, ptr)
saloutos 0:083111ae2a11 384
saloutos 0:083111ae2a11 385
saloutos 0:083111ae2a11 386 /** \brief STRT Unprivileged (32 bit)
saloutos 0:083111ae2a11 387
saloutos 0:083111ae2a11 388 This function executes a Unprivileged STRT instruction for 32 bit values.
saloutos 0:083111ae2a11 389
saloutos 0:083111ae2a11 390 \param [in] value Value to store
saloutos 0:083111ae2a11 391 \param [in] ptr Pointer to location
saloutos 0:083111ae2a11 392 */
saloutos 0:083111ae2a11 393 #define __STRT(value, ptr) __strt(value, ptr)
saloutos 0:083111ae2a11 394
saloutos 0:083111ae2a11 395 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
saloutos 0:083111ae2a11 396
saloutos 0:083111ae2a11 397
saloutos 0:083111ae2a11 398 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
saloutos 0:083111ae2a11 399 /* GNU gcc specific functions */
saloutos 0:083111ae2a11 400
saloutos 0:083111ae2a11 401 /* Define macros for porting to both thumb1 and thumb2.
saloutos 0:083111ae2a11 402 * For thumb1, use low register (r0-r7), specified by constrant "l"
saloutos 0:083111ae2a11 403 * Otherwise, use general registers, specified by constrant "r" */
saloutos 0:083111ae2a11 404 #if defined (__thumb__) && !defined (__thumb2__)
saloutos 0:083111ae2a11 405 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
saloutos 0:083111ae2a11 406 #define __CMSIS_GCC_USE_REG(r) "l" (r)
saloutos 0:083111ae2a11 407 #else
saloutos 0:083111ae2a11 408 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
saloutos 0:083111ae2a11 409 #define __CMSIS_GCC_USE_REG(r) "r" (r)
saloutos 0:083111ae2a11 410 #endif
saloutos 0:083111ae2a11 411
saloutos 0:083111ae2a11 412 /** \brief No Operation
saloutos 0:083111ae2a11 413
saloutos 0:083111ae2a11 414 No Operation does nothing. This instruction can be used for code alignment purposes.
saloutos 0:083111ae2a11 415 */
saloutos 0:083111ae2a11 416 __attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
saloutos 0:083111ae2a11 417 {
saloutos 0:083111ae2a11 418 __ASM volatile ("nop");
saloutos 0:083111ae2a11 419 }
saloutos 0:083111ae2a11 420
saloutos 0:083111ae2a11 421
saloutos 0:083111ae2a11 422 /** \brief Wait For Interrupt
saloutos 0:083111ae2a11 423
saloutos 0:083111ae2a11 424 Wait For Interrupt is a hint instruction that suspends execution
saloutos 0:083111ae2a11 425 until one of a number of events occurs.
saloutos 0:083111ae2a11 426 */
saloutos 0:083111ae2a11 427 __attribute__((always_inline)) __STATIC_INLINE void __WFI(void)
saloutos 0:083111ae2a11 428 {
saloutos 0:083111ae2a11 429 __ASM volatile ("wfi");
saloutos 0:083111ae2a11 430 }
saloutos 0:083111ae2a11 431
saloutos 0:083111ae2a11 432
saloutos 0:083111ae2a11 433 /** \brief Wait For Event
saloutos 0:083111ae2a11 434
saloutos 0:083111ae2a11 435 Wait For Event is a hint instruction that permits the processor to enter
saloutos 0:083111ae2a11 436 a low-power state until one of a number of events occurs.
saloutos 0:083111ae2a11 437 */
saloutos 0:083111ae2a11 438 __attribute__((always_inline)) __STATIC_INLINE void __WFE(void)
saloutos 0:083111ae2a11 439 {
saloutos 0:083111ae2a11 440 __ASM volatile ("wfe");
saloutos 0:083111ae2a11 441 }
saloutos 0:083111ae2a11 442
saloutos 0:083111ae2a11 443
saloutos 0:083111ae2a11 444 /** \brief Send Event
saloutos 0:083111ae2a11 445
saloutos 0:083111ae2a11 446 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
saloutos 0:083111ae2a11 447 */
saloutos 0:083111ae2a11 448 __attribute__((always_inline)) __STATIC_INLINE void __SEV(void)
saloutos 0:083111ae2a11 449 {
saloutos 0:083111ae2a11 450 __ASM volatile ("sev");
saloutos 0:083111ae2a11 451 }
saloutos 0:083111ae2a11 452
saloutos 0:083111ae2a11 453
saloutos 0:083111ae2a11 454 /** \brief Instruction Synchronization Barrier
saloutos 0:083111ae2a11 455
saloutos 0:083111ae2a11 456 Instruction Synchronization Barrier flushes the pipeline in the processor,
saloutos 0:083111ae2a11 457 so that all instructions following the ISB are fetched from cache or
saloutos 0:083111ae2a11 458 memory, after the instruction has been completed.
saloutos 0:083111ae2a11 459 */
saloutos 0:083111ae2a11 460 __attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
saloutos 0:083111ae2a11 461 {
saloutos 0:083111ae2a11 462 __ASM volatile ("isb 0xF":::"memory");
saloutos 0:083111ae2a11 463 }
saloutos 0:083111ae2a11 464
saloutos 0:083111ae2a11 465
saloutos 0:083111ae2a11 466 /** \brief Data Synchronization Barrier
saloutos 0:083111ae2a11 467
saloutos 0:083111ae2a11 468 This function acts as a special kind of Data Memory Barrier.
saloutos 0:083111ae2a11 469 It completes when all explicit memory accesses before this instruction complete.
saloutos 0:083111ae2a11 470 */
saloutos 0:083111ae2a11 471 __attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
saloutos 0:083111ae2a11 472 {
saloutos 0:083111ae2a11 473 __ASM volatile ("dsb 0xF":::"memory");
saloutos 0:083111ae2a11 474 }
saloutos 0:083111ae2a11 475
saloutos 0:083111ae2a11 476
saloutos 0:083111ae2a11 477 /** \brief Data Memory Barrier
saloutos 0:083111ae2a11 478
saloutos 0:083111ae2a11 479 This function ensures the apparent order of the explicit memory operations before
saloutos 0:083111ae2a11 480 and after the instruction, without ensuring their completion.
saloutos 0:083111ae2a11 481 */
saloutos 0:083111ae2a11 482 __attribute__((always_inline)) __STATIC_INLINE void __DMB(void)
saloutos 0:083111ae2a11 483 {
saloutos 0:083111ae2a11 484 __ASM volatile ("dmb 0xF":::"memory");
saloutos 0:083111ae2a11 485 }
saloutos 0:083111ae2a11 486
saloutos 0:083111ae2a11 487
saloutos 0:083111ae2a11 488 /** \brief Reverse byte order (32 bit)
saloutos 0:083111ae2a11 489
saloutos 0:083111ae2a11 490 This function reverses the byte order in integer value.
saloutos 0:083111ae2a11 491
saloutos 0:083111ae2a11 492 \param [in] value Value to reverse
saloutos 0:083111ae2a11 493 \return Reversed value
saloutos 0:083111ae2a11 494 */
saloutos 0:083111ae2a11 495 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
saloutos 0:083111ae2a11 496 {
saloutos 0:083111ae2a11 497 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
saloutos 0:083111ae2a11 498 return __builtin_bswap32(value);
saloutos 0:083111ae2a11 499 #else
saloutos 0:083111ae2a11 500 uint32_t result;
saloutos 0:083111ae2a11 501
saloutos 0:083111ae2a11 502 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
saloutos 0:083111ae2a11 503 return(result);
saloutos 0:083111ae2a11 504 #endif
saloutos 0:083111ae2a11 505 }
saloutos 0:083111ae2a11 506
saloutos 0:083111ae2a11 507
saloutos 0:083111ae2a11 508 /** \brief Reverse byte order (16 bit)
saloutos 0:083111ae2a11 509
saloutos 0:083111ae2a11 510 This function reverses the byte order in two unsigned short values.
saloutos 0:083111ae2a11 511
saloutos 0:083111ae2a11 512 \param [in] value Value to reverse
saloutos 0:083111ae2a11 513 \return Reversed value
saloutos 0:083111ae2a11 514 */
saloutos 0:083111ae2a11 515 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
saloutos 0:083111ae2a11 516 {
saloutos 0:083111ae2a11 517 uint32_t result;
saloutos 0:083111ae2a11 518
saloutos 0:083111ae2a11 519 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
saloutos 0:083111ae2a11 520 return(result);
saloutos 0:083111ae2a11 521 }
saloutos 0:083111ae2a11 522
saloutos 0:083111ae2a11 523
saloutos 0:083111ae2a11 524 /** \brief Reverse byte order in signed short value
saloutos 0:083111ae2a11 525
saloutos 0:083111ae2a11 526 This function reverses the byte order in a signed short value with sign extension to integer.
saloutos 0:083111ae2a11 527
saloutos 0:083111ae2a11 528 \param [in] value Value to reverse
saloutos 0:083111ae2a11 529 \return Reversed value
saloutos 0:083111ae2a11 530 */
saloutos 0:083111ae2a11 531 __attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
saloutos 0:083111ae2a11 532 {
saloutos 0:083111ae2a11 533 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
saloutos 0:083111ae2a11 534 return (short)__builtin_bswap16(value);
saloutos 0:083111ae2a11 535 #else
saloutos 0:083111ae2a11 536 uint32_t result;
saloutos 0:083111ae2a11 537
saloutos 0:083111ae2a11 538 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
saloutos 0:083111ae2a11 539 return(result);
saloutos 0:083111ae2a11 540 #endif
saloutos 0:083111ae2a11 541 }
saloutos 0:083111ae2a11 542
saloutos 0:083111ae2a11 543
saloutos 0:083111ae2a11 544 /** \brief Rotate Right in unsigned value (32 bit)
saloutos 0:083111ae2a11 545
saloutos 0:083111ae2a11 546 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
saloutos 0:083111ae2a11 547
saloutos 0:083111ae2a11 548 \param [in] value Value to rotate
saloutos 0:083111ae2a11 549 \param [in] value Number of Bits to rotate
saloutos 0:083111ae2a11 550 \return Rotated value
saloutos 0:083111ae2a11 551 */
saloutos 0:083111ae2a11 552 __attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 553 {
saloutos 0:083111ae2a11 554 return (op1 >> op2) | (op1 << (32 - op2));
saloutos 0:083111ae2a11 555 }
saloutos 0:083111ae2a11 556
saloutos 0:083111ae2a11 557
saloutos 0:083111ae2a11 558 /** \brief Breakpoint
saloutos 0:083111ae2a11 559
saloutos 0:083111ae2a11 560 This function causes the processor to enter Debug state.
saloutos 0:083111ae2a11 561 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
saloutos 0:083111ae2a11 562
saloutos 0:083111ae2a11 563 \param [in] value is ignored by the processor.
saloutos 0:083111ae2a11 564 If required, a debugger can use it to store additional information about the breakpoint.
saloutos 0:083111ae2a11 565 */
saloutos 0:083111ae2a11 566 #define __BKPT(value) __ASM volatile ("bkpt "#value)
saloutos 0:083111ae2a11 567
saloutos 0:083111ae2a11 568
saloutos 0:083111ae2a11 569 /** \brief Reverse bit order of value
saloutos 0:083111ae2a11 570
saloutos 0:083111ae2a11 571 This function reverses the bit order of the given value.
saloutos 0:083111ae2a11 572
saloutos 0:083111ae2a11 573 \param [in] value Value to reverse
saloutos 0:083111ae2a11 574 \return Reversed value
saloutos 0:083111ae2a11 575 */
saloutos 0:083111ae2a11 576 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
saloutos 0:083111ae2a11 577 {
saloutos 0:083111ae2a11 578 uint32_t result;
saloutos 0:083111ae2a11 579
saloutos 0:083111ae2a11 580 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
saloutos 0:083111ae2a11 581 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
saloutos 0:083111ae2a11 582 #else
saloutos 0:083111ae2a11 583 int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end
saloutos 0:083111ae2a11 584
saloutos 0:083111ae2a11 585 result = value; // r will be reversed bits of v; first get LSB of v
saloutos 0:083111ae2a11 586 for (value >>= 1; value; value >>= 1)
saloutos 0:083111ae2a11 587 {
saloutos 0:083111ae2a11 588 result <<= 1;
saloutos 0:083111ae2a11 589 result |= value & 1;
saloutos 0:083111ae2a11 590 s--;
saloutos 0:083111ae2a11 591 }
saloutos 0:083111ae2a11 592 result <<= s; // shift when v's highest bits are zero
saloutos 0:083111ae2a11 593 #endif
saloutos 0:083111ae2a11 594 return(result);
saloutos 0:083111ae2a11 595 }
saloutos 0:083111ae2a11 596
saloutos 0:083111ae2a11 597
saloutos 0:083111ae2a11 598 /** \brief Count leading zeros
saloutos 0:083111ae2a11 599
saloutos 0:083111ae2a11 600 This function counts the number of leading zeros of a data value.
saloutos 0:083111ae2a11 601
saloutos 0:083111ae2a11 602 \param [in] value Value to count the leading zeros
saloutos 0:083111ae2a11 603 \return number of leading zeros in value
saloutos 0:083111ae2a11 604 */
saloutos 0:083111ae2a11 605 #define __CLZ __builtin_clz
saloutos 0:083111ae2a11 606
saloutos 0:083111ae2a11 607
saloutos 0:083111ae2a11 608 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
saloutos 0:083111ae2a11 609
saloutos 0:083111ae2a11 610 /** \brief LDR Exclusive (8 bit)
saloutos 0:083111ae2a11 611
saloutos 0:083111ae2a11 612 This function executes a exclusive LDR instruction for 8 bit value.
saloutos 0:083111ae2a11 613
saloutos 0:083111ae2a11 614 \param [in] ptr Pointer to data
saloutos 0:083111ae2a11 615 \return value of type uint8_t at (*ptr)
saloutos 0:083111ae2a11 616 */
saloutos 0:083111ae2a11 617 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
saloutos 0:083111ae2a11 618 {
saloutos 0:083111ae2a11 619 uint32_t result;
saloutos 0:083111ae2a11 620
saloutos 0:083111ae2a11 621 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
saloutos 0:083111ae2a11 622 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
saloutos 0:083111ae2a11 623 #else
saloutos 0:083111ae2a11 624 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
saloutos 0:083111ae2a11 625 accepted by assembler. So has to use following less efficient pattern.
saloutos 0:083111ae2a11 626 */
saloutos 0:083111ae2a11 627 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
saloutos 0:083111ae2a11 628 #endif
saloutos 0:083111ae2a11 629 return ((uint8_t) result); /* Add explicit type cast here */
saloutos 0:083111ae2a11 630 }
saloutos 0:083111ae2a11 631
saloutos 0:083111ae2a11 632
saloutos 0:083111ae2a11 633 /** \brief LDR Exclusive (16 bit)
saloutos 0:083111ae2a11 634
saloutos 0:083111ae2a11 635 This function executes a exclusive LDR instruction for 16 bit values.
saloutos 0:083111ae2a11 636
saloutos 0:083111ae2a11 637 \param [in] ptr Pointer to data
saloutos 0:083111ae2a11 638 \return value of type uint16_t at (*ptr)
saloutos 0:083111ae2a11 639 */
saloutos 0:083111ae2a11 640 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
saloutos 0:083111ae2a11 641 {
saloutos 0:083111ae2a11 642 uint32_t result;
saloutos 0:083111ae2a11 643
saloutos 0:083111ae2a11 644 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
saloutos 0:083111ae2a11 645 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
saloutos 0:083111ae2a11 646 #else
saloutos 0:083111ae2a11 647 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
saloutos 0:083111ae2a11 648 accepted by assembler. So has to use following less efficient pattern.
saloutos 0:083111ae2a11 649 */
saloutos 0:083111ae2a11 650 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
saloutos 0:083111ae2a11 651 #endif
saloutos 0:083111ae2a11 652 return ((uint16_t) result); /* Add explicit type cast here */
saloutos 0:083111ae2a11 653 }
saloutos 0:083111ae2a11 654
saloutos 0:083111ae2a11 655
saloutos 0:083111ae2a11 656 /** \brief LDR Exclusive (32 bit)
saloutos 0:083111ae2a11 657
saloutos 0:083111ae2a11 658 This function executes a exclusive LDR instruction for 32 bit values.
saloutos 0:083111ae2a11 659
saloutos 0:083111ae2a11 660 \param [in] ptr Pointer to data
saloutos 0:083111ae2a11 661 \return value of type uint32_t at (*ptr)
saloutos 0:083111ae2a11 662 */
saloutos 0:083111ae2a11 663 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
saloutos 0:083111ae2a11 664 {
saloutos 0:083111ae2a11 665 uint32_t result;
saloutos 0:083111ae2a11 666
saloutos 0:083111ae2a11 667 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
saloutos 0:083111ae2a11 668 return(result);
saloutos 0:083111ae2a11 669 }
saloutos 0:083111ae2a11 670
saloutos 0:083111ae2a11 671
saloutos 0:083111ae2a11 672 /** \brief STR Exclusive (8 bit)
saloutos 0:083111ae2a11 673
saloutos 0:083111ae2a11 674 This function executes a exclusive STR instruction for 8 bit values.
saloutos 0:083111ae2a11 675
saloutos 0:083111ae2a11 676 \param [in] value Value to store
saloutos 0:083111ae2a11 677 \param [in] ptr Pointer to location
saloutos 0:083111ae2a11 678 \return 0 Function succeeded
saloutos 0:083111ae2a11 679 \return 1 Function failed
saloutos 0:083111ae2a11 680 */
saloutos 0:083111ae2a11 681 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
saloutos 0:083111ae2a11 682 {
saloutos 0:083111ae2a11 683 uint32_t result;
saloutos 0:083111ae2a11 684
saloutos 0:083111ae2a11 685 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
saloutos 0:083111ae2a11 686 return(result);
saloutos 0:083111ae2a11 687 }
saloutos 0:083111ae2a11 688
saloutos 0:083111ae2a11 689
saloutos 0:083111ae2a11 690 /** \brief STR Exclusive (16 bit)
saloutos 0:083111ae2a11 691
saloutos 0:083111ae2a11 692 This function executes a exclusive STR instruction for 16 bit values.
saloutos 0:083111ae2a11 693
saloutos 0:083111ae2a11 694 \param [in] value Value to store
saloutos 0:083111ae2a11 695 \param [in] ptr Pointer to location
saloutos 0:083111ae2a11 696 \return 0 Function succeeded
saloutos 0:083111ae2a11 697 \return 1 Function failed
saloutos 0:083111ae2a11 698 */
saloutos 0:083111ae2a11 699 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
saloutos 0:083111ae2a11 700 {
saloutos 0:083111ae2a11 701 uint32_t result;
saloutos 0:083111ae2a11 702
saloutos 0:083111ae2a11 703 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
saloutos 0:083111ae2a11 704 return(result);
saloutos 0:083111ae2a11 705 }
saloutos 0:083111ae2a11 706
saloutos 0:083111ae2a11 707
saloutos 0:083111ae2a11 708 /** \brief STR Exclusive (32 bit)
saloutos 0:083111ae2a11 709
saloutos 0:083111ae2a11 710 This function executes a exclusive STR instruction for 32 bit values.
saloutos 0:083111ae2a11 711
saloutos 0:083111ae2a11 712 \param [in] value Value to store
saloutos 0:083111ae2a11 713 \param [in] ptr Pointer to location
saloutos 0:083111ae2a11 714 \return 0 Function succeeded
saloutos 0:083111ae2a11 715 \return 1 Function failed
saloutos 0:083111ae2a11 716 */
saloutos 0:083111ae2a11 717 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
saloutos 0:083111ae2a11 718 {
saloutos 0:083111ae2a11 719 uint32_t result;
saloutos 0:083111ae2a11 720
saloutos 0:083111ae2a11 721 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
saloutos 0:083111ae2a11 722 return(result);
saloutos 0:083111ae2a11 723 }
saloutos 0:083111ae2a11 724
saloutos 0:083111ae2a11 725
saloutos 0:083111ae2a11 726 /** \brief Remove the exclusive lock
saloutos 0:083111ae2a11 727
saloutos 0:083111ae2a11 728 This function removes the exclusive lock which is created by LDREX.
saloutos 0:083111ae2a11 729
saloutos 0:083111ae2a11 730 */
saloutos 0:083111ae2a11 731 __attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
saloutos 0:083111ae2a11 732 {
saloutos 0:083111ae2a11 733 __ASM volatile ("clrex" ::: "memory");
saloutos 0:083111ae2a11 734 }
saloutos 0:083111ae2a11 735
saloutos 0:083111ae2a11 736
saloutos 0:083111ae2a11 737 /** \brief Signed Saturate
saloutos 0:083111ae2a11 738
saloutos 0:083111ae2a11 739 This function saturates a signed value.
saloutos 0:083111ae2a11 740
saloutos 0:083111ae2a11 741 \param [in] value Value to be saturated
saloutos 0:083111ae2a11 742 \param [in] sat Bit position to saturate to (1..32)
saloutos 0:083111ae2a11 743 \return Saturated value
saloutos 0:083111ae2a11 744 */
saloutos 0:083111ae2a11 745 #define __SSAT(ARG1,ARG2) \
saloutos 0:083111ae2a11 746 ({ \
saloutos 0:083111ae2a11 747 uint32_t __RES, __ARG1 = (ARG1); \
saloutos 0:083111ae2a11 748 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
saloutos 0:083111ae2a11 749 __RES; \
saloutos 0:083111ae2a11 750 })
saloutos 0:083111ae2a11 751
saloutos 0:083111ae2a11 752
saloutos 0:083111ae2a11 753 /** \brief Unsigned Saturate
saloutos 0:083111ae2a11 754
saloutos 0:083111ae2a11 755 This function saturates an unsigned value.
saloutos 0:083111ae2a11 756
saloutos 0:083111ae2a11 757 \param [in] value Value to be saturated
saloutos 0:083111ae2a11 758 \param [in] sat Bit position to saturate to (0..31)
saloutos 0:083111ae2a11 759 \return Saturated value
saloutos 0:083111ae2a11 760 */
saloutos 0:083111ae2a11 761 #define __USAT(ARG1,ARG2) \
saloutos 0:083111ae2a11 762 ({ \
saloutos 0:083111ae2a11 763 uint32_t __RES, __ARG1 = (ARG1); \
saloutos 0:083111ae2a11 764 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
saloutos 0:083111ae2a11 765 __RES; \
saloutos 0:083111ae2a11 766 })
saloutos 0:083111ae2a11 767
saloutos 0:083111ae2a11 768
saloutos 0:083111ae2a11 769 /** \brief Rotate Right with Extend (32 bit)
saloutos 0:083111ae2a11 770
saloutos 0:083111ae2a11 771 This function moves each bit of a bitstring right by one bit.
saloutos 0:083111ae2a11 772 The carry input is shifted in at the left end of the bitstring.
saloutos 0:083111ae2a11 773
saloutos 0:083111ae2a11 774 \param [in] value Value to rotate
saloutos 0:083111ae2a11 775 \return Rotated value
saloutos 0:083111ae2a11 776 */
saloutos 0:083111ae2a11 777 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
saloutos 0:083111ae2a11 778 {
saloutos 0:083111ae2a11 779 uint32_t result;
saloutos 0:083111ae2a11 780
saloutos 0:083111ae2a11 781 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
saloutos 0:083111ae2a11 782 return(result);
saloutos 0:083111ae2a11 783 }
saloutos 0:083111ae2a11 784
saloutos 0:083111ae2a11 785
saloutos 0:083111ae2a11 786 /** \brief LDRT Unprivileged (8 bit)
saloutos 0:083111ae2a11 787
saloutos 0:083111ae2a11 788 This function executes a Unprivileged LDRT instruction for 8 bit value.
saloutos 0:083111ae2a11 789
saloutos 0:083111ae2a11 790 \param [in] ptr Pointer to data
saloutos 0:083111ae2a11 791 \return value of type uint8_t at (*ptr)
saloutos 0:083111ae2a11 792 */
saloutos 0:083111ae2a11 793 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr)
saloutos 0:083111ae2a11 794 {
saloutos 0:083111ae2a11 795 uint32_t result;
saloutos 0:083111ae2a11 796
saloutos 0:083111ae2a11 797 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
saloutos 0:083111ae2a11 798 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) );
saloutos 0:083111ae2a11 799 #else
saloutos 0:083111ae2a11 800 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
saloutos 0:083111ae2a11 801 accepted by assembler. So has to use following less efficient pattern.
saloutos 0:083111ae2a11 802 */
saloutos 0:083111ae2a11 803 __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
saloutos 0:083111ae2a11 804 #endif
saloutos 0:083111ae2a11 805 return ((uint8_t) result); /* Add explicit type cast here */
saloutos 0:083111ae2a11 806 }
saloutos 0:083111ae2a11 807
saloutos 0:083111ae2a11 808
saloutos 0:083111ae2a11 809 /** \brief LDRT Unprivileged (16 bit)
saloutos 0:083111ae2a11 810
saloutos 0:083111ae2a11 811 This function executes a Unprivileged LDRT instruction for 16 bit values.
saloutos 0:083111ae2a11 812
saloutos 0:083111ae2a11 813 \param [in] ptr Pointer to data
saloutos 0:083111ae2a11 814 \return value of type uint16_t at (*ptr)
saloutos 0:083111ae2a11 815 */
saloutos 0:083111ae2a11 816 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr)
saloutos 0:083111ae2a11 817 {
saloutos 0:083111ae2a11 818 uint32_t result;
saloutos 0:083111ae2a11 819
saloutos 0:083111ae2a11 820 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
saloutos 0:083111ae2a11 821 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) );
saloutos 0:083111ae2a11 822 #else
saloutos 0:083111ae2a11 823 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
saloutos 0:083111ae2a11 824 accepted by assembler. So has to use following less efficient pattern.
saloutos 0:083111ae2a11 825 */
saloutos 0:083111ae2a11 826 __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
saloutos 0:083111ae2a11 827 #endif
saloutos 0:083111ae2a11 828 return ((uint16_t) result); /* Add explicit type cast here */
saloutos 0:083111ae2a11 829 }
saloutos 0:083111ae2a11 830
saloutos 0:083111ae2a11 831
saloutos 0:083111ae2a11 832 /** \brief LDRT Unprivileged (32 bit)
saloutos 0:083111ae2a11 833
saloutos 0:083111ae2a11 834 This function executes a Unprivileged LDRT instruction for 32 bit values.
saloutos 0:083111ae2a11 835
saloutos 0:083111ae2a11 836 \param [in] ptr Pointer to data
saloutos 0:083111ae2a11 837 \return value of type uint32_t at (*ptr)
saloutos 0:083111ae2a11 838 */
saloutos 0:083111ae2a11 839 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr)
saloutos 0:083111ae2a11 840 {
saloutos 0:083111ae2a11 841 uint32_t result;
saloutos 0:083111ae2a11 842
saloutos 0:083111ae2a11 843 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) );
saloutos 0:083111ae2a11 844 return(result);
saloutos 0:083111ae2a11 845 }
saloutos 0:083111ae2a11 846
saloutos 0:083111ae2a11 847
saloutos 0:083111ae2a11 848 /** \brief STRT Unprivileged (8 bit)
saloutos 0:083111ae2a11 849
saloutos 0:083111ae2a11 850 This function executes a Unprivileged STRT instruction for 8 bit values.
saloutos 0:083111ae2a11 851
saloutos 0:083111ae2a11 852 \param [in] value Value to store
saloutos 0:083111ae2a11 853 \param [in] ptr Pointer to location
saloutos 0:083111ae2a11 854 */
saloutos 0:083111ae2a11 855 __attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr)
saloutos 0:083111ae2a11 856 {
saloutos 0:083111ae2a11 857 __ASM volatile ("strbt %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
saloutos 0:083111ae2a11 858 }
saloutos 0:083111ae2a11 859
saloutos 0:083111ae2a11 860
saloutos 0:083111ae2a11 861 /** \brief STRT Unprivileged (16 bit)
saloutos 0:083111ae2a11 862
saloutos 0:083111ae2a11 863 This function executes a Unprivileged STRT instruction for 16 bit values.
saloutos 0:083111ae2a11 864
saloutos 0:083111ae2a11 865 \param [in] value Value to store
saloutos 0:083111ae2a11 866 \param [in] ptr Pointer to location
saloutos 0:083111ae2a11 867 */
saloutos 0:083111ae2a11 868 __attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr)
saloutos 0:083111ae2a11 869 {
saloutos 0:083111ae2a11 870 __ASM volatile ("strht %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
saloutos 0:083111ae2a11 871 }
saloutos 0:083111ae2a11 872
saloutos 0:083111ae2a11 873
saloutos 0:083111ae2a11 874 /** \brief STRT Unprivileged (32 bit)
saloutos 0:083111ae2a11 875
saloutos 0:083111ae2a11 876 This function executes a Unprivileged STRT instruction for 32 bit values.
saloutos 0:083111ae2a11 877
saloutos 0:083111ae2a11 878 \param [in] value Value to store
saloutos 0:083111ae2a11 879 \param [in] ptr Pointer to location
saloutos 0:083111ae2a11 880 */
saloutos 0:083111ae2a11 881 __attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr)
saloutos 0:083111ae2a11 882 {
saloutos 0:083111ae2a11 883 __ASM volatile ("strt %1, %0" : "=Q" (*addr) : "r" (value) );
saloutos 0:083111ae2a11 884 }
saloutos 0:083111ae2a11 885
saloutos 0:083111ae2a11 886 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
saloutos 0:083111ae2a11 887
saloutos 0:083111ae2a11 888
saloutos 0:083111ae2a11 889 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
saloutos 0:083111ae2a11 890 /* IAR iccarm specific functions */
saloutos 0:083111ae2a11 891 #include <cmsis_iar.h>
saloutos 0:083111ae2a11 892
saloutos 0:083111ae2a11 893
saloutos 0:083111ae2a11 894 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
saloutos 0:083111ae2a11 895 /* TI CCS specific functions */
saloutos 0:083111ae2a11 896 #include <cmsis_ccs.h>
saloutos 0:083111ae2a11 897
saloutos 0:083111ae2a11 898
saloutos 0:083111ae2a11 899 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
saloutos 0:083111ae2a11 900 /* TASKING carm specific functions */
saloutos 0:083111ae2a11 901 /*
saloutos 0:083111ae2a11 902 * The CMSIS functions have been implemented as intrinsics in the compiler.
saloutos 0:083111ae2a11 903 * Please use "carm -?i" to get an up to date list of all intrinsics,
saloutos 0:083111ae2a11 904 * Including the CMSIS ones.
saloutos 0:083111ae2a11 905 */
saloutos 0:083111ae2a11 906
saloutos 0:083111ae2a11 907
saloutos 0:083111ae2a11 908 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
saloutos 0:083111ae2a11 909 /* Cosmic specific functions */
saloutos 0:083111ae2a11 910 #include <cmsis_csm.h>
saloutos 0:083111ae2a11 911
saloutos 0:083111ae2a11 912 #endif
saloutos 0:083111ae2a11 913
saloutos 0:083111ae2a11 914 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
saloutos 0:083111ae2a11 915
saloutos 0:083111ae2a11 916 #endif /* __CORE_CMINSTR_H */