Aditya Mehrotra / mbed-dev

Biomimetics MBED Library w/ Added Support for CAN3

Dependents:   CAN_TEST SPIne_Plus_DYNO_SENSORS SPIne_Plus_v2 SPIne_Plus_Dyno_v2

cmsis/TARGET_CORTEX_A/core_cm4_simd.h@3:993b4d6ff61e, 2021-03-09 (annotated)

Committer:
adimmit
Date:
Tue Mar 09 20:33:24 2021 +0000
Revision:
3:993b4d6ff61e
Parent:
0:083111ae2a11 
added CAN3

Who changed what in which revision?

UserRevisionLine numberNew contents of line
saloutos 0:083111ae2a11 1 /**************************************************************************//**
saloutos 0:083111ae2a11 2 * @file core_cm4_simd.h
saloutos 0:083111ae2a11 3 * @brief CMSIS Cortex-M4 SIMD Header File
saloutos 0:083111ae2a11 4 * @version V3.20
saloutos 0:083111ae2a11 5 * @date 25. February 2013
saloutos 0:083111ae2a11 6 *
saloutos 0:083111ae2a11 7 * @note
saloutos 0:083111ae2a11 8 *
saloutos 0:083111ae2a11 9 ******************************************************************************/
saloutos 0:083111ae2a11 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
saloutos 0:083111ae2a11 11
saloutos 0:083111ae2a11 12 All rights reserved.
saloutos 0:083111ae2a11 13 Redistribution and use in source and binary forms, with or without
saloutos 0:083111ae2a11 14 modification, are permitted provided that the following conditions are met:
saloutos 0:083111ae2a11 15 - Redistributions of source code must retain the above copyright
saloutos 0:083111ae2a11 16 notice, this list of conditions and the following disclaimer.
saloutos 0:083111ae2a11 17 - Redistributions in binary form must reproduce the above copyright
saloutos 0:083111ae2a11 18 notice, this list of conditions and the following disclaimer in the
saloutos 0:083111ae2a11 19 documentation and/or other materials provided with the distribution.
saloutos 0:083111ae2a11 20 - Neither the name of ARM nor the names of its contributors may be used
saloutos 0:083111ae2a11 21 to endorse or promote products derived from this software without
saloutos 0:083111ae2a11 22 specific prior written permission.
saloutos 0:083111ae2a11 23 *
saloutos 0:083111ae2a11 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
saloutos 0:083111ae2a11 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
saloutos 0:083111ae2a11 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
saloutos 0:083111ae2a11 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
saloutos 0:083111ae2a11 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
saloutos 0:083111ae2a11 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
saloutos 0:083111ae2a11 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
saloutos 0:083111ae2a11 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
saloutos 0:083111ae2a11 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
saloutos 0:083111ae2a11 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
saloutos 0:083111ae2a11 34 POSSIBILITY OF SUCH DAMAGE.
saloutos 0:083111ae2a11 35 ---------------------------------------------------------------------------*/
saloutos 0:083111ae2a11 36
saloutos 0:083111ae2a11 37
saloutos 0:083111ae2a11 38 #ifdef __cplusplus
saloutos 0:083111ae2a11 39 extern "C" {
saloutos 0:083111ae2a11 40 #endif
saloutos 0:083111ae2a11 41
saloutos 0:083111ae2a11 42 #ifndef __CORE_CM4_SIMD_H
saloutos 0:083111ae2a11 43 #define __CORE_CM4_SIMD_H
saloutos 0:083111ae2a11 44
saloutos 0:083111ae2a11 45
saloutos 0:083111ae2a11 46 /*******************************************************************************
saloutos 0:083111ae2a11 47 * Hardware Abstraction Layer
saloutos 0:083111ae2a11 48 ******************************************************************************/
saloutos 0:083111ae2a11 49
saloutos 0:083111ae2a11 50
saloutos 0:083111ae2a11 51 /* ################### Compiler specific Intrinsics ########################### */
saloutos 0:083111ae2a11 52 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
saloutos 0:083111ae2a11 53 Access to dedicated SIMD instructions
saloutos 0:083111ae2a11 54 @{
saloutos 0:083111ae2a11 55 */
saloutos 0:083111ae2a11 56
saloutos 0:083111ae2a11 57 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
saloutos 0:083111ae2a11 58 /* ARM armcc specific functions */
saloutos 0:083111ae2a11 59
saloutos 0:083111ae2a11 60 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
saloutos 0:083111ae2a11 61 #define __SADD8 __sadd8
saloutos 0:083111ae2a11 62 #define __QADD8 __qadd8
saloutos 0:083111ae2a11 63 #define __SHADD8 __shadd8
saloutos 0:083111ae2a11 64 #define __UADD8 __uadd8
saloutos 0:083111ae2a11 65 #define __UQADD8 __uqadd8
saloutos 0:083111ae2a11 66 #define __UHADD8 __uhadd8
saloutos 0:083111ae2a11 67 #define __SSUB8 __ssub8
saloutos 0:083111ae2a11 68 #define __QSUB8 __qsub8
saloutos 0:083111ae2a11 69 #define __SHSUB8 __shsub8
saloutos 0:083111ae2a11 70 #define __USUB8 __usub8
saloutos 0:083111ae2a11 71 #define __UQSUB8 __uqsub8
saloutos 0:083111ae2a11 72 #define __UHSUB8 __uhsub8
saloutos 0:083111ae2a11 73 #define __SADD16 __sadd16
saloutos 0:083111ae2a11 74 #define __QADD16 __qadd16
saloutos 0:083111ae2a11 75 #define __SHADD16 __shadd16
saloutos 0:083111ae2a11 76 #define __UADD16 __uadd16
saloutos 0:083111ae2a11 77 #define __UQADD16 __uqadd16
saloutos 0:083111ae2a11 78 #define __UHADD16 __uhadd16
saloutos 0:083111ae2a11 79 #define __SSUB16 __ssub16
saloutos 0:083111ae2a11 80 #define __QSUB16 __qsub16
saloutos 0:083111ae2a11 81 #define __SHSUB16 __shsub16
saloutos 0:083111ae2a11 82 #define __USUB16 __usub16
saloutos 0:083111ae2a11 83 #define __UQSUB16 __uqsub16
saloutos 0:083111ae2a11 84 #define __UHSUB16 __uhsub16
saloutos 0:083111ae2a11 85 #define __SASX __sasx
saloutos 0:083111ae2a11 86 #define __QASX __qasx
saloutos 0:083111ae2a11 87 #define __SHASX __shasx
saloutos 0:083111ae2a11 88 #define __UASX __uasx
saloutos 0:083111ae2a11 89 #define __UQASX __uqasx
saloutos 0:083111ae2a11 90 #define __UHASX __uhasx
saloutos 0:083111ae2a11 91 #define __SSAX __ssax
saloutos 0:083111ae2a11 92 #define __QSAX __qsax
saloutos 0:083111ae2a11 93 #define __SHSAX __shsax
saloutos 0:083111ae2a11 94 #define __USAX __usax
saloutos 0:083111ae2a11 95 #define __UQSAX __uqsax
saloutos 0:083111ae2a11 96 #define __UHSAX __uhsax
saloutos 0:083111ae2a11 97 #define __USAD8 __usad8
saloutos 0:083111ae2a11 98 #define __USADA8 __usada8
saloutos 0:083111ae2a11 99 #define __SSAT16 __ssat16
saloutos 0:083111ae2a11 100 #define __USAT16 __usat16
saloutos 0:083111ae2a11 101 #define __UXTB16 __uxtb16
saloutos 0:083111ae2a11 102 #define __UXTAB16 __uxtab16
saloutos 0:083111ae2a11 103 #define __SXTB16 __sxtb16
saloutos 0:083111ae2a11 104 #define __SXTAB16 __sxtab16
saloutos 0:083111ae2a11 105 #define __SMUAD __smuad
saloutos 0:083111ae2a11 106 #define __SMUADX __smuadx
saloutos 0:083111ae2a11 107 #define __SMLAD __smlad
saloutos 0:083111ae2a11 108 #define __SMLADX __smladx
saloutos 0:083111ae2a11 109 #define __SMLALD __smlald
saloutos 0:083111ae2a11 110 #define __SMLALDX __smlaldx
saloutos 0:083111ae2a11 111 #define __SMUSD __smusd
saloutos 0:083111ae2a11 112 #define __SMUSDX __smusdx
saloutos 0:083111ae2a11 113 #define __SMLSD __smlsd
saloutos 0:083111ae2a11 114 #define __SMLSDX __smlsdx
saloutos 0:083111ae2a11 115 #define __SMLSLD __smlsld
saloutos 0:083111ae2a11 116 #define __SMLSLDX __smlsldx
saloutos 0:083111ae2a11 117 #define __SEL __sel
saloutos 0:083111ae2a11 118 #define __QADD __qadd
saloutos 0:083111ae2a11 119 #define __QSUB __qsub
saloutos 0:083111ae2a11 120
saloutos 0:083111ae2a11 121 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
saloutos 0:083111ae2a11 122 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
saloutos 0:083111ae2a11 123
saloutos 0:083111ae2a11 124 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
saloutos 0:083111ae2a11 125 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
saloutos 0:083111ae2a11 126
saloutos 0:083111ae2a11 127 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
saloutos 0:083111ae2a11 128 ((int64_t)(ARG3) << 32) ) >> 32))
saloutos 0:083111ae2a11 129
saloutos 0:083111ae2a11 130 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
saloutos 0:083111ae2a11 131
saloutos 0:083111ae2a11 132
saloutos 0:083111ae2a11 133
saloutos 0:083111ae2a11 134 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
saloutos 0:083111ae2a11 135 /* IAR iccarm specific functions */
saloutos 0:083111ae2a11 136
saloutos 0:083111ae2a11 137 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
saloutos 0:083111ae2a11 138 #include <cmsis_iar.h>
saloutos 0:083111ae2a11 139
saloutos 0:083111ae2a11 140 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
saloutos 0:083111ae2a11 141
saloutos 0:083111ae2a11 142
saloutos 0:083111ae2a11 143
saloutos 0:083111ae2a11 144 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
saloutos 0:083111ae2a11 145 /* TI CCS specific functions */
saloutos 0:083111ae2a11 146
saloutos 0:083111ae2a11 147 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
saloutos 0:083111ae2a11 148 #include <cmsis_ccs.h>
saloutos 0:083111ae2a11 149
saloutos 0:083111ae2a11 150 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
saloutos 0:083111ae2a11 151
saloutos 0:083111ae2a11 152
saloutos 0:083111ae2a11 153
saloutos 0:083111ae2a11 154 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
saloutos 0:083111ae2a11 155 /* GNU gcc specific functions */
saloutos 0:083111ae2a11 156
saloutos 0:083111ae2a11 157 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
saloutos 0:083111ae2a11 158 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 159 {
saloutos 0:083111ae2a11 160 uint32_t result;
saloutos 0:083111ae2a11 161
saloutos 0:083111ae2a11 162 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 163 return(result);
saloutos 0:083111ae2a11 164 }
saloutos 0:083111ae2a11 165
saloutos 0:083111ae2a11 166 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 167 {
saloutos 0:083111ae2a11 168 uint32_t result;
saloutos 0:083111ae2a11 169
saloutos 0:083111ae2a11 170 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 171 return(result);
saloutos 0:083111ae2a11 172 }
saloutos 0:083111ae2a11 173
saloutos 0:083111ae2a11 174 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 175 {
saloutos 0:083111ae2a11 176 uint32_t result;
saloutos 0:083111ae2a11 177
saloutos 0:083111ae2a11 178 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 179 return(result);
saloutos 0:083111ae2a11 180 }
saloutos 0:083111ae2a11 181
saloutos 0:083111ae2a11 182 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 183 {
saloutos 0:083111ae2a11 184 uint32_t result;
saloutos 0:083111ae2a11 185
saloutos 0:083111ae2a11 186 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 187 return(result);
saloutos 0:083111ae2a11 188 }
saloutos 0:083111ae2a11 189
saloutos 0:083111ae2a11 190 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 191 {
saloutos 0:083111ae2a11 192 uint32_t result;
saloutos 0:083111ae2a11 193
saloutos 0:083111ae2a11 194 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 195 return(result);
saloutos 0:083111ae2a11 196 }
saloutos 0:083111ae2a11 197
saloutos 0:083111ae2a11 198 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 199 {
saloutos 0:083111ae2a11 200 uint32_t result;
saloutos 0:083111ae2a11 201
saloutos 0:083111ae2a11 202 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 203 return(result);
saloutos 0:083111ae2a11 204 }
saloutos 0:083111ae2a11 205
saloutos 0:083111ae2a11 206
saloutos 0:083111ae2a11 207 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 208 {
saloutos 0:083111ae2a11 209 uint32_t result;
saloutos 0:083111ae2a11 210
saloutos 0:083111ae2a11 211 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 212 return(result);
saloutos 0:083111ae2a11 213 }
saloutos 0:083111ae2a11 214
saloutos 0:083111ae2a11 215 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 216 {
saloutos 0:083111ae2a11 217 uint32_t result;
saloutos 0:083111ae2a11 218
saloutos 0:083111ae2a11 219 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 220 return(result);
saloutos 0:083111ae2a11 221 }
saloutos 0:083111ae2a11 222
saloutos 0:083111ae2a11 223 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 224 {
saloutos 0:083111ae2a11 225 uint32_t result;
saloutos 0:083111ae2a11 226
saloutos 0:083111ae2a11 227 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 228 return(result);
saloutos 0:083111ae2a11 229 }
saloutos 0:083111ae2a11 230
saloutos 0:083111ae2a11 231 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 232 {
saloutos 0:083111ae2a11 233 uint32_t result;
saloutos 0:083111ae2a11 234
saloutos 0:083111ae2a11 235 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 236 return(result);
saloutos 0:083111ae2a11 237 }
saloutos 0:083111ae2a11 238
saloutos 0:083111ae2a11 239 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 240 {
saloutos 0:083111ae2a11 241 uint32_t result;
saloutos 0:083111ae2a11 242
saloutos 0:083111ae2a11 243 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 244 return(result);
saloutos 0:083111ae2a11 245 }
saloutos 0:083111ae2a11 246
saloutos 0:083111ae2a11 247 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 248 {
saloutos 0:083111ae2a11 249 uint32_t result;
saloutos 0:083111ae2a11 250
saloutos 0:083111ae2a11 251 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 252 return(result);
saloutos 0:083111ae2a11 253 }
saloutos 0:083111ae2a11 254
saloutos 0:083111ae2a11 255
saloutos 0:083111ae2a11 256 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 257 {
saloutos 0:083111ae2a11 258 uint32_t result;
saloutos 0:083111ae2a11 259
saloutos 0:083111ae2a11 260 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 261 return(result);
saloutos 0:083111ae2a11 262 }
saloutos 0:083111ae2a11 263
saloutos 0:083111ae2a11 264 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 265 {
saloutos 0:083111ae2a11 266 uint32_t result;
saloutos 0:083111ae2a11 267
saloutos 0:083111ae2a11 268 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 269 return(result);
saloutos 0:083111ae2a11 270 }
saloutos 0:083111ae2a11 271
saloutos 0:083111ae2a11 272 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 273 {
saloutos 0:083111ae2a11 274 uint32_t result;
saloutos 0:083111ae2a11 275
saloutos 0:083111ae2a11 276 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 277 return(result);
saloutos 0:083111ae2a11 278 }
saloutos 0:083111ae2a11 279
saloutos 0:083111ae2a11 280 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 281 {
saloutos 0:083111ae2a11 282 uint32_t result;
saloutos 0:083111ae2a11 283
saloutos 0:083111ae2a11 284 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 285 return(result);
saloutos 0:083111ae2a11 286 }
saloutos 0:083111ae2a11 287
saloutos 0:083111ae2a11 288 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 289 {
saloutos 0:083111ae2a11 290 uint32_t result;
saloutos 0:083111ae2a11 291
saloutos 0:083111ae2a11 292 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 293 return(result);
saloutos 0:083111ae2a11 294 }
saloutos 0:083111ae2a11 295
saloutos 0:083111ae2a11 296 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 297 {
saloutos 0:083111ae2a11 298 uint32_t result;
saloutos 0:083111ae2a11 299
saloutos 0:083111ae2a11 300 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 301 return(result);
saloutos 0:083111ae2a11 302 }
saloutos 0:083111ae2a11 303
saloutos 0:083111ae2a11 304 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 305 {
saloutos 0:083111ae2a11 306 uint32_t result;
saloutos 0:083111ae2a11 307
saloutos 0:083111ae2a11 308 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 309 return(result);
saloutos 0:083111ae2a11 310 }
saloutos 0:083111ae2a11 311
saloutos 0:083111ae2a11 312 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 313 {
saloutos 0:083111ae2a11 314 uint32_t result;
saloutos 0:083111ae2a11 315
saloutos 0:083111ae2a11 316 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 317 return(result);
saloutos 0:083111ae2a11 318 }
saloutos 0:083111ae2a11 319
saloutos 0:083111ae2a11 320 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 321 {
saloutos 0:083111ae2a11 322 uint32_t result;
saloutos 0:083111ae2a11 323
saloutos 0:083111ae2a11 324 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 325 return(result);
saloutos 0:083111ae2a11 326 }
saloutos 0:083111ae2a11 327
saloutos 0:083111ae2a11 328 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 329 {
saloutos 0:083111ae2a11 330 uint32_t result;
saloutos 0:083111ae2a11 331
saloutos 0:083111ae2a11 332 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 333 return(result);
saloutos 0:083111ae2a11 334 }
saloutos 0:083111ae2a11 335
saloutos 0:083111ae2a11 336 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 337 {
saloutos 0:083111ae2a11 338 uint32_t result;
saloutos 0:083111ae2a11 339
saloutos 0:083111ae2a11 340 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 341 return(result);
saloutos 0:083111ae2a11 342 }
saloutos 0:083111ae2a11 343
saloutos 0:083111ae2a11 344 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 345 {
saloutos 0:083111ae2a11 346 uint32_t result;
saloutos 0:083111ae2a11 347
saloutos 0:083111ae2a11 348 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 349 return(result);
saloutos 0:083111ae2a11 350 }
saloutos 0:083111ae2a11 351
saloutos 0:083111ae2a11 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 353 {
saloutos 0:083111ae2a11 354 uint32_t result;
saloutos 0:083111ae2a11 355
saloutos 0:083111ae2a11 356 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 357 return(result);
saloutos 0:083111ae2a11 358 }
saloutos 0:083111ae2a11 359
saloutos 0:083111ae2a11 360 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 361 {
saloutos 0:083111ae2a11 362 uint32_t result;
saloutos 0:083111ae2a11 363
saloutos 0:083111ae2a11 364 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 365 return(result);
saloutos 0:083111ae2a11 366 }
saloutos 0:083111ae2a11 367
saloutos 0:083111ae2a11 368 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 369 {
saloutos 0:083111ae2a11 370 uint32_t result;
saloutos 0:083111ae2a11 371
saloutos 0:083111ae2a11 372 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 373 return(result);
saloutos 0:083111ae2a11 374 }
saloutos 0:083111ae2a11 375
saloutos 0:083111ae2a11 376 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 377 {
saloutos 0:083111ae2a11 378 uint32_t result;
saloutos 0:083111ae2a11 379
saloutos 0:083111ae2a11 380 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 381 return(result);
saloutos 0:083111ae2a11 382 }
saloutos 0:083111ae2a11 383
saloutos 0:083111ae2a11 384 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 385 {
saloutos 0:083111ae2a11 386 uint32_t result;
saloutos 0:083111ae2a11 387
saloutos 0:083111ae2a11 388 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 389 return(result);
saloutos 0:083111ae2a11 390 }
saloutos 0:083111ae2a11 391
saloutos 0:083111ae2a11 392 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 393 {
saloutos 0:083111ae2a11 394 uint32_t result;
saloutos 0:083111ae2a11 395
saloutos 0:083111ae2a11 396 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 397 return(result);
saloutos 0:083111ae2a11 398 }
saloutos 0:083111ae2a11 399
saloutos 0:083111ae2a11 400 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 401 {
saloutos 0:083111ae2a11 402 uint32_t result;
saloutos 0:083111ae2a11 403
saloutos 0:083111ae2a11 404 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 405 return(result);
saloutos 0:083111ae2a11 406 }
saloutos 0:083111ae2a11 407
saloutos 0:083111ae2a11 408 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 409 {
saloutos 0:083111ae2a11 410 uint32_t result;
saloutos 0:083111ae2a11 411
saloutos 0:083111ae2a11 412 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 413 return(result);
saloutos 0:083111ae2a11 414 }
saloutos 0:083111ae2a11 415
saloutos 0:083111ae2a11 416 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 417 {
saloutos 0:083111ae2a11 418 uint32_t result;
saloutos 0:083111ae2a11 419
saloutos 0:083111ae2a11 420 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 421 return(result);
saloutos 0:083111ae2a11 422 }
saloutos 0:083111ae2a11 423
saloutos 0:083111ae2a11 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 425 {
saloutos 0:083111ae2a11 426 uint32_t result;
saloutos 0:083111ae2a11 427
saloutos 0:083111ae2a11 428 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 429 return(result);
saloutos 0:083111ae2a11 430 }
saloutos 0:083111ae2a11 431
saloutos 0:083111ae2a11 432 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 433 {
saloutos 0:083111ae2a11 434 uint32_t result;
saloutos 0:083111ae2a11 435
saloutos 0:083111ae2a11 436 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 437 return(result);
saloutos 0:083111ae2a11 438 }
saloutos 0:083111ae2a11 439
saloutos 0:083111ae2a11 440 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 441 {
saloutos 0:083111ae2a11 442 uint32_t result;
saloutos 0:083111ae2a11 443
saloutos 0:083111ae2a11 444 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 445 return(result);
saloutos 0:083111ae2a11 446 }
saloutos 0:083111ae2a11 447
saloutos 0:083111ae2a11 448 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 449 {
saloutos 0:083111ae2a11 450 uint32_t result;
saloutos 0:083111ae2a11 451
saloutos 0:083111ae2a11 452 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 453 return(result);
saloutos 0:083111ae2a11 454 }
saloutos 0:083111ae2a11 455
saloutos 0:083111ae2a11 456 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
saloutos 0:083111ae2a11 457 {
saloutos 0:083111ae2a11 458 uint32_t result;
saloutos 0:083111ae2a11 459
saloutos 0:083111ae2a11 460 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
saloutos 0:083111ae2a11 461 return(result);
saloutos 0:083111ae2a11 462 }
saloutos 0:083111ae2a11 463
saloutos 0:083111ae2a11 464 #define __SSAT16(ARG1,ARG2) \
saloutos 0:083111ae2a11 465 ({ \
saloutos 0:083111ae2a11 466 uint32_t __RES, __ARG1 = (ARG1); \
saloutos 0:083111ae2a11 467 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
saloutos 0:083111ae2a11 468 __RES; \
saloutos 0:083111ae2a11 469 })
saloutos 0:083111ae2a11 470
saloutos 0:083111ae2a11 471 #define __USAT16(ARG1,ARG2) \
saloutos 0:083111ae2a11 472 ({ \
saloutos 0:083111ae2a11 473 uint32_t __RES, __ARG1 = (ARG1); \
saloutos 0:083111ae2a11 474 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
saloutos 0:083111ae2a11 475 __RES; \
saloutos 0:083111ae2a11 476 })
saloutos 0:083111ae2a11 477
saloutos 0:083111ae2a11 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
saloutos 0:083111ae2a11 479 {
saloutos 0:083111ae2a11 480 uint32_t result;
saloutos 0:083111ae2a11 481
saloutos 0:083111ae2a11 482 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
saloutos 0:083111ae2a11 483 return(result);
saloutos 0:083111ae2a11 484 }
saloutos 0:083111ae2a11 485
saloutos 0:083111ae2a11 486 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 487 {
saloutos 0:083111ae2a11 488 uint32_t result;
saloutos 0:083111ae2a11 489
saloutos 0:083111ae2a11 490 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 491 return(result);
saloutos 0:083111ae2a11 492 }
saloutos 0:083111ae2a11 493
saloutos 0:083111ae2a11 494 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
saloutos 0:083111ae2a11 495 {
saloutos 0:083111ae2a11 496 uint32_t result;
saloutos 0:083111ae2a11 497
saloutos 0:083111ae2a11 498 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
saloutos 0:083111ae2a11 499 return(result);
saloutos 0:083111ae2a11 500 }
saloutos 0:083111ae2a11 501
saloutos 0:083111ae2a11 502 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 503 {
saloutos 0:083111ae2a11 504 uint32_t result;
saloutos 0:083111ae2a11 505
saloutos 0:083111ae2a11 506 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 507 return(result);
saloutos 0:083111ae2a11 508 }
saloutos 0:083111ae2a11 509
saloutos 0:083111ae2a11 510 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 511 {
saloutos 0:083111ae2a11 512 uint32_t result;
saloutos 0:083111ae2a11 513
saloutos 0:083111ae2a11 514 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 515 return(result);
saloutos 0:083111ae2a11 516 }
saloutos 0:083111ae2a11 517
saloutos 0:083111ae2a11 518 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 519 {
saloutos 0:083111ae2a11 520 uint32_t result;
saloutos 0:083111ae2a11 521
saloutos 0:083111ae2a11 522 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 523 return(result);
saloutos 0:083111ae2a11 524 }
saloutos 0:083111ae2a11 525
saloutos 0:083111ae2a11 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
saloutos 0:083111ae2a11 527 {
saloutos 0:083111ae2a11 528 uint32_t result;
saloutos 0:083111ae2a11 529
saloutos 0:083111ae2a11 530 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
saloutos 0:083111ae2a11 531 return(result);
saloutos 0:083111ae2a11 532 }
saloutos 0:083111ae2a11 533
saloutos 0:083111ae2a11 534 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
saloutos 0:083111ae2a11 535 {
saloutos 0:083111ae2a11 536 uint32_t result;
saloutos 0:083111ae2a11 537
saloutos 0:083111ae2a11 538 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
saloutos 0:083111ae2a11 539 return(result);
saloutos 0:083111ae2a11 540 }
saloutos 0:083111ae2a11 541
saloutos 0:083111ae2a11 542 #define __SMLALD(ARG1,ARG2,ARG3) \
saloutos 0:083111ae2a11 543 ({ \
saloutos 0:083111ae2a11 544 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
saloutos 0:083111ae2a11 545 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
saloutos 0:083111ae2a11 546 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
saloutos 0:083111ae2a11 547 })
saloutos 0:083111ae2a11 548
saloutos 0:083111ae2a11 549 #define __SMLALDX(ARG1,ARG2,ARG3) \
saloutos 0:083111ae2a11 550 ({ \
saloutos 0:083111ae2a11 551 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
saloutos 0:083111ae2a11 552 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
saloutos 0:083111ae2a11 553 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
saloutos 0:083111ae2a11 554 })
saloutos 0:083111ae2a11 555
saloutos 0:083111ae2a11 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 557 {
saloutos 0:083111ae2a11 558 uint32_t result;
saloutos 0:083111ae2a11 559
saloutos 0:083111ae2a11 560 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 561 return(result);
saloutos 0:083111ae2a11 562 }
saloutos 0:083111ae2a11 563
saloutos 0:083111ae2a11 564 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 565 {
saloutos 0:083111ae2a11 566 uint32_t result;
saloutos 0:083111ae2a11 567
saloutos 0:083111ae2a11 568 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 569 return(result);
saloutos 0:083111ae2a11 570 }
saloutos 0:083111ae2a11 571
saloutos 0:083111ae2a11 572 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
saloutos 0:083111ae2a11 573 {
saloutos 0:083111ae2a11 574 uint32_t result;
saloutos 0:083111ae2a11 575
saloutos 0:083111ae2a11 576 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
saloutos 0:083111ae2a11 577 return(result);
saloutos 0:083111ae2a11 578 }
saloutos 0:083111ae2a11 579
saloutos 0:083111ae2a11 580 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
saloutos 0:083111ae2a11 581 {
saloutos 0:083111ae2a11 582 uint32_t result;
saloutos 0:083111ae2a11 583
saloutos 0:083111ae2a11 584 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
saloutos 0:083111ae2a11 585 return(result);
saloutos 0:083111ae2a11 586 }
saloutos 0:083111ae2a11 587
saloutos 0:083111ae2a11 588 #define __SMLSLD(ARG1,ARG2,ARG3) \
saloutos 0:083111ae2a11 589 ({ \
saloutos 0:083111ae2a11 590 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
saloutos 0:083111ae2a11 591 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
saloutos 0:083111ae2a11 592 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
saloutos 0:083111ae2a11 593 })
saloutos 0:083111ae2a11 594
saloutos 0:083111ae2a11 595 #define __SMLSLDX(ARG1,ARG2,ARG3) \
saloutos 0:083111ae2a11 596 ({ \
saloutos 0:083111ae2a11 597 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
saloutos 0:083111ae2a11 598 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
saloutos 0:083111ae2a11 599 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
saloutos 0:083111ae2a11 600 })
saloutos 0:083111ae2a11 601
saloutos 0:083111ae2a11 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 603 {
saloutos 0:083111ae2a11 604 uint32_t result;
saloutos 0:083111ae2a11 605
saloutos 0:083111ae2a11 606 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 607 return(result);
saloutos 0:083111ae2a11 608 }
saloutos 0:083111ae2a11 609
saloutos 0:083111ae2a11 610 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 611 {
saloutos 0:083111ae2a11 612 uint32_t result;
saloutos 0:083111ae2a11 613
saloutos 0:083111ae2a11 614 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 615 return(result);
saloutos 0:083111ae2a11 616 }
saloutos 0:083111ae2a11 617
saloutos 0:083111ae2a11 618 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
saloutos 0:083111ae2a11 619 {
saloutos 0:083111ae2a11 620 uint32_t result;
saloutos 0:083111ae2a11 621
saloutos 0:083111ae2a11 622 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
saloutos 0:083111ae2a11 623 return(result);
saloutos 0:083111ae2a11 624 }
saloutos 0:083111ae2a11 625
saloutos 0:083111ae2a11 626 #define __PKHBT(ARG1,ARG2,ARG3) \
saloutos 0:083111ae2a11 627 ({ \
saloutos 0:083111ae2a11 628 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
saloutos 0:083111ae2a11 629 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
saloutos 0:083111ae2a11 630 __RES; \
saloutos 0:083111ae2a11 631 })
saloutos 0:083111ae2a11 632
saloutos 0:083111ae2a11 633 #define __PKHTB(ARG1,ARG2,ARG3) \
saloutos 0:083111ae2a11 634 ({ \
saloutos 0:083111ae2a11 635 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
saloutos 0:083111ae2a11 636 if (ARG3 == 0) \
saloutos 0:083111ae2a11 637 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
saloutos 0:083111ae2a11 638 else \
saloutos 0:083111ae2a11 639 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
saloutos 0:083111ae2a11 640 __RES; \
saloutos 0:083111ae2a11 641 })
saloutos 0:083111ae2a11 642
saloutos 0:083111ae2a11 643 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
saloutos 0:083111ae2a11 644 {
saloutos 0:083111ae2a11 645 int32_t result;
saloutos 0:083111ae2a11 646
saloutos 0:083111ae2a11 647 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
saloutos 0:083111ae2a11 648 return(result);
saloutos 0:083111ae2a11 649 }
saloutos 0:083111ae2a11 650
saloutos 0:083111ae2a11 651 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
saloutos 0:083111ae2a11 652
saloutos 0:083111ae2a11 653
saloutos 0:083111ae2a11 654
saloutos 0:083111ae2a11 655 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
saloutos 0:083111ae2a11 656 /* TASKING carm specific functions */
saloutos 0:083111ae2a11 657
saloutos 0:083111ae2a11 658
saloutos 0:083111ae2a11 659 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
saloutos 0:083111ae2a11 660 /* not yet supported */
saloutos 0:083111ae2a11 661 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
saloutos 0:083111ae2a11 662
saloutos 0:083111ae2a11 663
saloutos 0:083111ae2a11 664 #endif
saloutos 0:083111ae2a11 665
saloutos 0:083111ae2a11 666 /*@} end of group CMSIS_SIMD_intrinsics */
saloutos 0:083111ae2a11 667
saloutos 0:083111ae2a11 668
saloutos 0:083111ae2a11 669 #endif /* __CORE_CM4_SIMD_H */
saloutos 0:083111ae2a11 670
saloutos 0:083111ae2a11 671 #ifdef __cplusplus
saloutos 0:083111ae2a11 672 }
saloutos 0:083111ae2a11 673 #endif