adamump simus / IP12B512

IP12B512 class for comunicating with the IPSiLog IP12B512 SPI RAM

IP12B512.h@2:a0029473868c, 2016-11-06 (annotated)

Committer:
adamumpsimus
Date:
Sun Nov 06 16:08:04 2016 +0000
Revision:
2:a0029473868c
Parent:
0:35077a3db00c 
updated the docs

Who changed what in which revision?

UserRevisionLine numberNew contents of line
adamumpsimus 0:35077a3db00c 1 #ifndef IP12B512_H
adamumpsimus 0:35077a3db00c 2 #define IP12B512_H
adamumpsimus 0:35077a3db00c 3
adamumpsimus 0:35077a3db00c 4 #include "mbed.h"
adamumpsimus 0:35077a3db00c 5
adamumpsimus 0:35077a3db00c 6 // Operation Instruction Set
adamumpsimus 0:35077a3db00c 7 #define IP12B512_READ 0x03 // Read memory data beginning at selected address
adamumpsimus 0:35077a3db00c 8 #define IP12B512_WRITE 0x02 // Write memory data beginning at selected address
adamumpsimus 0:35077a3db00c 9 #define IP12B512_RDSR 0x05 // Read status register (not implemented)
adamumpsimus 0:35077a3db00c 10 #define IP12B512_WRSR 0x01 // Write status register
adamumpsimus 0:35077a3db00c 11 #define IP12B512_RDMI 0x0E // Read Memory Size
adamumpsimus 0:35077a3db00c 12
adamumpsimus 2:a0029473868c 13 /** IP12B512 class.
adamumpsimus 2:a0029473868c 14 * Read/write byte and read/write chunks from/to IP12B512 SPI RAM
adamumpsimus 2:a0029473868c 15 *
adamumpsimus 2:a0029473868c 16 * PDF manual @ http://www.search-pdf-manuals.com/manual/ipsilog-ip12b512-512k-spi-low-power-serial-sram-46
adamumpsimus 2:a0029473868c 17 *
adamumpsimus 2:a0029473868c 18 * Notes:
adamumpsimus 2:a0029473868c 19 * - the MOSI and MISO pins must have pulldown resistors (i used 5k6 resistors)
adamumpsimus 2:a0029473868c 20 * - the SCLK pin has a pulldown resistor (i used 5k6 resistor)
adamumpsimus 2:a0029473868c 21 * - the HOLD pin is connected directly to VCC
adamumpsimus 2:a0029473868c 22 * - the CS pin has a pullup resistor (i used 5k6 resistor)
adamumpsimus 2:a0029473868c 23 *
adamumpsimus 2:a0029473868c 24 * Example:
adamumpsimus 2:a0029473868c 25 * @code
adamumpsimus 2:a0029473868c 26 *
adamumpsimus 2:a0029473868c 27 * #include "mbed.h"
adamumpsimus 2:a0029473868c 28 * #include "IP12B512.cpp"
adamumpsimus 2:a0029473868c 29 *
adamumpsimus 2:a0029473868c 30 * IP12B512 sram(SPI_MOSI, SPI_MISO, SPI_SCK, D6); // MOSI, MISO, SCK, CS
adamumpsimus 2:a0029473868c 31 *
adamumpsimus 2:a0029473868c 32 * int main() {
adamumpsimus 2:a0029473868c 33 * // GET SRAM SIZE
adamumpsimus 2:a0029473868c 34 * uint32_t ram_size = sram.GetRamSize();
adamumpsimus 2:a0029473868c 35 * printf("ram_size %d\n", ram_size);
adamumpsimus 2:a0029473868c 36 *
adamumpsimus 2:a0029473868c 37 * // CLEAR ALL SRAM
adamumpsimus 2:a0029473868c 38 * sram.ClearAll();
adamumpsimus 2:a0029473868c 39 *
adamumpsimus 2:a0029473868c 40 * // WRITE A SINGLE BYTE TO SRAM
adamumpsimus 2:a0029473868c 41 * uint16_t ram_addr = 0;
adamumpsimus 2:a0029473868c 42 * uint8_t sent_data = 0x6F;
adamumpsimus 2:a0029473868c 43 * sram.Write(ram_addr, sent_data);
adamumpsimus 2:a0029473868c 44 * printf("written at address %d data 0x%02X\n", ram_addr, sent_data);
adamumpsimus 2:a0029473868c 45 *
adamumpsimus 2:a0029473868c 46 * // READ A SINGLE BYTE FROM RAM
adamumpsimus 2:a0029473868c 47 * uint8_t rec_data = sram.Read(ram_addr);
adamumpsimus 2:a0029473868c 48 * printf("read at address %d data 0x%02X\n", ram_addr, rec_data);
adamumpsimus 2:a0029473868c 49 * }
adamumpsimus 2:a0029473868c 50 * @endcode
adamumpsimus 2:a0029473868c 51 */
adamumpsimus 0:35077a3db00c 52 class IP12B512
adamumpsimus 0:35077a3db00c 53 {
adamumpsimus 0:35077a3db00c 54 public:
adamumpsimus 2:a0029473868c 55 /** Constructor: setup the SPI and write to "Status Register" that we are going to use it in "Virtual Chip Mode"
adamumpsimus 2:a0029473868c 56 *
adamumpsimus 2:a0029473868c 57 * @param pin_mosi the hardware MOSI pin on the board
adamumpsimus 2:a0029473868c 58 * @param pin_miso the hardware MISO pin on the board
adamumpsimus 2:a0029473868c 59 * @param pin_sclk the hardware SCLK pin on the board
adamumpsimus 2:a0029473868c 60 * @param pin_cs the software CS pin on the board (can be any output pin)
adamumpsimus 2:a0029473868c 61 *
adamumpsimus 2:a0029473868c 62 */
adamumpsimus 0:35077a3db00c 63 IP12B512(
adamumpsimus 0:35077a3db00c 64 PinName pin_mosi,
adamumpsimus 0:35077a3db00c 65 PinName pin_miso,
adamumpsimus 0:35077a3db00c 66 PinName pin_sclk,
adamumpsimus 0:35077a3db00c 67 PinName pin_cs
adamumpsimus 0:35077a3db00c 68 );
adamumpsimus 2:a0029473868c 69 /** Write SRAM in byte mode (sends the highest amount of data to SRAM prior to write)
adamumpsimus 2:a0029473868c 70 */
adamumpsimus 0:35077a3db00c 71 void Write(uint16_t addr, uint8_t data);
adamumpsimus 2:a0029473868c 72 /** Write SRAM in stream mode (faster then Write method)
adamumpsimus 2:a0029473868c 73 */
adamumpsimus 0:35077a3db00c 74 void StreamWrite(uint16_t addr, uint8_t *data, uint32_t size);
adamumpsimus 2:a0029473868c 75 /** Read SRAM in byte mode (sends the highest amount of data to SRAM prior to read)
adamumpsimus 2:a0029473868c 76 */
adamumpsimus 0:35077a3db00c 77 uint8_t Read(uint16_t addr);
adamumpsimus 2:a0029473868c 78 /** Read SRAM in stream mode (faster then Read method)
adamumpsimus 2:a0029473868c 79 */
adamumpsimus 0:35077a3db00c 80 void StreamRead(uint16_t addr, uint8_t *data, uint32_t size);
adamumpsimus 2:a0029473868c 81 /** Fill SRAM with data
adamumpsimus 2:a0029473868c 82 */
adamumpsimus 0:35077a3db00c 83 void ClearAll();
adamumpsimus 2:a0029473868c 84 /** Get the SRAM size in bytes
adamumpsimus 2:a0029473868c 85 */
adamumpsimus 0:35077a3db00c 86 uint32_t GetRamSize();
adamumpsimus 0:35077a3db00c 87
adamumpsimus 0:35077a3db00c 88 private:
adamumpsimus 0:35077a3db00c 89 SPI _device;
adamumpsimus 0:35077a3db00c 90 DigitalOut _cs;
adamumpsimus 0:35077a3db00c 91 };
adamumpsimus 0:35077a3db00c 92
adamumpsimus 0:35077a3db00c 93 #endif