Mateusz Kowalik / Application

USB Serial application

Fork of USBSerial_HelloWorld by Samuel Mokrani

mbed-dev/cmsis/core_cmFunc.h@10:41552d038a69, 2017-01-10 (annotated)

Committer:
Zaitsev
Date:
Tue Jan 10 20:42:26 2017 +0000
Revision:
10:41552d038a69
USB Serial bi-directional bridge

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Zaitsev 10:41552d038a69 1 /**************************************************************************//**
Zaitsev 10:41552d038a69 2 * @file core_cmFunc.h
Zaitsev 10:41552d038a69 3 * @brief CMSIS Cortex-M Core Function Access Header File
Zaitsev 10:41552d038a69 4 * @version V4.10
Zaitsev 10:41552d038a69 5 * @date 18. March 2015
Zaitsev 10:41552d038a69 6 *
Zaitsev 10:41552d038a69 7 * @note
Zaitsev 10:41552d038a69 8 *
Zaitsev 10:41552d038a69 9 ******************************************************************************/
Zaitsev 10:41552d038a69 10 /* Copyright (c) 2009 - 2015 ARM LIMITED
Zaitsev 10:41552d038a69 11
Zaitsev 10:41552d038a69 12 All rights reserved.
Zaitsev 10:41552d038a69 13 Redistribution and use in source and binary forms, with or without
Zaitsev 10:41552d038a69 14 modification, are permitted provided that the following conditions are met:
Zaitsev 10:41552d038a69 15 - Redistributions of source code must retain the above copyright
Zaitsev 10:41552d038a69 16 notice, this list of conditions and the following disclaimer.
Zaitsev 10:41552d038a69 17 - Redistributions in binary form must reproduce the above copyright
Zaitsev 10:41552d038a69 18 notice, this list of conditions and the following disclaimer in the
Zaitsev 10:41552d038a69 19 documentation and/or other materials provided with the distribution.
Zaitsev 10:41552d038a69 20 - Neither the name of ARM nor the names of its contributors may be used
Zaitsev 10:41552d038a69 21 to endorse or promote products derived from this software without
Zaitsev 10:41552d038a69 22 specific prior written permission.
Zaitsev 10:41552d038a69 23 *
Zaitsev 10:41552d038a69 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Zaitsev 10:41552d038a69 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Zaitsev 10:41552d038a69 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
Zaitsev 10:41552d038a69 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
Zaitsev 10:41552d038a69 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
Zaitsev 10:41552d038a69 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
Zaitsev 10:41552d038a69 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
Zaitsev 10:41552d038a69 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
Zaitsev 10:41552d038a69 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
Zaitsev 10:41552d038a69 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Zaitsev 10:41552d038a69 34 POSSIBILITY OF SUCH DAMAGE.
Zaitsev 10:41552d038a69 35 ---------------------------------------------------------------------------*/
Zaitsev 10:41552d038a69 36
Zaitsev 10:41552d038a69 37
Zaitsev 10:41552d038a69 38 #ifndef __CORE_CMFUNC_H
Zaitsev 10:41552d038a69 39 #define __CORE_CMFUNC_H
Zaitsev 10:41552d038a69 40
Zaitsev 10:41552d038a69 41
Zaitsev 10:41552d038a69 42 /* ########################### Core Function Access ########################### */
Zaitsev 10:41552d038a69 43 /** \ingroup CMSIS_Core_FunctionInterface
Zaitsev 10:41552d038a69 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
Zaitsev 10:41552d038a69 45 @{
Zaitsev 10:41552d038a69 46 */
Zaitsev 10:41552d038a69 47
Zaitsev 10:41552d038a69 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
Zaitsev 10:41552d038a69 49 /* ARM armcc specific functions */
Zaitsev 10:41552d038a69 50
Zaitsev 10:41552d038a69 51 #if (__ARMCC_VERSION < 400677)
Zaitsev 10:41552d038a69 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
Zaitsev 10:41552d038a69 53 #endif
Zaitsev 10:41552d038a69 54
Zaitsev 10:41552d038a69 55 /* intrinsic void __enable_irq(); */
Zaitsev 10:41552d038a69 56 /* intrinsic void __disable_irq(); */
Zaitsev 10:41552d038a69 57
Zaitsev 10:41552d038a69 58 /** \brief Get Control Register
Zaitsev 10:41552d038a69 59
Zaitsev 10:41552d038a69 60 This function returns the content of the Control Register.
Zaitsev 10:41552d038a69 61
Zaitsev 10:41552d038a69 62 \return Control Register value
Zaitsev 10:41552d038a69 63 */
Zaitsev 10:41552d038a69 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
Zaitsev 10:41552d038a69 65 {
Zaitsev 10:41552d038a69 66 register uint32_t __regControl __ASM("control");
Zaitsev 10:41552d038a69 67 return(__regControl);
Zaitsev 10:41552d038a69 68 }
Zaitsev 10:41552d038a69 69
Zaitsev 10:41552d038a69 70
Zaitsev 10:41552d038a69 71 /** \brief Set Control Register
Zaitsev 10:41552d038a69 72
Zaitsev 10:41552d038a69 73 This function writes the given value to the Control Register.
Zaitsev 10:41552d038a69 74
Zaitsev 10:41552d038a69 75 \param [in] control Control Register value to set
Zaitsev 10:41552d038a69 76 */
Zaitsev 10:41552d038a69 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
Zaitsev 10:41552d038a69 78 {
Zaitsev 10:41552d038a69 79 register uint32_t __regControl __ASM("control");
Zaitsev 10:41552d038a69 80 __regControl = control;
Zaitsev 10:41552d038a69 81 }
Zaitsev 10:41552d038a69 82
Zaitsev 10:41552d038a69 83
Zaitsev 10:41552d038a69 84 /** \brief Get IPSR Register
Zaitsev 10:41552d038a69 85
Zaitsev 10:41552d038a69 86 This function returns the content of the IPSR Register.
Zaitsev 10:41552d038a69 87
Zaitsev 10:41552d038a69 88 \return IPSR Register value
Zaitsev 10:41552d038a69 89 */
Zaitsev 10:41552d038a69 90 __STATIC_INLINE uint32_t __get_IPSR(void)
Zaitsev 10:41552d038a69 91 {
Zaitsev 10:41552d038a69 92 register uint32_t __regIPSR __ASM("ipsr");
Zaitsev 10:41552d038a69 93 return(__regIPSR);
Zaitsev 10:41552d038a69 94 }
Zaitsev 10:41552d038a69 95
Zaitsev 10:41552d038a69 96
Zaitsev 10:41552d038a69 97 /** \brief Get APSR Register
Zaitsev 10:41552d038a69 98
Zaitsev 10:41552d038a69 99 This function returns the content of the APSR Register.
Zaitsev 10:41552d038a69 100
Zaitsev 10:41552d038a69 101 \return APSR Register value
Zaitsev 10:41552d038a69 102 */
Zaitsev 10:41552d038a69 103 __STATIC_INLINE uint32_t __get_APSR(void)
Zaitsev 10:41552d038a69 104 {
Zaitsev 10:41552d038a69 105 register uint32_t __regAPSR __ASM("apsr");
Zaitsev 10:41552d038a69 106 return(__regAPSR);
Zaitsev 10:41552d038a69 107 }
Zaitsev 10:41552d038a69 108
Zaitsev 10:41552d038a69 109
Zaitsev 10:41552d038a69 110 /** \brief Get xPSR Register
Zaitsev 10:41552d038a69 111
Zaitsev 10:41552d038a69 112 This function returns the content of the xPSR Register.
Zaitsev 10:41552d038a69 113
Zaitsev 10:41552d038a69 114 \return xPSR Register value
Zaitsev 10:41552d038a69 115 */
Zaitsev 10:41552d038a69 116 __STATIC_INLINE uint32_t __get_xPSR(void)
Zaitsev 10:41552d038a69 117 {
Zaitsev 10:41552d038a69 118 register uint32_t __regXPSR __ASM("xpsr");
Zaitsev 10:41552d038a69 119 return(__regXPSR);
Zaitsev 10:41552d038a69 120 }
Zaitsev 10:41552d038a69 121
Zaitsev 10:41552d038a69 122
Zaitsev 10:41552d038a69 123 /** \brief Get Process Stack Pointer
Zaitsev 10:41552d038a69 124
Zaitsev 10:41552d038a69 125 This function returns the current value of the Process Stack Pointer (PSP).
Zaitsev 10:41552d038a69 126
Zaitsev 10:41552d038a69 127 \return PSP Register value
Zaitsev 10:41552d038a69 128 */
Zaitsev 10:41552d038a69 129 __STATIC_INLINE uint32_t __get_PSP(void)
Zaitsev 10:41552d038a69 130 {
Zaitsev 10:41552d038a69 131 register uint32_t __regProcessStackPointer __ASM("psp");
Zaitsev 10:41552d038a69 132 return(__regProcessStackPointer);
Zaitsev 10:41552d038a69 133 }
Zaitsev 10:41552d038a69 134
Zaitsev 10:41552d038a69 135
Zaitsev 10:41552d038a69 136 /** \brief Set Process Stack Pointer
Zaitsev 10:41552d038a69 137
Zaitsev 10:41552d038a69 138 This function assigns the given value to the Process Stack Pointer (PSP).
Zaitsev 10:41552d038a69 139
Zaitsev 10:41552d038a69 140 \param [in] topOfProcStack Process Stack Pointer value to set
Zaitsev 10:41552d038a69 141 */
Zaitsev 10:41552d038a69 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
Zaitsev 10:41552d038a69 143 {
Zaitsev 10:41552d038a69 144 register uint32_t __regProcessStackPointer __ASM("psp");
Zaitsev 10:41552d038a69 145 __regProcessStackPointer = topOfProcStack;
Zaitsev 10:41552d038a69 146 }
Zaitsev 10:41552d038a69 147
Zaitsev 10:41552d038a69 148
Zaitsev 10:41552d038a69 149 /** \brief Get Main Stack Pointer
Zaitsev 10:41552d038a69 150
Zaitsev 10:41552d038a69 151 This function returns the current value of the Main Stack Pointer (MSP).
Zaitsev 10:41552d038a69 152
Zaitsev 10:41552d038a69 153 \return MSP Register value
Zaitsev 10:41552d038a69 154 */
Zaitsev 10:41552d038a69 155 __STATIC_INLINE uint32_t __get_MSP(void)
Zaitsev 10:41552d038a69 156 {
Zaitsev 10:41552d038a69 157 register uint32_t __regMainStackPointer __ASM("msp");
Zaitsev 10:41552d038a69 158 return(__regMainStackPointer);
Zaitsev 10:41552d038a69 159 }
Zaitsev 10:41552d038a69 160
Zaitsev 10:41552d038a69 161
Zaitsev 10:41552d038a69 162 /** \brief Set Main Stack Pointer
Zaitsev 10:41552d038a69 163
Zaitsev 10:41552d038a69 164 This function assigns the given value to the Main Stack Pointer (MSP).
Zaitsev 10:41552d038a69 165
Zaitsev 10:41552d038a69 166 \param [in] topOfMainStack Main Stack Pointer value to set
Zaitsev 10:41552d038a69 167 */
Zaitsev 10:41552d038a69 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
Zaitsev 10:41552d038a69 169 {
Zaitsev 10:41552d038a69 170 register uint32_t __regMainStackPointer __ASM("msp");
Zaitsev 10:41552d038a69 171 __regMainStackPointer = topOfMainStack;
Zaitsev 10:41552d038a69 172 }
Zaitsev 10:41552d038a69 173
Zaitsev 10:41552d038a69 174
Zaitsev 10:41552d038a69 175 /** \brief Get Priority Mask
Zaitsev 10:41552d038a69 176
Zaitsev 10:41552d038a69 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
Zaitsev 10:41552d038a69 178
Zaitsev 10:41552d038a69 179 \return Priority Mask value
Zaitsev 10:41552d038a69 180 */
Zaitsev 10:41552d038a69 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
Zaitsev 10:41552d038a69 182 {
Zaitsev 10:41552d038a69 183 register uint32_t __regPriMask __ASM("primask");
Zaitsev 10:41552d038a69 184 return(__regPriMask);
Zaitsev 10:41552d038a69 185 }
Zaitsev 10:41552d038a69 186
Zaitsev 10:41552d038a69 187
Zaitsev 10:41552d038a69 188 /** \brief Set Priority Mask
Zaitsev 10:41552d038a69 189
Zaitsev 10:41552d038a69 190 This function assigns the given value to the Priority Mask Register.
Zaitsev 10:41552d038a69 191
Zaitsev 10:41552d038a69 192 \param [in] priMask Priority Mask
Zaitsev 10:41552d038a69 193 */
Zaitsev 10:41552d038a69 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
Zaitsev 10:41552d038a69 195 {
Zaitsev 10:41552d038a69 196 register uint32_t __regPriMask __ASM("primask");
Zaitsev 10:41552d038a69 197 __regPriMask = (priMask);
Zaitsev 10:41552d038a69 198 }
Zaitsev 10:41552d038a69 199
Zaitsev 10:41552d038a69 200
Zaitsev 10:41552d038a69 201 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
Zaitsev 10:41552d038a69 202
Zaitsev 10:41552d038a69 203 /** \brief Enable FIQ
Zaitsev 10:41552d038a69 204
Zaitsev 10:41552d038a69 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
Zaitsev 10:41552d038a69 206 Can only be executed in Privileged modes.
Zaitsev 10:41552d038a69 207 */
Zaitsev 10:41552d038a69 208 #define __enable_fault_irq __enable_fiq
Zaitsev 10:41552d038a69 209
Zaitsev 10:41552d038a69 210
Zaitsev 10:41552d038a69 211 /** \brief Disable FIQ
Zaitsev 10:41552d038a69 212
Zaitsev 10:41552d038a69 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
Zaitsev 10:41552d038a69 214 Can only be executed in Privileged modes.
Zaitsev 10:41552d038a69 215 */
Zaitsev 10:41552d038a69 216 #define __disable_fault_irq __disable_fiq
Zaitsev 10:41552d038a69 217
Zaitsev 10:41552d038a69 218
Zaitsev 10:41552d038a69 219 /** \brief Get Base Priority
Zaitsev 10:41552d038a69 220
Zaitsev 10:41552d038a69 221 This function returns the current value of the Base Priority register.
Zaitsev 10:41552d038a69 222
Zaitsev 10:41552d038a69 223 \return Base Priority register value
Zaitsev 10:41552d038a69 224 */
Zaitsev 10:41552d038a69 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
Zaitsev 10:41552d038a69 226 {
Zaitsev 10:41552d038a69 227 register uint32_t __regBasePri __ASM("basepri");
Zaitsev 10:41552d038a69 228 return(__regBasePri);
Zaitsev 10:41552d038a69 229 }
Zaitsev 10:41552d038a69 230
Zaitsev 10:41552d038a69 231
Zaitsev 10:41552d038a69 232 /** \brief Set Base Priority
Zaitsev 10:41552d038a69 233
Zaitsev 10:41552d038a69 234 This function assigns the given value to the Base Priority register.
Zaitsev 10:41552d038a69 235
Zaitsev 10:41552d038a69 236 \param [in] basePri Base Priority value to set
Zaitsev 10:41552d038a69 237 */
Zaitsev 10:41552d038a69 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
Zaitsev 10:41552d038a69 239 {
Zaitsev 10:41552d038a69 240 register uint32_t __regBasePri __ASM("basepri");
Zaitsev 10:41552d038a69 241 __regBasePri = (basePri & 0xff);
Zaitsev 10:41552d038a69 242 }
Zaitsev 10:41552d038a69 243
Zaitsev 10:41552d038a69 244
Zaitsev 10:41552d038a69 245 /** \brief Set Base Priority with condition
Zaitsev 10:41552d038a69 246
Zaitsev 10:41552d038a69 247 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
Zaitsev 10:41552d038a69 248 or the new value increases the BASEPRI priority level.
Zaitsev 10:41552d038a69 249
Zaitsev 10:41552d038a69 250 \param [in] basePri Base Priority value to set
Zaitsev 10:41552d038a69 251 */
Zaitsev 10:41552d038a69 252 __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
Zaitsev 10:41552d038a69 253 {
Zaitsev 10:41552d038a69 254 register uint32_t __regBasePriMax __ASM("basepri_max");
Zaitsev 10:41552d038a69 255 __regBasePriMax = (basePri & 0xff);
Zaitsev 10:41552d038a69 256 }
Zaitsev 10:41552d038a69 257
Zaitsev 10:41552d038a69 258
Zaitsev 10:41552d038a69 259 /** \brief Get Fault Mask
Zaitsev 10:41552d038a69 260
Zaitsev 10:41552d038a69 261 This function returns the current value of the Fault Mask register.
Zaitsev 10:41552d038a69 262
Zaitsev 10:41552d038a69 263 \return Fault Mask register value
Zaitsev 10:41552d038a69 264 */
Zaitsev 10:41552d038a69 265 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
Zaitsev 10:41552d038a69 266 {
Zaitsev 10:41552d038a69 267 register uint32_t __regFaultMask __ASM("faultmask");
Zaitsev 10:41552d038a69 268 return(__regFaultMask);
Zaitsev 10:41552d038a69 269 }
Zaitsev 10:41552d038a69 270
Zaitsev 10:41552d038a69 271
Zaitsev 10:41552d038a69 272 /** \brief Set Fault Mask
Zaitsev 10:41552d038a69 273
Zaitsev 10:41552d038a69 274 This function assigns the given value to the Fault Mask register.
Zaitsev 10:41552d038a69 275
Zaitsev 10:41552d038a69 276 \param [in] faultMask Fault Mask value to set
Zaitsev 10:41552d038a69 277 */
Zaitsev 10:41552d038a69 278 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
Zaitsev 10:41552d038a69 279 {
Zaitsev 10:41552d038a69 280 register uint32_t __regFaultMask __ASM("faultmask");
Zaitsev 10:41552d038a69 281 __regFaultMask = (faultMask & (uint32_t)1);
Zaitsev 10:41552d038a69 282 }
Zaitsev 10:41552d038a69 283
Zaitsev 10:41552d038a69 284 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
Zaitsev 10:41552d038a69 285
Zaitsev 10:41552d038a69 286
Zaitsev 10:41552d038a69 287 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
Zaitsev 10:41552d038a69 288
Zaitsev 10:41552d038a69 289 /** \brief Get FPSCR
Zaitsev 10:41552d038a69 290
Zaitsev 10:41552d038a69 291 This function returns the current value of the Floating Point Status/Control register.
Zaitsev 10:41552d038a69 292
Zaitsev 10:41552d038a69 293 \return Floating Point Status/Control register value
Zaitsev 10:41552d038a69 294 */
Zaitsev 10:41552d038a69 295 __STATIC_INLINE uint32_t __get_FPSCR(void)
Zaitsev 10:41552d038a69 296 {
Zaitsev 10:41552d038a69 297 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Zaitsev 10:41552d038a69 298 register uint32_t __regfpscr __ASM("fpscr");
Zaitsev 10:41552d038a69 299 return(__regfpscr);
Zaitsev 10:41552d038a69 300 #else
Zaitsev 10:41552d038a69 301 return(0);
Zaitsev 10:41552d038a69 302 #endif
Zaitsev 10:41552d038a69 303 }
Zaitsev 10:41552d038a69 304
Zaitsev 10:41552d038a69 305
Zaitsev 10:41552d038a69 306 /** \brief Set FPSCR
Zaitsev 10:41552d038a69 307
Zaitsev 10:41552d038a69 308 This function assigns the given value to the Floating Point Status/Control register.
Zaitsev 10:41552d038a69 309
Zaitsev 10:41552d038a69 310 \param [in] fpscr Floating Point Status/Control value to set
Zaitsev 10:41552d038a69 311 */
Zaitsev 10:41552d038a69 312 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
Zaitsev 10:41552d038a69 313 {
Zaitsev 10:41552d038a69 314 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Zaitsev 10:41552d038a69 315 register uint32_t __regfpscr __ASM("fpscr");
Zaitsev 10:41552d038a69 316 __regfpscr = (fpscr);
Zaitsev 10:41552d038a69 317 #endif
Zaitsev 10:41552d038a69 318 }
Zaitsev 10:41552d038a69 319
Zaitsev 10:41552d038a69 320 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
Zaitsev 10:41552d038a69 321
Zaitsev 10:41552d038a69 322
Zaitsev 10:41552d038a69 323 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
Zaitsev 10:41552d038a69 324 /* GNU gcc specific functions */
Zaitsev 10:41552d038a69 325
Zaitsev 10:41552d038a69 326 /** \brief Enable IRQ Interrupts
Zaitsev 10:41552d038a69 327
Zaitsev 10:41552d038a69 328 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
Zaitsev 10:41552d038a69 329 Can only be executed in Privileged modes.
Zaitsev 10:41552d038a69 330 */
Zaitsev 10:41552d038a69 331 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
Zaitsev 10:41552d038a69 332 {
Zaitsev 10:41552d038a69 333 __ASM volatile ("cpsie i" : : : "memory");
Zaitsev 10:41552d038a69 334 }
Zaitsev 10:41552d038a69 335
Zaitsev 10:41552d038a69 336
Zaitsev 10:41552d038a69 337 /** \brief Disable IRQ Interrupts
Zaitsev 10:41552d038a69 338
Zaitsev 10:41552d038a69 339 This function disables IRQ interrupts by setting the I-bit in the CPSR.
Zaitsev 10:41552d038a69 340 Can only be executed in Privileged modes.
Zaitsev 10:41552d038a69 341 */
Zaitsev 10:41552d038a69 342 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
Zaitsev 10:41552d038a69 343 {
Zaitsev 10:41552d038a69 344 __ASM volatile ("cpsid i" : : : "memory");
Zaitsev 10:41552d038a69 345 }
Zaitsev 10:41552d038a69 346
Zaitsev 10:41552d038a69 347
Zaitsev 10:41552d038a69 348 /** \brief Get Control Register
Zaitsev 10:41552d038a69 349
Zaitsev 10:41552d038a69 350 This function returns the content of the Control Register.
Zaitsev 10:41552d038a69 351
Zaitsev 10:41552d038a69 352 \return Control Register value
Zaitsev 10:41552d038a69 353 */
Zaitsev 10:41552d038a69 354 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
Zaitsev 10:41552d038a69 355 {
Zaitsev 10:41552d038a69 356 uint32_t result;
Zaitsev 10:41552d038a69 357
Zaitsev 10:41552d038a69 358 __ASM volatile ("MRS %0, control" : "=r" (result) );
Zaitsev 10:41552d038a69 359 return(result);
Zaitsev 10:41552d038a69 360 }
Zaitsev 10:41552d038a69 361
Zaitsev 10:41552d038a69 362
Zaitsev 10:41552d038a69 363 /** \brief Set Control Register
Zaitsev 10:41552d038a69 364
Zaitsev 10:41552d038a69 365 This function writes the given value to the Control Register.
Zaitsev 10:41552d038a69 366
Zaitsev 10:41552d038a69 367 \param [in] control Control Register value to set
Zaitsev 10:41552d038a69 368 */
Zaitsev 10:41552d038a69 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
Zaitsev 10:41552d038a69 370 {
Zaitsev 10:41552d038a69 371 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
Zaitsev 10:41552d038a69 372 }
Zaitsev 10:41552d038a69 373
Zaitsev 10:41552d038a69 374
Zaitsev 10:41552d038a69 375 /** \brief Get IPSR Register
Zaitsev 10:41552d038a69 376
Zaitsev 10:41552d038a69 377 This function returns the content of the IPSR Register.
Zaitsev 10:41552d038a69 378
Zaitsev 10:41552d038a69 379 \return IPSR Register value
Zaitsev 10:41552d038a69 380 */
Zaitsev 10:41552d038a69 381 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
Zaitsev 10:41552d038a69 382 {
Zaitsev 10:41552d038a69 383 uint32_t result;
Zaitsev 10:41552d038a69 384
Zaitsev 10:41552d038a69 385 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
Zaitsev 10:41552d038a69 386 return(result);
Zaitsev 10:41552d038a69 387 }
Zaitsev 10:41552d038a69 388
Zaitsev 10:41552d038a69 389
Zaitsev 10:41552d038a69 390 /** \brief Get APSR Register
Zaitsev 10:41552d038a69 391
Zaitsev 10:41552d038a69 392 This function returns the content of the APSR Register.
Zaitsev 10:41552d038a69 393
Zaitsev 10:41552d038a69 394 \return APSR Register value
Zaitsev 10:41552d038a69 395 */
Zaitsev 10:41552d038a69 396 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
Zaitsev 10:41552d038a69 397 {
Zaitsev 10:41552d038a69 398 uint32_t result;
Zaitsev 10:41552d038a69 399
Zaitsev 10:41552d038a69 400 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
Zaitsev 10:41552d038a69 401 return(result);
Zaitsev 10:41552d038a69 402 }
Zaitsev 10:41552d038a69 403
Zaitsev 10:41552d038a69 404
Zaitsev 10:41552d038a69 405 /** \brief Get xPSR Register
Zaitsev 10:41552d038a69 406
Zaitsev 10:41552d038a69 407 This function returns the content of the xPSR Register.
Zaitsev 10:41552d038a69 408
Zaitsev 10:41552d038a69 409 \return xPSR Register value
Zaitsev 10:41552d038a69 410 */
Zaitsev 10:41552d038a69 411 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
Zaitsev 10:41552d038a69 412 {
Zaitsev 10:41552d038a69 413 uint32_t result;
Zaitsev 10:41552d038a69 414
Zaitsev 10:41552d038a69 415 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
Zaitsev 10:41552d038a69 416 return(result);
Zaitsev 10:41552d038a69 417 }
Zaitsev 10:41552d038a69 418
Zaitsev 10:41552d038a69 419
Zaitsev 10:41552d038a69 420 /** \brief Get Process Stack Pointer
Zaitsev 10:41552d038a69 421
Zaitsev 10:41552d038a69 422 This function returns the current value of the Process Stack Pointer (PSP).
Zaitsev 10:41552d038a69 423
Zaitsev 10:41552d038a69 424 \return PSP Register value
Zaitsev 10:41552d038a69 425 */
Zaitsev 10:41552d038a69 426 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
Zaitsev 10:41552d038a69 427 {
Zaitsev 10:41552d038a69 428 register uint32_t result;
Zaitsev 10:41552d038a69 429
Zaitsev 10:41552d038a69 430 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
Zaitsev 10:41552d038a69 431 return(result);
Zaitsev 10:41552d038a69 432 }
Zaitsev 10:41552d038a69 433
Zaitsev 10:41552d038a69 434
Zaitsev 10:41552d038a69 435 /** \brief Set Process Stack Pointer
Zaitsev 10:41552d038a69 436
Zaitsev 10:41552d038a69 437 This function assigns the given value to the Process Stack Pointer (PSP).
Zaitsev 10:41552d038a69 438
Zaitsev 10:41552d038a69 439 \param [in] topOfProcStack Process Stack Pointer value to set
Zaitsev 10:41552d038a69 440 */
Zaitsev 10:41552d038a69 441 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
Zaitsev 10:41552d038a69 442 {
Zaitsev 10:41552d038a69 443 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
Zaitsev 10:41552d038a69 444 }
Zaitsev 10:41552d038a69 445
Zaitsev 10:41552d038a69 446
Zaitsev 10:41552d038a69 447 /** \brief Get Main Stack Pointer
Zaitsev 10:41552d038a69 448
Zaitsev 10:41552d038a69 449 This function returns the current value of the Main Stack Pointer (MSP).
Zaitsev 10:41552d038a69 450
Zaitsev 10:41552d038a69 451 \return MSP Register value
Zaitsev 10:41552d038a69 452 */
Zaitsev 10:41552d038a69 453 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
Zaitsev 10:41552d038a69 454 {
Zaitsev 10:41552d038a69 455 register uint32_t result;
Zaitsev 10:41552d038a69 456
Zaitsev 10:41552d038a69 457 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
Zaitsev 10:41552d038a69 458 return(result);
Zaitsev 10:41552d038a69 459 }
Zaitsev 10:41552d038a69 460
Zaitsev 10:41552d038a69 461
Zaitsev 10:41552d038a69 462 /** \brief Set Main Stack Pointer
Zaitsev 10:41552d038a69 463
Zaitsev 10:41552d038a69 464 This function assigns the given value to the Main Stack Pointer (MSP).
Zaitsev 10:41552d038a69 465
Zaitsev 10:41552d038a69 466 \param [in] topOfMainStack Main Stack Pointer value to set
Zaitsev 10:41552d038a69 467 */
Zaitsev 10:41552d038a69 468 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
Zaitsev 10:41552d038a69 469 {
Zaitsev 10:41552d038a69 470 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
Zaitsev 10:41552d038a69 471 }
Zaitsev 10:41552d038a69 472
Zaitsev 10:41552d038a69 473
Zaitsev 10:41552d038a69 474 /** \brief Get Priority Mask
Zaitsev 10:41552d038a69 475
Zaitsev 10:41552d038a69 476 This function returns the current state of the priority mask bit from the Priority Mask Register.
Zaitsev 10:41552d038a69 477
Zaitsev 10:41552d038a69 478 \return Priority Mask value
Zaitsev 10:41552d038a69 479 */
Zaitsev 10:41552d038a69 480 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
Zaitsev 10:41552d038a69 481 {
Zaitsev 10:41552d038a69 482 uint32_t result;
Zaitsev 10:41552d038a69 483
Zaitsev 10:41552d038a69 484 __ASM volatile ("MRS %0, primask" : "=r" (result) );
Zaitsev 10:41552d038a69 485 return(result);
Zaitsev 10:41552d038a69 486 }
Zaitsev 10:41552d038a69 487
Zaitsev 10:41552d038a69 488
Zaitsev 10:41552d038a69 489 /** \brief Set Priority Mask
Zaitsev 10:41552d038a69 490
Zaitsev 10:41552d038a69 491 This function assigns the given value to the Priority Mask Register.
Zaitsev 10:41552d038a69 492
Zaitsev 10:41552d038a69 493 \param [in] priMask Priority Mask
Zaitsev 10:41552d038a69 494 */
Zaitsev 10:41552d038a69 495 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
Zaitsev 10:41552d038a69 496 {
Zaitsev 10:41552d038a69 497 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
Zaitsev 10:41552d038a69 498 }
Zaitsev 10:41552d038a69 499
Zaitsev 10:41552d038a69 500
Zaitsev 10:41552d038a69 501 #if (__CORTEX_M >= 0x03)
Zaitsev 10:41552d038a69 502
Zaitsev 10:41552d038a69 503 /** \brief Enable FIQ
Zaitsev 10:41552d038a69 504
Zaitsev 10:41552d038a69 505 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
Zaitsev 10:41552d038a69 506 Can only be executed in Privileged modes.
Zaitsev 10:41552d038a69 507 */
Zaitsev 10:41552d038a69 508 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
Zaitsev 10:41552d038a69 509 {
Zaitsev 10:41552d038a69 510 __ASM volatile ("cpsie f" : : : "memory");
Zaitsev 10:41552d038a69 511 }
Zaitsev 10:41552d038a69 512
Zaitsev 10:41552d038a69 513
Zaitsev 10:41552d038a69 514 /** \brief Disable FIQ
Zaitsev 10:41552d038a69 515
Zaitsev 10:41552d038a69 516 This function disables FIQ interrupts by setting the F-bit in the CPSR.
Zaitsev 10:41552d038a69 517 Can only be executed in Privileged modes.
Zaitsev 10:41552d038a69 518 */
Zaitsev 10:41552d038a69 519 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
Zaitsev 10:41552d038a69 520 {
Zaitsev 10:41552d038a69 521 __ASM volatile ("cpsid f" : : : "memory");
Zaitsev 10:41552d038a69 522 }
Zaitsev 10:41552d038a69 523
Zaitsev 10:41552d038a69 524
Zaitsev 10:41552d038a69 525 /** \brief Get Base Priority
Zaitsev 10:41552d038a69 526
Zaitsev 10:41552d038a69 527 This function returns the current value of the Base Priority register.
Zaitsev 10:41552d038a69 528
Zaitsev 10:41552d038a69 529 \return Base Priority register value
Zaitsev 10:41552d038a69 530 */
Zaitsev 10:41552d038a69 531 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
Zaitsev 10:41552d038a69 532 {
Zaitsev 10:41552d038a69 533 uint32_t result;
Zaitsev 10:41552d038a69 534
Zaitsev 10:41552d038a69 535 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
Zaitsev 10:41552d038a69 536 return(result);
Zaitsev 10:41552d038a69 537 }
Zaitsev 10:41552d038a69 538
Zaitsev 10:41552d038a69 539
Zaitsev 10:41552d038a69 540 /** \brief Set Base Priority
Zaitsev 10:41552d038a69 541
Zaitsev 10:41552d038a69 542 This function assigns the given value to the Base Priority register.
Zaitsev 10:41552d038a69 543
Zaitsev 10:41552d038a69 544 \param [in] basePri Base Priority value to set
Zaitsev 10:41552d038a69 545 */
Zaitsev 10:41552d038a69 546 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
Zaitsev 10:41552d038a69 547 {
Zaitsev 10:41552d038a69 548 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
Zaitsev 10:41552d038a69 549 }
Zaitsev 10:41552d038a69 550
Zaitsev 10:41552d038a69 551
Zaitsev 10:41552d038a69 552 /** \brief Set Base Priority with condition
Zaitsev 10:41552d038a69 553
Zaitsev 10:41552d038a69 554 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
Zaitsev 10:41552d038a69 555 or the new value increases the BASEPRI priority level.
Zaitsev 10:41552d038a69 556
Zaitsev 10:41552d038a69 557 \param [in] basePri Base Priority value to set
Zaitsev 10:41552d038a69 558 */
Zaitsev 10:41552d038a69 559 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value)
Zaitsev 10:41552d038a69 560 {
Zaitsev 10:41552d038a69 561 __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory");
Zaitsev 10:41552d038a69 562 }
Zaitsev 10:41552d038a69 563
Zaitsev 10:41552d038a69 564
Zaitsev 10:41552d038a69 565 /** \brief Get Fault Mask
Zaitsev 10:41552d038a69 566
Zaitsev 10:41552d038a69 567 This function returns the current value of the Fault Mask register.
Zaitsev 10:41552d038a69 568
Zaitsev 10:41552d038a69 569 \return Fault Mask register value
Zaitsev 10:41552d038a69 570 */
Zaitsev 10:41552d038a69 571 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
Zaitsev 10:41552d038a69 572 {
Zaitsev 10:41552d038a69 573 uint32_t result;
Zaitsev 10:41552d038a69 574
Zaitsev 10:41552d038a69 575 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
Zaitsev 10:41552d038a69 576 return(result);
Zaitsev 10:41552d038a69 577 }
Zaitsev 10:41552d038a69 578
Zaitsev 10:41552d038a69 579
Zaitsev 10:41552d038a69 580 /** \brief Set Fault Mask
Zaitsev 10:41552d038a69 581
Zaitsev 10:41552d038a69 582 This function assigns the given value to the Fault Mask register.
Zaitsev 10:41552d038a69 583
Zaitsev 10:41552d038a69 584 \param [in] faultMask Fault Mask value to set
Zaitsev 10:41552d038a69 585 */
Zaitsev 10:41552d038a69 586 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
Zaitsev 10:41552d038a69 587 {
Zaitsev 10:41552d038a69 588 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
Zaitsev 10:41552d038a69 589 }
Zaitsev 10:41552d038a69 590
Zaitsev 10:41552d038a69 591 #endif /* (__CORTEX_M >= 0x03) */
Zaitsev 10:41552d038a69 592
Zaitsev 10:41552d038a69 593
Zaitsev 10:41552d038a69 594 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
Zaitsev 10:41552d038a69 595
Zaitsev 10:41552d038a69 596 /** \brief Get FPSCR
Zaitsev 10:41552d038a69 597
Zaitsev 10:41552d038a69 598 This function returns the current value of the Floating Point Status/Control register.
Zaitsev 10:41552d038a69 599
Zaitsev 10:41552d038a69 600 \return Floating Point Status/Control register value
Zaitsev 10:41552d038a69 601 */
Zaitsev 10:41552d038a69 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
Zaitsev 10:41552d038a69 603 {
Zaitsev 10:41552d038a69 604 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Zaitsev 10:41552d038a69 605 uint32_t result;
Zaitsev 10:41552d038a69 606
Zaitsev 10:41552d038a69 607 /* Empty asm statement works as a scheduling barrier */
Zaitsev 10:41552d038a69 608 __ASM volatile ("");
Zaitsev 10:41552d038a69 609 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
Zaitsev 10:41552d038a69 610 __ASM volatile ("");
Zaitsev 10:41552d038a69 611 return(result);
Zaitsev 10:41552d038a69 612 #else
Zaitsev 10:41552d038a69 613 return(0);
Zaitsev 10:41552d038a69 614 #endif
Zaitsev 10:41552d038a69 615 }
Zaitsev 10:41552d038a69 616
Zaitsev 10:41552d038a69 617
Zaitsev 10:41552d038a69 618 /** \brief Set FPSCR
Zaitsev 10:41552d038a69 619
Zaitsev 10:41552d038a69 620 This function assigns the given value to the Floating Point Status/Control register.
Zaitsev 10:41552d038a69 621
Zaitsev 10:41552d038a69 622 \param [in] fpscr Floating Point Status/Control value to set
Zaitsev 10:41552d038a69 623 */
Zaitsev 10:41552d038a69 624 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
Zaitsev 10:41552d038a69 625 {
Zaitsev 10:41552d038a69 626 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Zaitsev 10:41552d038a69 627 /* Empty asm statement works as a scheduling barrier */
Zaitsev 10:41552d038a69 628 __ASM volatile ("");
Zaitsev 10:41552d038a69 629 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
Zaitsev 10:41552d038a69 630 __ASM volatile ("");
Zaitsev 10:41552d038a69 631 #endif
Zaitsev 10:41552d038a69 632 }
Zaitsev 10:41552d038a69 633
Zaitsev 10:41552d038a69 634 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
Zaitsev 10:41552d038a69 635
Zaitsev 10:41552d038a69 636
Zaitsev 10:41552d038a69 637 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
Zaitsev 10:41552d038a69 638 /* IAR iccarm specific functions */
Zaitsev 10:41552d038a69 639 #include <cmsis_iar.h>
Zaitsev 10:41552d038a69 640
Zaitsev 10:41552d038a69 641
Zaitsev 10:41552d038a69 642 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
Zaitsev 10:41552d038a69 643 /* TI CCS specific functions */
Zaitsev 10:41552d038a69 644 #include <cmsis_ccs.h>
Zaitsev 10:41552d038a69 645
Zaitsev 10:41552d038a69 646
Zaitsev 10:41552d038a69 647 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
Zaitsev 10:41552d038a69 648 /* TASKING carm specific functions */
Zaitsev 10:41552d038a69 649 /*
Zaitsev 10:41552d038a69 650 * The CMSIS functions have been implemented as intrinsics in the compiler.
Zaitsev 10:41552d038a69 651 * Please use "carm -?i" to get an up to date list of all intrinsics,
Zaitsev 10:41552d038a69 652 * Including the CMSIS ones.
Zaitsev 10:41552d038a69 653 */
Zaitsev 10:41552d038a69 654
Zaitsev 10:41552d038a69 655
Zaitsev 10:41552d038a69 656 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
Zaitsev 10:41552d038a69 657 /* Cosmic specific functions */
Zaitsev 10:41552d038a69 658 #include <cmsis_csm.h>
Zaitsev 10:41552d038a69 659
Zaitsev 10:41552d038a69 660 #endif
Zaitsev 10:41552d038a69 661
Zaitsev 10:41552d038a69 662 /*@} end of CMSIS_Core_RegAccFunctions */
Zaitsev 10:41552d038a69 663
Zaitsev 10:41552d038a69 664 #endif /* __CORE_CMFUNC_H */