FastPWM
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Device/FastPWM_STM_TIM_PinOut.cpp@13:cdefd9d75b64, 2014-07-20 (annotated)
- Committer:
- Sissors
- Date:
- Sun Jul 20 19:49:43 2014 +0000
- Revision:
- 13:cdefd9d75b64
- Child:
- 15:49a7eff133b3
Added NUCLEO support (F030 + F401, but others should be easily added).
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Sissors | 13:cdefd9d75b64 | 1 | #include "mbed.h" |
Sissors | 13:cdefd9d75b64 | 2 | |
Sissors | 13:cdefd9d75b64 | 3 | #ifdef TARGET_NUCLEO_F030R8 |
Sissors | 13:cdefd9d75b64 | 4 | __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) { |
Sissors | 13:cdefd9d75b64 | 5 | switch (pin) { |
Sissors | 13:cdefd9d75b64 | 6 | // Channels 1 |
Sissors | 13:cdefd9d75b64 | 7 | case PA_4: case PA_6: case PB_1: case PB_4: case PB_8: case PB_9: case PB_14: case PC_6: case PB_6: case PB_7: |
Sissors | 13:cdefd9d75b64 | 8 | return &pwm->CCR1; |
Sissors | 13:cdefd9d75b64 | 9 | |
Sissors | 13:cdefd9d75b64 | 10 | // Channels 2 |
Sissors | 13:cdefd9d75b64 | 11 | case PA_7: case PB_5: case PC_7: |
Sissors | 13:cdefd9d75b64 | 12 | return &pwm->CCR2; |
Sissors | 13:cdefd9d75b64 | 13 | |
Sissors | 13:cdefd9d75b64 | 14 | // Channels 3 |
Sissors | 13:cdefd9d75b64 | 15 | case PB_0: case PC_8: |
Sissors | 13:cdefd9d75b64 | 16 | return &pwm->CCR3; |
Sissors | 13:cdefd9d75b64 | 17 | |
Sissors | 13:cdefd9d75b64 | 18 | // Channels 4 |
Sissors | 13:cdefd9d75b64 | 19 | case PC_9: |
Sissors | 13:cdefd9d75b64 | 20 | return &pwm->CCR4; |
Sissors | 13:cdefd9d75b64 | 21 | } |
Sissors | 13:cdefd9d75b64 | 22 | return NULL; |
Sissors | 13:cdefd9d75b64 | 23 | } |
Sissors | 13:cdefd9d75b64 | 24 | #endif |
Sissors | 13:cdefd9d75b64 | 25 | |
Sissors | 13:cdefd9d75b64 | 26 | #ifdef TARGET_NUCLEO_F401RE |
Sissors | 13:cdefd9d75b64 | 27 | __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) { |
Sissors | 13:cdefd9d75b64 | 28 | switch (pin) { |
Sissors | 13:cdefd9d75b64 | 29 | // Channels 1 |
Sissors | 13:cdefd9d75b64 | 30 | case PA_0: case PA_5: case PA_6: case PA_8: case PA_15: case PB_4: case PB_6: case PC_6: case PA_7: case PB_13: |
Sissors | 13:cdefd9d75b64 | 31 | return &pwm->CCR1; |
Sissors | 13:cdefd9d75b64 | 32 | |
Sissors | 13:cdefd9d75b64 | 33 | // Channels 2 |
Sissors | 13:cdefd9d75b64 | 34 | case PA_1: case PA_9: case PB_3: case PB_5: case PB_7: case PC_7: case PB_0: case PB_14: |
Sissors | 13:cdefd9d75b64 | 35 | return &pwm->CCR2; |
Sissors | 13:cdefd9d75b64 | 36 | |
Sissors | 13:cdefd9d75b64 | 37 | // Channels 3 |
Sissors | 13:cdefd9d75b64 | 38 | case PA_2: case PA_10: case PB_8: case PB_10: case PC_8: case PB_1: case PB_15: |
Sissors | 13:cdefd9d75b64 | 39 | return &pwm->CCR3; |
Sissors | 13:cdefd9d75b64 | 40 | |
Sissors | 13:cdefd9d75b64 | 41 | // Channels 4 |
Sissors | 13:cdefd9d75b64 | 42 | case PA_3: case PA_11: case PB_9: case PC_9: |
Sissors | 13:cdefd9d75b64 | 43 | return &pwm->CCR4; |
Sissors | 13:cdefd9d75b64 | 44 | } |
Sissors | 13:cdefd9d75b64 | 45 | return NULL; |
Sissors | 13:cdefd9d75b64 | 46 | } |
Sissors | 13:cdefd9d75b64 | 47 | #endif |