This short program illustrates how to use the DS130x_I2C library. My objective is to share the same RTC with Microchip 18F MCU.

Dependencies:   mbed DebugLibrary

Committer:
Yann
Date:
Wed Feb 09 13:57:49 2011 +0000
Revision:
0:f30e2135b0db
V0.0.0.1

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Yann 0:f30e2135b0db 1
Yann 0:f30e2135b0db 2 /*
Yann 0:f30e2135b0db 3 Copyright (c) 2010 Donatien Garnier (donatiengar [at] gmail [dot] com)
Yann 0:f30e2135b0db 4
Yann 0:f30e2135b0db 5 Permission is hereby granted, free of charge, to any person obtaining a copy
Yann 0:f30e2135b0db 6 of this software and associated documentation files (the "Software"), to deal
Yann 0:f30e2135b0db 7 in the Software without restriction, including without limitation the rights
Yann 0:f30e2135b0db 8 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
Yann 0:f30e2135b0db 9 copies of the Software, and to permit persons to whom the Software is
Yann 0:f30e2135b0db 10 furnished to do so, subject to the following conditions:
Yann 0:f30e2135b0db 11
Yann 0:f30e2135b0db 12 The above copyright notice and this permission notice shall be included in
Yann 0:f30e2135b0db 13 all copies or substantial portions of the Software.
Yann 0:f30e2135b0db 14
Yann 0:f30e2135b0db 15 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
Yann 0:f30e2135b0db 16 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
Yann 0:f30e2135b0db 17 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
Yann 0:f30e2135b0db 18 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
Yann 0:f30e2135b0db 19 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
Yann 0:f30e2135b0db 20 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
Yann 0:f30e2135b0db 21 THE SOFTWARE.
Yann 0:f30e2135b0db 22 */
Yann 0:f30e2135b0db 23
Yann 0:f30e2135b0db 24 #include "UsbHostMgr.h"
Yann 0:f30e2135b0db 25
Yann 0:f30e2135b0db 26 #include "usb_mem.h"
Yann 0:f30e2135b0db 27
Yann 0:f30e2135b0db 28 #include "string.h" //For memcpy, memmove, memset
Yann 0:f30e2135b0db 29
Yann 0:f30e2135b0db 30 #include "netCfg.h"
Yann 0:f30e2135b0db 31 #if NET_USB
Yann 0:f30e2135b0db 32
Yann 0:f30e2135b0db 33 //#define __DEBUG
Yann 0:f30e2135b0db 34 #include "dbg/dbg.h"
Yann 0:f30e2135b0db 35
Yann 0:f30e2135b0db 36 // bits of the USB/OTG clock control register
Yann 0:f30e2135b0db 37 #define HOST_CLK_EN (1<<0)
Yann 0:f30e2135b0db 38 #define DEV_CLK_EN (1<<1)
Yann 0:f30e2135b0db 39 #define PORTSEL_CLK_EN (1<<3)
Yann 0:f30e2135b0db 40 #define AHB_CLK_EN (1<<4)
Yann 0:f30e2135b0db 41
Yann 0:f30e2135b0db 42 // bits of the USB/OTG clock status register
Yann 0:f30e2135b0db 43 #define HOST_CLK_ON (1<<0)
Yann 0:f30e2135b0db 44 #define DEV_CLK_ON (1<<1)
Yann 0:f30e2135b0db 45 #define PORTSEL_CLK_ON (1<<3)
Yann 0:f30e2135b0db 46 #define AHB_CLK_ON (1<<4)
Yann 0:f30e2135b0db 47
Yann 0:f30e2135b0db 48 // we need host clock, OTG/portsel clock and AHB clock
Yann 0:f30e2135b0db 49 #define CLOCK_MASK (HOST_CLK_EN | PORTSEL_CLK_EN | AHB_CLK_EN)
Yann 0:f30e2135b0db 50
Yann 0:f30e2135b0db 51 static UsbHostMgr* pMgr = NULL;
Yann 0:f30e2135b0db 52
Yann 0:f30e2135b0db 53 extern "C" void sUsbIrqhandler(void) __irq
Yann 0:f30e2135b0db 54 {
Yann 0:f30e2135b0db 55 DBG("\n+Int\n");
Yann 0:f30e2135b0db 56 if(pMgr)
Yann 0:f30e2135b0db 57 pMgr->UsbIrqhandler();
Yann 0:f30e2135b0db 58 DBG("\n-Int\n");
Yann 0:f30e2135b0db 59 return;
Yann 0:f30e2135b0db 60 }
Yann 0:f30e2135b0db 61
Yann 0:f30e2135b0db 62 UsbHostMgr::UsbHostMgr() : m_lpDevices()
Yann 0:f30e2135b0db 63 {
Yann 0:f30e2135b0db 64 /*if(!pMgr)*/ //Assume singleton
Yann 0:f30e2135b0db 65 pMgr = this;
Yann 0:f30e2135b0db 66 usb_mem_init();
Yann 0:f30e2135b0db 67 memset(m_lpDevices, NULL, sizeof(UsbDevice*) * USB_HOSTMGR_MAX_DEVS);
Yann 0:f30e2135b0db 68 m_pHcca = (HCCA*) usb_get_hcca();
Yann 0:f30e2135b0db 69 memset((void*)m_pHcca, 0, 0x100);
Yann 0:f30e2135b0db 70 DBG("Host manager at %p\n", this);
Yann 0:f30e2135b0db 71 }
Yann 0:f30e2135b0db 72
Yann 0:f30e2135b0db 73 UsbHostMgr::~UsbHostMgr()
Yann 0:f30e2135b0db 74 {
Yann 0:f30e2135b0db 75 if(pMgr == this)
Yann 0:f30e2135b0db 76 pMgr = NULL;
Yann 0:f30e2135b0db 77 }
Yann 0:f30e2135b0db 78
Yann 0:f30e2135b0db 79 UsbErr UsbHostMgr::init() //Initialize host
Yann 0:f30e2135b0db 80 {
Yann 0:f30e2135b0db 81 NVIC_DisableIRQ(USB_IRQn); /* Disable the USB interrupt source */
Yann 0:f30e2135b0db 82
Yann 0:f30e2135b0db 83 LPC_SC->PCONP &= ~(1UL<<31); //Cut power
Yann 0:f30e2135b0db 84 wait(1);
Yann 0:f30e2135b0db 85
Yann 0:f30e2135b0db 86
Yann 0:f30e2135b0db 87 // turn on power for USB
Yann 0:f30e2135b0db 88 LPC_SC->PCONP |= (1UL<<31);
Yann 0:f30e2135b0db 89 // Enable USB host clock, port selection and AHB clock
Yann 0:f30e2135b0db 90 LPC_USB->USBClkCtrl |= CLOCK_MASK;
Yann 0:f30e2135b0db 91 // Wait for clocks to become available
Yann 0:f30e2135b0db 92 while ((LPC_USB->USBClkSt & CLOCK_MASK) != CLOCK_MASK)
Yann 0:f30e2135b0db 93 ;
Yann 0:f30e2135b0db 94
Yann 0:f30e2135b0db 95 // it seems the bits[0:1] mean the following
Yann 0:f30e2135b0db 96 // 0: U1=device, U2=host
Yann 0:f30e2135b0db 97 // 1: U1=host, U2=host
Yann 0:f30e2135b0db 98 // 2: reserved
Yann 0:f30e2135b0db 99 // 3: U1=host, U2=device
Yann 0:f30e2135b0db 100 // NB: this register is only available if OTG clock (aka "port select") is enabled!!
Yann 0:f30e2135b0db 101 // since we don't care about port 2, set just bit 0 to 1 (U1=host)
Yann 0:f30e2135b0db 102 LPC_USB->OTGStCtrl |= 1;
Yann 0:f30e2135b0db 103
Yann 0:f30e2135b0db 104 // now that we've configured the ports, we can turn off the portsel clock
Yann 0:f30e2135b0db 105 LPC_USB->USBClkCtrl &= ~PORTSEL_CLK_EN;
Yann 0:f30e2135b0db 106
Yann 0:f30e2135b0db 107 // power pins are not connected on mbed, so we can skip them
Yann 0:f30e2135b0db 108 /* P1[18] = USB_UP_LED, 01 */
Yann 0:f30e2135b0db 109 /* P1[19] = /USB_PPWR, 10 */
Yann 0:f30e2135b0db 110 /* P1[22] = USB_PWRD, 10 */
Yann 0:f30e2135b0db 111 /* P1[27] = /USB_OVRCR, 10 */
Yann 0:f30e2135b0db 112 /*LPC_PINCON->PINSEL3 &= ~((3<<4) | (3<<6) | (3<<12) | (3<<22));
Yann 0:f30e2135b0db 113 LPC_PINCON->PINSEL3 |= ((1<<4)|(2<<6) | (2<<12) | (2<<22)); // 0x00802080
Yann 0:f30e2135b0db 114 */
Yann 0:f30e2135b0db 115
Yann 0:f30e2135b0db 116 // configure USB D+/D- pins
Yann 0:f30e2135b0db 117 /* P0[29] = USB_D+, 01 */
Yann 0:f30e2135b0db 118 /* P0[30] = USB_D-, 01 */
Yann 0:f30e2135b0db 119 LPC_PINCON->PINSEL1 &= ~((3<<26) | (3<<28));
Yann 0:f30e2135b0db 120 LPC_PINCON->PINSEL1 |= ((1<<26)|(1<<28)); // 0x14000000
Yann 0:f30e2135b0db 121
Yann 0:f30e2135b0db 122 DBG("Initializing Host Stack\n");
Yann 0:f30e2135b0db 123
Yann 0:f30e2135b0db 124 wait_ms(100); /* Wait 50 ms before apply reset */
Yann 0:f30e2135b0db 125 LPC_USB->HcControl = 0; /* HARDWARE RESET */
Yann 0:f30e2135b0db 126 LPC_USB->HcControlHeadED = 0; /* Initialize Control list head to Zero */
Yann 0:f30e2135b0db 127 LPC_USB->HcBulkHeadED = 0; /* Initialize Bulk list head to Zero */
Yann 0:f30e2135b0db 128
Yann 0:f30e2135b0db 129 /* SOFTWARE RESET */
Yann 0:f30e2135b0db 130 LPC_USB->HcCommandStatus = OR_CMD_STATUS_HCR;
Yann 0:f30e2135b0db 131 LPC_USB->HcFmInterval = DEFAULT_FMINTERVAL; /* Write Fm Interval and Largest Data Packet Counter */
Yann 0:f30e2135b0db 132
Yann 0:f30e2135b0db 133 /* Put HC in operational state */
Yann 0:f30e2135b0db 134 LPC_USB->HcControl = (LPC_USB->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER;
Yann 0:f30e2135b0db 135 LPC_USB->HcRhStatus = OR_RH_STATUS_LPSC; /* Set Global Power */
Yann 0:f30e2135b0db 136
Yann 0:f30e2135b0db 137 LPC_USB->HcHCCA = (uint32_t)(m_pHcca);
Yann 0:f30e2135b0db 138 LPC_USB->HcInterruptStatus |= LPC_USB->HcInterruptStatus; /* Clear Interrrupt Status */
Yann 0:f30e2135b0db 139
Yann 0:f30e2135b0db 140
Yann 0:f30e2135b0db 141 LPC_USB->HcInterruptEnable = OR_INTR_ENABLE_MIE |
Yann 0:f30e2135b0db 142 OR_INTR_ENABLE_WDH |
Yann 0:f30e2135b0db 143 OR_INTR_ENABLE_RHSC;
Yann 0:f30e2135b0db 144
Yann 0:f30e2135b0db 145 NVIC_SetPriority(USB_IRQn, 0); /* highest priority */
Yann 0:f30e2135b0db 146 /* Enable the USB Interrupt */
Yann 0:f30e2135b0db 147 NVIC_SetVector(USB_IRQn, (uint32_t)(sUsbIrqhandler));
Yann 0:f30e2135b0db 148 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC;
Yann 0:f30e2135b0db 149 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
Yann 0:f30e2135b0db 150
Yann 0:f30e2135b0db 151 /* Check for any connected devices */
Yann 0:f30e2135b0db 152 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) //Root device connected
Yann 0:f30e2135b0db 153 {
Yann 0:f30e2135b0db 154 //Device connected
Yann 0:f30e2135b0db 155 wait(1);
Yann 0:f30e2135b0db 156 DBG("Device connected (%08x)\n", LPC_USB->HcRhPortStatus1);
Yann 0:f30e2135b0db 157 onUsbDeviceConnected(0, 1); //Hub 0 (root hub), Port 1 (count starts at 1)
Yann 0:f30e2135b0db 158 }
Yann 0:f30e2135b0db 159
Yann 0:f30e2135b0db 160 DBG("Enabling IRQ\n");
Yann 0:f30e2135b0db 161 NVIC_EnableIRQ(USB_IRQn);
Yann 0:f30e2135b0db 162 DBG("End of host stack initialization\n");
Yann 0:f30e2135b0db 163 return USBERR_OK;
Yann 0:f30e2135b0db 164 }
Yann 0:f30e2135b0db 165
Yann 0:f30e2135b0db 166 void UsbHostMgr::poll() //Enumerate connected devices, etc
Yann 0:f30e2135b0db 167 {
Yann 0:f30e2135b0db 168 /* Check for any connected devices */
Yann 0:f30e2135b0db 169 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) //Root device connected
Yann 0:f30e2135b0db 170 {
Yann 0:f30e2135b0db 171 //Device connected
Yann 0:f30e2135b0db 172 wait(1);
Yann 0:f30e2135b0db 173 DBG("Device connected (%08x)\n", LPC_USB->HcRhPortStatus1);
Yann 0:f30e2135b0db 174 onUsbDeviceConnected(0, 1); //Hub 0 (root hub), Port 1 (count starts at 1)
Yann 0:f30e2135b0db 175 }
Yann 0:f30e2135b0db 176
Yann 0:f30e2135b0db 177 for(int i = 0; i < devicesCount(); i++)
Yann 0:f30e2135b0db 178 {
Yann 0:f30e2135b0db 179 if( (m_lpDevices[i]->m_connected)
Yann 0:f30e2135b0db 180 && !(m_lpDevices[i]->m_enumerated) )
Yann 0:f30e2135b0db 181 {
Yann 0:f30e2135b0db 182 m_lpDevices[i]->enumerate();
Yann 0:f30e2135b0db 183 return;
Yann 0:f30e2135b0db 184 }
Yann 0:f30e2135b0db 185 }
Yann 0:f30e2135b0db 186 }
Yann 0:f30e2135b0db 187
Yann 0:f30e2135b0db 188 int UsbHostMgr::devicesCount()
Yann 0:f30e2135b0db 189 {
Yann 0:f30e2135b0db 190 int i;
Yann 0:f30e2135b0db 191 for(i = 0; i < USB_HOSTMGR_MAX_DEVS; i++)
Yann 0:f30e2135b0db 192 {
Yann 0:f30e2135b0db 193 if (m_lpDevices[i] == NULL)
Yann 0:f30e2135b0db 194 break;
Yann 0:f30e2135b0db 195 }
Yann 0:f30e2135b0db 196 return i;
Yann 0:f30e2135b0db 197 }
Yann 0:f30e2135b0db 198
Yann 0:f30e2135b0db 199 UsbDevice* UsbHostMgr::getDevice(int item)
Yann 0:f30e2135b0db 200 {
Yann 0:f30e2135b0db 201 UsbDevice* pDev = m_lpDevices[item];
Yann 0:f30e2135b0db 202 if(!pDev)
Yann 0:f30e2135b0db 203 return NULL;
Yann 0:f30e2135b0db 204
Yann 0:f30e2135b0db 205 pDev->m_refs++;
Yann 0:f30e2135b0db 206 return pDev;
Yann 0:f30e2135b0db 207 }
Yann 0:f30e2135b0db 208
Yann 0:f30e2135b0db 209 void UsbHostMgr::releaseDevice(UsbDevice* pDev)
Yann 0:f30e2135b0db 210 {
Yann 0:f30e2135b0db 211 pDev->m_refs--;
Yann 0:f30e2135b0db 212 if(pDev->m_refs > 0)
Yann 0:f30e2135b0db 213 return;
Yann 0:f30e2135b0db 214 //If refs count = 0, delete
Yann 0:f30e2135b0db 215 //Find & remove from list
Yann 0:f30e2135b0db 216 int i;
Yann 0:f30e2135b0db 217 for(i = 0; i < USB_HOSTMGR_MAX_DEVS; i++)
Yann 0:f30e2135b0db 218 {
Yann 0:f30e2135b0db 219 if (m_lpDevices[i] == pDev)
Yann 0:f30e2135b0db 220 break;
Yann 0:f30e2135b0db 221 }
Yann 0:f30e2135b0db 222 if(i!=USB_HOSTMGR_MAX_DEVS)
Yann 0:f30e2135b0db 223 memmove(&m_lpDevices[i], &m_lpDevices[i+1], sizeof(UsbDevice*) * (USB_HOSTMGR_MAX_DEVS - (i + 1))); //Safer than memcpy because of overlapping mem
Yann 0:f30e2135b0db 224 m_lpDevices[USB_HOSTMGR_MAX_DEVS - 1] = NULL;
Yann 0:f30e2135b0db 225 delete pDev;
Yann 0:f30e2135b0db 226 }
Yann 0:f30e2135b0db 227
Yann 0:f30e2135b0db 228 void UsbHostMgr::UsbIrqhandler()
Yann 0:f30e2135b0db 229 {
Yann 0:f30e2135b0db 230 uint32_t int_status;
Yann 0:f30e2135b0db 231 uint32_t ie_status;
Yann 0:f30e2135b0db 232
Yann 0:f30e2135b0db 233 int_status = LPC_USB->HcInterruptStatus; /* Read Interrupt Status */
Yann 0:f30e2135b0db 234 ie_status = LPC_USB->HcInterruptEnable; /* Read Interrupt enable status */
Yann 0:f30e2135b0db 235
Yann 0:f30e2135b0db 236 if (!(int_status & ie_status))
Yann 0:f30e2135b0db 237 {
Yann 0:f30e2135b0db 238 return;
Yann 0:f30e2135b0db 239 }
Yann 0:f30e2135b0db 240 else
Yann 0:f30e2135b0db 241 {
Yann 0:f30e2135b0db 242 int_status = int_status & ie_status;
Yann 0:f30e2135b0db 243 if (int_status & OR_INTR_STATUS_RHSC) /* Root hub status change interrupt */
Yann 0:f30e2135b0db 244 {
Yann 0:f30e2135b0db 245 DBG("LPC_USB->HcRhPortStatus1 = %08x\n", LPC_USB->HcRhPortStatus1);
Yann 0:f30e2135b0db 246 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CSC)
Yann 0:f30e2135b0db 247 {
Yann 0:f30e2135b0db 248 if (LPC_USB->HcRhStatus & OR_RH_STATUS_DRWE)
Yann 0:f30e2135b0db 249 {
Yann 0:f30e2135b0db 250 /*
Yann 0:f30e2135b0db 251 * When DRWE is on, Connect Status Change
Yann 0:f30e2135b0db 252 * means a remote wakeup event.
Yann 0:f30e2135b0db 253 */
Yann 0:f30e2135b0db 254 //HOST_RhscIntr = 1;// JUST SOMETHING FOR A BREAKPOINT
Yann 0:f30e2135b0db 255 }
Yann 0:f30e2135b0db 256 else
Yann 0:f30e2135b0db 257 {
Yann 0:f30e2135b0db 258 /*
Yann 0:f30e2135b0db 259 * When DRWE is off, Connect Status Change
Yann 0:f30e2135b0db 260 * is NOT a remote wakeup event
Yann 0:f30e2135b0db 261 */
Yann 0:f30e2135b0db 262 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) //Root device connected
Yann 0:f30e2135b0db 263 {
Yann 0:f30e2135b0db 264 //Device connected
Yann 0:f30e2135b0db 265 DBG("Device connected (%08x)\n", LPC_USB->HcRhPortStatus1);
Yann 0:f30e2135b0db 266 onUsbDeviceConnected(0, 1); //Hub 0 (root hub), Port 1 (count starts at 1)
Yann 0:f30e2135b0db 267 }
Yann 0:f30e2135b0db 268 else //Root device disconnected
Yann 0:f30e2135b0db 269 {
Yann 0:f30e2135b0db 270 //Device disconnected
Yann 0:f30e2135b0db 271 DBG("Device disconnected\n");
Yann 0:f30e2135b0db 272 onUsbDeviceDisconnected(0, 1);
Yann 0:f30e2135b0db 273 }
Yann 0:f30e2135b0db 274 //TODO: HUBS
Yann 0:f30e2135b0db 275 }
Yann 0:f30e2135b0db 276 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC;
Yann 0:f30e2135b0db 277 }
Yann 0:f30e2135b0db 278 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRSC)
Yann 0:f30e2135b0db 279 {
Yann 0:f30e2135b0db 280 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
Yann 0:f30e2135b0db 281 }
Yann 0:f30e2135b0db 282 }
Yann 0:f30e2135b0db 283 if (int_status & OR_INTR_STATUS_WDH) /* Writeback Done Head interrupt */
Yann 0:f30e2135b0db 284 {
Yann 0:f30e2135b0db 285 //UsbEndpoint::sOnCompletion((LPC_USB->HccaDoneHead) & 0xFE);
Yann 0:f30e2135b0db 286 if(m_pHcca->DoneHead)
Yann 0:f30e2135b0db 287 {
Yann 0:f30e2135b0db 288 UsbEndpoint::sOnCompletion(m_pHcca->DoneHead);
Yann 0:f30e2135b0db 289 m_pHcca->DoneHead = 0;
Yann 0:f30e2135b0db 290 LPC_USB->HcInterruptStatus = OR_INTR_STATUS_WDH;
Yann 0:f30e2135b0db 291 if(m_pHcca->DoneHead)
Yann 0:f30e2135b0db 292 DBG("??????????????????????????????\n\n\n");
Yann 0:f30e2135b0db 293 }
Yann 0:f30e2135b0db 294 else
Yann 0:f30e2135b0db 295 {
Yann 0:f30e2135b0db 296 //Probably an error
Yann 0:f30e2135b0db 297 int_status = LPC_USB->HcInterruptStatus;
Yann 0:f30e2135b0db 298 DBG("HcInterruptStatus = %08x\n", int_status);
Yann 0:f30e2135b0db 299 if (int_status & OR_INTR_STATUS_UE) //Unrecoverable error, disconnect devices and resume
Yann 0:f30e2135b0db 300 {
Yann 0:f30e2135b0db 301 onUsbDeviceDisconnected(0, 1);
Yann 0:f30e2135b0db 302 LPC_USB->HcInterruptStatus = OR_INTR_STATUS_UE;
Yann 0:f30e2135b0db 303 LPC_USB->HcCommandStatus = 0x01; //Host Controller Reset
Yann 0:f30e2135b0db 304 }
Yann 0:f30e2135b0db 305 }
Yann 0:f30e2135b0db 306 }
Yann 0:f30e2135b0db 307 LPC_USB->HcInterruptStatus = int_status; /* Clear interrupt status register */
Yann 0:f30e2135b0db 308 }
Yann 0:f30e2135b0db 309 return;
Yann 0:f30e2135b0db 310 }
Yann 0:f30e2135b0db 311
Yann 0:f30e2135b0db 312 void UsbHostMgr::onUsbDeviceConnected(int hub, int port)
Yann 0:f30e2135b0db 313 {
Yann 0:f30e2135b0db 314 int item = devicesCount();
Yann 0:f30e2135b0db 315 if( item == USB_HOSTMGR_MAX_DEVS )
Yann 0:f30e2135b0db 316 return; //List full...
Yann 0:f30e2135b0db 317 //Find a free address (not optimized, but not really important)
Yann 0:f30e2135b0db 318 int i;
Yann 0:f30e2135b0db 319 int addr = 1;
Yann 0:f30e2135b0db 320 for(i = 0; i < item; i++)
Yann 0:f30e2135b0db 321 {
Yann 0:f30e2135b0db 322 addr = MAX( addr, m_lpDevices[i]->m_addr + 1 );
Yann 0:f30e2135b0db 323 }
Yann 0:f30e2135b0db 324 m_lpDevices[item] = new UsbDevice( this, hub, port, addr );
Yann 0:f30e2135b0db 325 m_lpDevices[item]->m_connected = true;
Yann 0:f30e2135b0db 326 }
Yann 0:f30e2135b0db 327
Yann 0:f30e2135b0db 328 void UsbHostMgr::onUsbDeviceDisconnected(int hub, int port)
Yann 0:f30e2135b0db 329 {
Yann 0:f30e2135b0db 330 for(int i = 0; i < devicesCount(); i++)
Yann 0:f30e2135b0db 331 {
Yann 0:f30e2135b0db 332 if( (m_lpDevices[i]->m_hub == hub)
Yann 0:f30e2135b0db 333 && (m_lpDevices[i]->m_port == port) )
Yann 0:f30e2135b0db 334 {
Yann 0:f30e2135b0db 335 m_lpDevices[i]->m_connected = false;
Yann 0:f30e2135b0db 336 if(!m_lpDevices[i]->m_enumerated)
Yann 0:f30e2135b0db 337 {
Yann 0:f30e2135b0db 338 delete m_lpDevices[i];
Yann 0:f30e2135b0db 339 m_lpDevices[i] = NULL;
Yann 0:f30e2135b0db 340 }
Yann 0:f30e2135b0db 341 return;
Yann 0:f30e2135b0db 342 }
Yann 0:f30e2135b0db 343 }
Yann 0:f30e2135b0db 344 }
Yann 0:f30e2135b0db 345
Yann 0:f30e2135b0db 346 void UsbHostMgr::resetPort(int hub, int port)
Yann 0:f30e2135b0db 347 {
Yann 0:f30e2135b0db 348 DBG("Resetting hub %d, port %d\n", hub, port);
Yann 0:f30e2135b0db 349 if(hub == 0) //Root hub
Yann 0:f30e2135b0db 350 {
Yann 0:f30e2135b0db 351 wait_ms(100); /* USB 2.0 spec says at least 50ms delay before port reset */
Yann 0:f30e2135b0db 352 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRS; // Initiate port reset
Yann 0:f30e2135b0db 353 DBG("Before loop\n");
Yann 0:f30e2135b0db 354 while (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRS)
Yann 0:f30e2135b0db 355 ;
Yann 0:f30e2135b0db 356 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC; // ...and clear port reset signal
Yann 0:f30e2135b0db 357 DBG("After loop\n");
Yann 0:f30e2135b0db 358 wait_ms(200); /* Wait for 100 MS after port reset */
Yann 0:f30e2135b0db 359 }
Yann 0:f30e2135b0db 360 else
Yann 0:f30e2135b0db 361 {
Yann 0:f30e2135b0db 362 //TODO: Hubs
Yann 0:f30e2135b0db 363 }
Yann 0:f30e2135b0db 364 DBG("Port reset OK\n");
Yann 0:f30e2135b0db 365 }
Yann 0:f30e2135b0db 366
Yann 0:f30e2135b0db 367 #endif