Y SI / lib_ClockCounter

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lib_ClockCounter.h@2:cc5b11ec50ad, 2019-11-21 (annotated)

Committer:
YSI
Date:
Thu Nov 21 09:25:58 2019 +0000
Revision:
2:cc5b11ec50ad
Parent:
0:d3c997729db1
Child:
3:20dd01b1a1fd
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Who changed what in which revision?

UserRevisionLine numberNew contents of line
YSI 0:d3c997729db1 1 /** Mbed Library Clock Counter
YSI 0:d3c997729db1 2 * Hardware pulse counter with TIMER2 (CAP2.0 or CAP2.1) on Mbed LPC1768
YSI 0:d3c997729db1 3 *
YSI 0:d3c997729db1 4 * Counts signal transitions on p30(CAP2.0) or p29(CAP2.1).
YSI 0:d3c997729db1 5 * Can detecte rising, falling or both signal edge.
YSI 0:d3c997729db1 6 * Return the signal edge count during a periode in seconds.
YSI 0:d3c997729db1 7 * Shannon's theorem say with an input signal frequency up to 48 MHz with 96 MHz CCLK.
YSI 0:d3c997729db1 8 * Only tested with frequencys up to 20 MHz and it work.
YSI 0:d3c997729db1 9 *
YSI 0:d3c997729db1 10 * Example :
YSI 0:d3c997729db1 11 * @code
YSI 0:d3c997729db1 12 * #include "mbed.h"
YSI 0:d3c997729db1 13 * #include "lib_ClockCounter.h"
YSI 0:d3c997729db1 14 *
YSI 0:d3c997729db1 15 * Serial pc(USBTX, USBRX);
YSI 0:d3c997729db1 16 * ClockCounter Frequency;
YSI 0:d3c997729db1 17 *
YSI 0:d3c997729db1 18 * int main()
YSI 0:d3c997729db1 19 * {
YSI 0:d3c997729db1 20 * while(1) pc.printf("Frequency = %d Hz\r\n", Frequency.getCount());
YSI 0:d3c997729db1 21 * }
YSI 0:d3c997729db1 22 * @endcode
YSI 0:d3c997729db1 23 */
YSI 0:d3c997729db1 24
YSI 0:d3c997729db1 25 #ifndef DEF_LIB_CLOCKCOUNTER_H
YSI 0:d3c997729db1 26 #define DEF_LIB_CLOCKCOUNTER_H
YSI 0:d3c997729db1 27
YSI 0:d3c997729db1 28 #include "mbed.h"
YSI 0:d3c997729db1 29 #ifndef TARGET_LPC1768
YSI 0:d3c997729db1 30 #error unsupported target
YSI 0:d3c997729db1 31 #else
YSI 0:d3c997729db1 32
YSI 2:cc5b11ec50ad 33 enum edgeDetection { RISING = 1, FALLING = 2, BOTH = 3 };
YSI 2:cc5b11ec50ad 34
YSI 2:cc5b11ec50ad 35 /** ClockCounter class
YSI 2:cc5b11ec50ad 36 * Counts signal transitions on p30(CAP2.0) or p29(CAP2.1) for LPC1768 target.
YSI 0:d3c997729db1 37 * Can detecte rising, falling or both signal edge.
YSI 0:d3c997729db1 38 * Return the signal edge count during a period in seconds.
YSI 0:d3c997729db1 39 * In theory (Shannon's theorem) input signal frequency can up to 48 MHz with 96 MHz CCLK.
YSI 0:d3c997729db1 40 * But only tested with frequencys up to 20 MHz and it work.
YSI 0:d3c997729db1 41 */
YSI 0:d3c997729db1 42 class ClockCounter
YSI 0:d3c997729db1 43 {
YSI 0:d3c997729db1 44 public:
YSI 0:d3c997729db1 45 /** Create an ClockCounter instance.
YSI 0:d3c997729db1 46 *
YSI 2:cc5b11ec50ad 47 * Configure LPC1768 TIMER2 with capture input PIN_CAP2 and detecte transition EDGE.
YSI 0:d3c997729db1 48 *
YSI 0:d3c997729db1 49 * @param PIN_CAP2 can be p30(CAP2.0) or p29(CAP2.1), default is p30(CAP2.0).
YSI 0:d3c997729db1 50 * @param EDGE can be RISING, FALLING, BOTH, default is RISING.
YSI 0:d3c997729db1 51 */
YSI 0:d3c997729db1 52 ClockCounter(PinName PIN_CAP2 = p30, edgeDetection EDGE = RISING);
YSI 0:d3c997729db1 53
YSI 0:d3c997729db1 54 /** Get the signal transition count during period
YSI 0:d3c997729db1 55 *
YSI 0:d3c997729db1 56 * @param period default is 1.0 second.
YSI 0:d3c997729db1 57 */
YSI 0:d3c997729db1 58 int getCount(float period = 1.0);
YSI 0:d3c997729db1 59 };
YSI 0:d3c997729db1 60 #endif
YSI 0:d3c997729db1 61 #endif