modified 0511
Dependencies: mbed-dev FastPWM3
hw_setup.cpp@65:cb3497b549e9, 24 months ago (annotated)
- Committer:
- WinnieLiu
- Date:
- Fri Aug 19 07:46:05 2022 +0000
- Revision:
- 65:cb3497b549e9
- Parent:
- 60:f009e39e913e
latest code
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
benkatz | 20:bf9ea5125d52 | 1 | |
benkatz | 20:bf9ea5125d52 | 2 | #include "mbed.h" |
benkatz | 20:bf9ea5125d52 | 3 | #include "hw_setup.h" |
benkatz | 20:bf9ea5125d52 | 4 | #include "hw_config.h" |
benkatz | 20:bf9ea5125d52 | 5 | #include "structs.h" |
benkatz | 20:bf9ea5125d52 | 6 | #include "FastPWM.h" |
benkatz | 20:bf9ea5125d52 | 7 | |
benkatz | 20:bf9ea5125d52 | 8 | void Init_PWM(GPIOStruct *gpio){ |
benkatz | 28:8c7e29f719c5 | 9 | |
benkatz | 22:60276ba87ac6 | 10 | RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; // enable the clock to GPIOC |
benkatz | 22:60276ba87ac6 | 11 | RCC->APB1ENR |= 0x00000001; // enable TIM2 clock |
benkatz | 22:60276ba87ac6 | 12 | RCC->APB2ENR |= RCC_APB2ENR_TIM1EN; // enable TIM1 clock |
benkatz | 20:bf9ea5125d52 | 13 | |
benkatz | 22:60276ba87ac6 | 14 | GPIOC->MODER |= (1 << 10); // set pin 5 to be general purpose output for LED |
benkatz | 20:bf9ea5125d52 | 15 | gpio->enable = new DigitalOut(ENABLE_PIN); |
benkatz | 20:bf9ea5125d52 | 16 | gpio->pwm_u = new FastPWM(PIN_U); |
benkatz | 20:bf9ea5125d52 | 17 | gpio->pwm_v = new FastPWM(PIN_V); |
benkatz | 20:bf9ea5125d52 | 18 | gpio->pwm_w = new FastPWM(PIN_W); |
benkatz | 20:bf9ea5125d52 | 19 | |
benkatz | 22:60276ba87ac6 | 20 | |
benkatz | 22:60276ba87ac6 | 21 | |
benkatz | 20:bf9ea5125d52 | 22 | //ISR Setup |
benkatz | 20:bf9ea5125d52 | 23 | |
benkatz | 22:60276ba87ac6 | 24 | NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn); //Enable TIM1 IRQ |
benkatz | 20:bf9ea5125d52 | 25 | |
benkatz | 22:60276ba87ac6 | 26 | TIM1->DIER |= TIM_DIER_UIE; // enable update interrupt |
benkatz | 22:60276ba87ac6 | 27 | TIM1->CR1 = 0x40; // CMS = 10, interrupt only when counting up |
benkatz | 20:bf9ea5125d52 | 28 | TIM1->CR1 |= TIM_CR1_UDIS; |
benkatz | 22:60276ba87ac6 | 29 | TIM1->CR1 |= TIM_CR1_ARPE; // autoreload on, |
benkatz | 22:60276ba87ac6 | 30 | TIM1->RCR |= 0x001; // update event once per up/down count of tim1 |
benkatz | 20:bf9ea5125d52 | 31 | TIM1->EGR |= TIM_EGR_UG; |
benkatz | 20:bf9ea5125d52 | 32 | |
benkatz | 20:bf9ea5125d52 | 33 | //PWM Setup |
benkatz | 20:bf9ea5125d52 | 34 | |
benkatz | 22:60276ba87ac6 | 35 | TIM1->PSC = 0x0; // no prescaler, timer counts up in sync with the peripheral clock |
benkatz | 27:501fee691e0e | 36 | TIM1->ARR = PWM_ARR; // set auto reload, 40 khz |
benkatz | 22:60276ba87ac6 | 37 | TIM1->CCER |= ~(TIM_CCER_CC1NP); // Interupt when low side is on. |
benkatz | 22:60276ba87ac6 | 38 | TIM1->CR1 |= TIM_CR1_CEN; // enable TIM1 |
benkatz | 20:bf9ea5125d52 | 39 | |
benkatz | 20:bf9ea5125d52 | 40 | } |
benkatz | 20:bf9ea5125d52 | 41 | |
benkatz | 20:bf9ea5125d52 | 42 | void Init_ADC(void){ |
benkatz | 37:c0f352d6e8e3 | 43 | // ADC Setup |
benkatz | 37:c0f352d6e8e3 | 44 | RCC->APB2ENR |= RCC_APB2ENR_ADC3EN; // clock for ADC3 |
benkatz | 22:60276ba87ac6 | 45 | RCC->APB2ENR |= RCC_APB2ENR_ADC2EN; // clock for ADC2 |
benkatz | 22:60276ba87ac6 | 46 | RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; // clock for ADC1 |
benkatz | 20:bf9ea5125d52 | 47 | |
benkatz | 37:c0f352d6e8e3 | 48 | RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; // Enable clock for GPIOC |
benkatz | 37:c0f352d6e8e3 | 49 | RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN; // Enable clock for GPIOA |
benkatz | 37:c0f352d6e8e3 | 50 | |
benkatz | 37:c0f352d6e8e3 | 51 | ADC->CCR = 0x00000016; // Regular simultaneous mode only |
benkatz | 22:60276ba87ac6 | 52 | ADC1->CR2 |= ADC_CR2_ADON;//0x00000001; // ADC1 ON |
benkatz | 37:c0f352d6e8e3 | 53 | ADC1->SQR3 = 0x000000A; // use PC_0 as input- ADC1_IN0 |
benkatz | 37:c0f352d6e8e3 | 54 | ADC2->CR2 |= ADC_CR2_ADON;//0x00000001; // ADC2 ON |
benkatz | 37:c0f352d6e8e3 | 55 | ADC2->SQR3 = 0x0000000B; // use PC_1 as input - ADC2_IN11 |
benkatz | 37:c0f352d6e8e3 | 56 | ADC3->CR2 |= ADC_CR2_ADON; // ADC3 ON |
benkatz | 37:c0f352d6e8e3 | 57 | ADC3->SQR3 = 0x00000000; // use PA_0, - ADC3_IN0 |
WinnieLiu | 60:f009e39e913e | 58 | GPIOC->MODER |= 0x0000000f; // Alternate function, PC_0, PC_1 are analog inputs |
benkatz | 37:c0f352d6e8e3 | 59 | GPIOA->MODER |= 0x3; // PA_0 as analog input |
benkatz | 37:c0f352d6e8e3 | 60 | |
benkatz | 37:c0f352d6e8e3 | 61 | ADC1->SMPR1 |= 0x1; // 15 cycles on CH_10, 0b 001 |
benkatz | 37:c0f352d6e8e3 | 62 | ADC2->SMPR1 |= 0x8; // 15 cycles on CH_11, 0b 0001 000 |
benkatz | 37:c0f352d6e8e3 | 63 | ADC3->SMPR2 |= 0x1; // 15 cycles on CH_0, 0b 001; |
benkatz | 37:c0f352d6e8e3 | 64 | |
benkatz | 37:c0f352d6e8e3 | 65 | |
benkatz | 20:bf9ea5125d52 | 66 | |
benkatz | 20:bf9ea5125d52 | 67 | } |
benkatz | 20:bf9ea5125d52 | 68 | |
benkatz | 20:bf9ea5125d52 | 69 | void Init_DAC(void){ |
benkatz | 22:60276ba87ac6 | 70 | RCC->APB1ENR |= 0x20000000; // Enable clock for DAC |
benkatz | 22:60276ba87ac6 | 71 | DAC->CR |= 0x00000001; // DAC control reg, both channels ON |
benkatz | 22:60276ba87ac6 | 72 | GPIOA->MODER |= 0x00000300; // PA04 as analog output |
benkatz | 20:bf9ea5125d52 | 73 | } |
benkatz | 20:bf9ea5125d52 | 74 | |
benkatz | 20:bf9ea5125d52 | 75 | void Init_All_HW(GPIOStruct *gpio){ |
benkatz | 20:bf9ea5125d52 | 76 | Init_PWM(gpio); |
benkatz | 20:bf9ea5125d52 | 77 | Init_ADC(); |
benkatz | 37:c0f352d6e8e3 | 78 | gpio->led = new DigitalOut(LED); |
benkatz | 20:bf9ea5125d52 | 79 | //Init_DAC(); |
benkatz | 20:bf9ea5125d52 | 80 | |
benkatz | 20:bf9ea5125d52 | 81 | } |