Knight KE / Mbed OS Game_Master

游戏王对战板，目前code还是空的

mbed-os/targets/TARGET_STM/pinmap.c@0:9b3d4731edbb, 2018-06-21 (annotated)

Committer:
WFKnight
Date:
Thu Jun 21 13:51:43 2018 +0000
Revision:
0:9b3d4731edbb
UART, RTOS, LED

Who changed what in which revision?

UserRevisionLine numberNew contents of line
WFKnight 0:9b3d4731edbb 1 /* mbed Microcontroller Library
WFKnight 0:9b3d4731edbb 2 *******************************************************************************
WFKnight 0:9b3d4731edbb 3 * Copyright (c) 2017, STMicroelectronics
WFKnight 0:9b3d4731edbb 4 * All rights reserved.
WFKnight 0:9b3d4731edbb 5 *
WFKnight 0:9b3d4731edbb 6 * Redistribution and use in source and binary forms, with or without
WFKnight 0:9b3d4731edbb 7 * modification, are permitted provided that the following conditions are met:
WFKnight 0:9b3d4731edbb 8 *
WFKnight 0:9b3d4731edbb 9 * 1. Redistributions of source code must retain the above copyright notice,
WFKnight 0:9b3d4731edbb 10 * this list of conditions and the following disclaimer.
WFKnight 0:9b3d4731edbb 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
WFKnight 0:9b3d4731edbb 12 * this list of conditions and the following disclaimer in the documentation
WFKnight 0:9b3d4731edbb 13 * and/or other materials provided with the distribution.
WFKnight 0:9b3d4731edbb 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
WFKnight 0:9b3d4731edbb 15 * may be used to endorse or promote products derived from this software
WFKnight 0:9b3d4731edbb 16 * without specific prior written permission.
WFKnight 0:9b3d4731edbb 17 *
WFKnight 0:9b3d4731edbb 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
WFKnight 0:9b3d4731edbb 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
WFKnight 0:9b3d4731edbb 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
WFKnight 0:9b3d4731edbb 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
WFKnight 0:9b3d4731edbb 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
WFKnight 0:9b3d4731edbb 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
WFKnight 0:9b3d4731edbb 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
WFKnight 0:9b3d4731edbb 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
WFKnight 0:9b3d4731edbb 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
WFKnight 0:9b3d4731edbb 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
WFKnight 0:9b3d4731edbb 28 *******************************************************************************
WFKnight 0:9b3d4731edbb 29 */
WFKnight 0:9b3d4731edbb 30 #include "mbed_assert.h"
WFKnight 0:9b3d4731edbb 31 #include "pinmap.h"
WFKnight 0:9b3d4731edbb 32 #include "PortNames.h"
WFKnight 0:9b3d4731edbb 33 #include "mbed_error.h"
WFKnight 0:9b3d4731edbb 34 #include "pin_device.h"
WFKnight 0:9b3d4731edbb 35
WFKnight 0:9b3d4731edbb 36 extern GPIO_TypeDef *Set_GPIO_Clock(uint32_t port_idx);
WFKnight 0:9b3d4731edbb 37
WFKnight 0:9b3d4731edbb 38 const uint32_t ll_pin_defines[16] = {
WFKnight 0:9b3d4731edbb 39 LL_GPIO_PIN_0,
WFKnight 0:9b3d4731edbb 40 LL_GPIO_PIN_1,
WFKnight 0:9b3d4731edbb 41 LL_GPIO_PIN_2,
WFKnight 0:9b3d4731edbb 42 LL_GPIO_PIN_3,
WFKnight 0:9b3d4731edbb 43 LL_GPIO_PIN_4,
WFKnight 0:9b3d4731edbb 44 LL_GPIO_PIN_5,
WFKnight 0:9b3d4731edbb 45 LL_GPIO_PIN_6,
WFKnight 0:9b3d4731edbb 46 LL_GPIO_PIN_7,
WFKnight 0:9b3d4731edbb 47 LL_GPIO_PIN_8,
WFKnight 0:9b3d4731edbb 48 LL_GPIO_PIN_9,
WFKnight 0:9b3d4731edbb 49 LL_GPIO_PIN_10,
WFKnight 0:9b3d4731edbb 50 LL_GPIO_PIN_11,
WFKnight 0:9b3d4731edbb 51 LL_GPIO_PIN_12,
WFKnight 0:9b3d4731edbb 52 LL_GPIO_PIN_13,
WFKnight 0:9b3d4731edbb 53 LL_GPIO_PIN_14,
WFKnight 0:9b3d4731edbb 54 LL_GPIO_PIN_15
WFKnight 0:9b3d4731edbb 55 };
WFKnight 0:9b3d4731edbb 56
WFKnight 0:9b3d4731edbb 57 /**
WFKnight 0:9b3d4731edbb 58 * Configure pin (mode, speed, output type and pull-up/pull-down)
WFKnight 0:9b3d4731edbb 59 */
WFKnight 0:9b3d4731edbb 60 void pin_function(PinName pin, int data)
WFKnight 0:9b3d4731edbb 61 {
WFKnight 0:9b3d4731edbb 62 MBED_ASSERT(pin != (PinName)NC);
WFKnight 0:9b3d4731edbb 63
WFKnight 0:9b3d4731edbb 64 // Get the pin informations
WFKnight 0:9b3d4731edbb 65 uint32_t mode = STM_PIN_FUNCTION(data);
WFKnight 0:9b3d4731edbb 66 uint32_t afnum = STM_PIN_AFNUM(data);
WFKnight 0:9b3d4731edbb 67 uint32_t port = STM_PORT(pin);
WFKnight 0:9b3d4731edbb 68 uint32_t ll_pin = ll_pin_defines[STM_PIN(pin)];
WFKnight 0:9b3d4731edbb 69 uint32_t ll_mode = 0;
WFKnight 0:9b3d4731edbb 70
WFKnight 0:9b3d4731edbb 71 // Enable GPIO clock
WFKnight 0:9b3d4731edbb 72 GPIO_TypeDef *gpio = Set_GPIO_Clock(port);
WFKnight 0:9b3d4731edbb 73
WFKnight 0:9b3d4731edbb 74 /* Set default speed to high.
WFKnight 0:9b3d4731edbb 75 * For most families there are dedicated registers so it is
WFKnight 0:9b3d4731edbb 76 * not so important, register can be set at any time.
WFKnight 0:9b3d4731edbb 77 * But for families like F1, speed only applies to output.
WFKnight 0:9b3d4731edbb 78 */
WFKnight 0:9b3d4731edbb 79 #if defined (TARGET_STM32F1)
WFKnight 0:9b3d4731edbb 80 if (mode == STM_PIN_OUTPUT) {
WFKnight 0:9b3d4731edbb 81 #endif
WFKnight 0:9b3d4731edbb 82 LL_GPIO_SetPinSpeed(gpio, ll_pin, LL_GPIO_SPEED_FREQ_HIGH);
WFKnight 0:9b3d4731edbb 83 #if defined (TARGET_STM32F1)
WFKnight 0:9b3d4731edbb 84 }
WFKnight 0:9b3d4731edbb 85 #endif
WFKnight 0:9b3d4731edbb 86
WFKnight 0:9b3d4731edbb 87 switch (mode) {
WFKnight 0:9b3d4731edbb 88 case STM_PIN_INPUT:
WFKnight 0:9b3d4731edbb 89 ll_mode = LL_GPIO_MODE_INPUT;
WFKnight 0:9b3d4731edbb 90 break;
WFKnight 0:9b3d4731edbb 91 case STM_PIN_OUTPUT:
WFKnight 0:9b3d4731edbb 92 ll_mode = LL_GPIO_MODE_OUTPUT;
WFKnight 0:9b3d4731edbb 93 break;
WFKnight 0:9b3d4731edbb 94 case STM_PIN_ALTERNATE:
WFKnight 0:9b3d4731edbb 95 ll_mode = LL_GPIO_MODE_ALTERNATE;
WFKnight 0:9b3d4731edbb 96 // In case of ALT function, also set he afnum
WFKnight 0:9b3d4731edbb 97 stm_pin_SetAFPin(gpio, pin, afnum);
WFKnight 0:9b3d4731edbb 98 break;
WFKnight 0:9b3d4731edbb 99 case STM_PIN_ANALOG:
WFKnight 0:9b3d4731edbb 100 ll_mode = LL_GPIO_MODE_ANALOG;
WFKnight 0:9b3d4731edbb 101 break;
WFKnight 0:9b3d4731edbb 102 default:
WFKnight 0:9b3d4731edbb 103 MBED_ASSERT(0);
WFKnight 0:9b3d4731edbb 104 break;
WFKnight 0:9b3d4731edbb 105 }
WFKnight 0:9b3d4731edbb 106 LL_GPIO_SetPinMode(gpio, ll_pin, ll_mode);
WFKnight 0:9b3d4731edbb 107
WFKnight 0:9b3d4731edbb 108 #if defined(GPIO_ASCR_ASC0)
WFKnight 0:9b3d4731edbb 109 /* For families where Analog Control ASC0 register is present */
WFKnight 0:9b3d4731edbb 110 if (STM_PIN_ANALOG_CONTROL(data)) {
WFKnight 0:9b3d4731edbb 111 LL_GPIO_EnablePinAnalogControl(gpio, ll_pin);
WFKnight 0:9b3d4731edbb 112 } else {
WFKnight 0:9b3d4731edbb 113 LL_GPIO_DisablePinAnalogControl(gpio, ll_pin);
WFKnight 0:9b3d4731edbb 114 }
WFKnight 0:9b3d4731edbb 115 #endif
WFKnight 0:9b3d4731edbb 116
WFKnight 0:9b3d4731edbb 117 /* For now by default use Speed HIGH for output or alt modes */
WFKnight 0:9b3d4731edbb 118 if ((mode == STM_PIN_OUTPUT) ||(mode == STM_PIN_ALTERNATE)) {
WFKnight 0:9b3d4731edbb 119 if (STM_PIN_OD(data)) {
WFKnight 0:9b3d4731edbb 120 LL_GPIO_SetPinOutputType(gpio, ll_pin, LL_GPIO_OUTPUT_OPENDRAIN);
WFKnight 0:9b3d4731edbb 121 } else {
WFKnight 0:9b3d4731edbb 122 LL_GPIO_SetPinOutputType(gpio, ll_pin, LL_GPIO_OUTPUT_PUSHPULL);
WFKnight 0:9b3d4731edbb 123 }
WFKnight 0:9b3d4731edbb 124 }
WFKnight 0:9b3d4731edbb 125
WFKnight 0:9b3d4731edbb 126 stm_pin_PullConfig(gpio, ll_pin, STM_PIN_PUPD(data));
WFKnight 0:9b3d4731edbb 127
WFKnight 0:9b3d4731edbb 128 stm_pin_DisconnectDebug(pin);
WFKnight 0:9b3d4731edbb 129 }
WFKnight 0:9b3d4731edbb 130
WFKnight 0:9b3d4731edbb 131 /**
WFKnight 0:9b3d4731edbb 132 * Configure pin pull-up/pull-down
WFKnight 0:9b3d4731edbb 133 */
WFKnight 0:9b3d4731edbb 134 void pin_mode(PinName pin, PinMode mode)
WFKnight 0:9b3d4731edbb 135 {
WFKnight 0:9b3d4731edbb 136 MBED_ASSERT(pin != (PinName)NC);
WFKnight 0:9b3d4731edbb 137
WFKnight 0:9b3d4731edbb 138 uint32_t port_index = STM_PORT(pin);
WFKnight 0:9b3d4731edbb 139 uint32_t ll_pin = ll_pin_defines[STM_PIN(pin)];
WFKnight 0:9b3d4731edbb 140 // Enable GPIO clock
WFKnight 0:9b3d4731edbb 141 GPIO_TypeDef *gpio = Set_GPIO_Clock(port_index);
WFKnight 0:9b3d4731edbb 142 uint32_t function = LL_GPIO_GetPinMode(gpio, ll_pin);
WFKnight 0:9b3d4731edbb 143
WFKnight 0:9b3d4731edbb 144 if ((function == LL_GPIO_MODE_OUTPUT) || (function == LL_GPIO_MODE_ALTERNATE))
WFKnight 0:9b3d4731edbb 145 {
WFKnight 0:9b3d4731edbb 146 if ((mode == OpenDrainNoPull) || (mode == OpenDrainPullUp) || (mode == OpenDrainPullDown)) {
WFKnight 0:9b3d4731edbb 147 LL_GPIO_SetPinOutputType(gpio, ll_pin, LL_GPIO_OUTPUT_OPENDRAIN);
WFKnight 0:9b3d4731edbb 148 } else {
WFKnight 0:9b3d4731edbb 149 LL_GPIO_SetPinOutputType(gpio, ll_pin, LL_GPIO_OUTPUT_PUSHPULL);
WFKnight 0:9b3d4731edbb 150 }
WFKnight 0:9b3d4731edbb 151 }
WFKnight 0:9b3d4731edbb 152
WFKnight 0:9b3d4731edbb 153 if ((mode == OpenDrainPullUp) || (mode == PullUp)) {
WFKnight 0:9b3d4731edbb 154 stm_pin_PullConfig(gpio, ll_pin, GPIO_PULLUP);
WFKnight 0:9b3d4731edbb 155 } else if ((mode == OpenDrainPullDown) || (mode == PullDown)) {
WFKnight 0:9b3d4731edbb 156 stm_pin_PullConfig(gpio, ll_pin, GPIO_PULLDOWN);
WFKnight 0:9b3d4731edbb 157 } else {
WFKnight 0:9b3d4731edbb 158 stm_pin_PullConfig(gpio, ll_pin, GPIO_NOPULL);
WFKnight 0:9b3d4731edbb 159 }
WFKnight 0:9b3d4731edbb 160 }