Vybhav Kadaba
Minor changes to support ADMW FWv1.17.75
Diff: inc/admw1001/ADMW1001_REGISTERS_typedefs.h
- Revision:
- 8:2f2775c34640
- Parent:
- 6:9d393a9677f4
- Child:
- 18:cbf514cce921
--- a/inc/admw1001/ADMW1001_REGISTERS_typedefs.h Tue Jun 18 09:28:16 2019 +0000
+++ b/inc/admw1001/ADMW1001_REGISTERS_typedefs.h Thu Jun 20 18:13:57 2019 +0000
@@ -4,7 +4,7 @@
File : ADMW1001_REGISTERS_typedefs.h
Description : C Register Structures
- Date : Apr 30, 2019
+ Date : Jun 19, 2019
Copyright (c) 2019 Analog Devices, Inc. All Rights Reserved.
This software is proprietary and confidential to Analog Devices, Inc. and
@@ -47,7 +47,7 @@
*! \struct ADMW_SPI_Interface_Config_A_Struct
*! \brief Interface Configuration A Register bit field structure
* ========================================================================== */
-typedef struct SPI_Interface_Config_A_t {
+typedef struct _ADMW_SPI_Interface_Config_A_t {
union {
struct {
uint8_t SW_ResetX : 1; /**< Second of Two of SW_RESET Bits. */
@@ -83,7 +83,7 @@
*! \struct ADMW_SPI_Interface_Config_B_Struct
*! \brief Interface Configuration B Register bit field structure
* ========================================================================== */
-typedef struct SPI_Interface_Config_B_t {
+typedef struct _ADMW_SPI_Interface_Config_B_t {
union {
struct {
uint8_t reserved0 : 7;
@@ -115,7 +115,7 @@
*! \struct ADMW_SPI_Device_Config_Struct
*! \brief Device Configuration Register bit field structure
* ========================================================================== */
-typedef struct SPI_Device_Config_t {
+typedef struct _ADMW_SPI_Device_Config_t {
union {
struct {
uint8_t Operating_Modes : 2; /**< Power Modes */
@@ -136,7 +136,7 @@
*! \struct ADMW_SPI_Chip_Type_Struct
*! \brief Chip Type Register bit field structure
* ========================================================================== */
-typedef struct SPI_Chip_Type_t {
+typedef struct _ADMW_SPI_Chip_Type_t {
union {
struct {
uint8_t Chip_Type : 4; /**< Precision ADC */
@@ -157,7 +157,7 @@
*! \struct ADMW_SPI_Product_ID_L_Struct
*! \brief Product ID Low Register bit field structure
* ========================================================================== */
-typedef struct SPI_Product_ID_L_t {
+typedef struct _ADMW_SPI_Product_ID_L_t {
union {
struct {
uint8_t Product_ID : 8; /**< Product_ID[7:0] This is Device Chip Type/Family */
@@ -177,7 +177,7 @@
*! \struct ADMW_SPI_Product_ID_H_Struct
*! \brief Product ID High Register bit field structure
* ========================================================================== */
-typedef struct SPI_Product_ID_H_t {
+typedef struct _ADMW_SPI_Product_ID_H_t {
union {
struct {
uint8_t Product_ID : 8; /**< Product_ID[15:8] This is Device Chip Type/Family */
@@ -197,7 +197,7 @@
*! \struct ADMW_SPI_Chip_Grade_Struct
*! \brief Chip Grade Register bit field structure
* ========================================================================== */
-typedef struct SPI_Chip_Grade_t {
+typedef struct _ADMW_SPI_Chip_Grade_t {
union {
struct {
uint8_t Device_Revision : 4; /**< This is the Device Hardware Revision */
@@ -218,7 +218,7 @@
*! \struct ADMW_SPI_Scratch_Pad_Struct
*! \brief Scratch Pad Register bit field structure
* ========================================================================== */
-typedef struct SPI_Scratch_Pad_t {
+typedef struct _ADMW_SPI_Scratch_Pad_t {
union {
struct {
uint8_t Scratch_Value : 8; /**< Software Scratchpad */
@@ -259,7 +259,7 @@
*! \struct ADMW_SPI_SPI_Revision_Struct
*! \brief SPI Revision Register bit field structure
* ========================================================================== */
-typedef struct SPI_SPI_Revision_t {
+typedef struct _ADMW_SPI_SPI_Revision_t {
union {
struct {
uint8_t Version : 6; /**< SPI Version */
@@ -280,7 +280,7 @@
*! \struct ADMW_SPI_Vendor_L_Struct
*! \brief Vendor ID Low Register bit field structure
* ========================================================================== */
-typedef struct SPI_Vendor_L_t {
+typedef struct _ADMW_SPI_Vendor_L_t {
union {
struct {
uint8_t VID : 8; /**< VID[7:0] Analog Devices Vendor ID */
@@ -300,7 +300,7 @@
*! \struct ADMW_SPI_Vendor_H_Struct
*! \brief Vendor ID High Register bit field structure
* ========================================================================== */
-typedef struct SPI_Vendor_H_t {
+typedef struct _ADMW_SPI_Vendor_H_t {
union {
struct {
uint8_t VID : 8; /**< VID[15:8] Analog Devices Vendor ID */
@@ -320,7 +320,7 @@
*! \struct ADMW_SPI_Stream_Mode_Struct
*! \brief Stream Mode Register bit field structure
* ========================================================================== */
-typedef struct SPI_Stream_Mode_t {
+typedef struct _ADMW_SPI_Stream_Mode_t {
union {
struct {
uint8_t Loop_Count : 8; /**< Sets the Data Byte Count Before Looping to Start Address */
@@ -351,7 +351,7 @@
*! \struct ADMW_SPI_Transfer_Config_Struct
*! \brief Transfer Config Register bit field structure
* ========================================================================== */
-typedef struct SPI_Transfer_Config_t {
+typedef struct _ADMW_SPI_Transfer_Config_t {
union {
struct {
uint8_t reserved0 : 1;
@@ -395,7 +395,7 @@
*! \struct ADMW_SPI_Interface_Config_C_Struct
*! \brief Interface Configuration C Register bit field structure
* ========================================================================== */
-typedef struct SPI_Interface_Config_C_t {
+typedef struct _ADMW_SPI_Interface_Config_C_t {
union {
struct {
uint8_t CRC_EnableB : 2; /**< Inverted CRC Enable */
@@ -419,7 +419,7 @@
*! \struct ADMW_SPI_Interface_Status_A_Struct
*! \brief Interface Status A Register bit field structure
* ========================================================================== */
-typedef struct SPI_Interface_Status_A_t {
+typedef struct _ADMW_SPI_Interface_Status_A_t {
union {
struct {
uint8_t Address_Invalid_Error : 1; /**< Attempt to Read/Write Non-existent Register Address */
@@ -442,36 +442,35 @@
*/
/* =========================================================================
- *! \enum CORE_Command_Special_Command
+ *! \enum ADMW_CORE_Command_Special_Command
*! \brief Special Command (Special_Command) Enumerations
* ========================================================================= */
typedef enum
{
- CORE_COMMAND_NOP = 0, /**< No Command */
- CORE_COMMAND_CONVERT = 1, /**< Start ADC Conversions */
- CORE_COMMAND_CONVERT_WITH_RAW = 2, /**< Start Conversions with Added RAW ADC Data */
- CORE_COMMAND_LATCH_CONFIG = 7, /**< Latch Configuration. */
- CORE_COMMAND_LOAD_LUT = 8, /**< Load LUT from FLASH */
- CORE_COMMAND_SAVE_LUT = 9, /**< Save LUT to FLASH */
- CORE_COMMAND_POWER_DOWN = 20, /**< Enter Low Power State */
- CORE_COMMAND_LOAD_CONFIG_1 = 24, /**< Load Registers with Configuration#1 from FLASH */
- CORE_COMMAND_SAVE_CONFIG_1 = 25, /**< Store Current Registers to FLASH Configuration#1 */
- CORE_COMMAND_CALIBRATE_DIGITAL = 32 /**< Performs a Calibration of Digital Sensor, if Supported & Enabled. */
-} CORE_Command_Special_Command;
+ CORE_COMMAND_NOP = 0, /**< No Command */
+ CORE_COMMAND_CONVERT = 1, /**< Start ADC Conversions */
+ CORE_COMMAND_CONVERT_WITH_RAW = 2, /**< Start Conversions with Added RAW ADC Data */
+ CORE_COMMAND_LATCH_CONFIG = 7, /**< Latch Configuration. */
+ CORE_COMMAND_LOAD_LUT = 8, /**< Load LUT from FLASH */
+ CORE_COMMAND_SAVE_LUT = 9, /**< Save LUT to FLASH */
+ CORE_COMMAND_POWER_DOWN = 20, /**< Enter Low Power State */
+ CORE_COMMAND_LOAD_CONFIG_1 = 24, /**< Load Registers with Configuration#1 from FLASH */
+ CORE_COMMAND_SAVE_CONFIG_1 = 25 /**< Store Current Registers to FLASH Configuration#1 */
+} ADMW_CORE_Command_Special_Command;
/* ==========================================================================
- *! \struct CORE_Command_Struct
+ *! \struct ADMW_CORE_Command_Struct
*! \brief Special Command Register bit field structure
* ========================================================================== */
-typedef struct CORE_Command_t {
+typedef struct _ADMW_CORE_Command_t {
union {
struct {
uint8_t Special_Command : 8; /**< Special Command */
};
uint8_t VALUE8;
};
-} CORE_Command_t;
+} ADMW_CORE_Command_t;
/*@}*/
@@ -481,34 +480,32 @@
*/
/* =========================================================================
- *! \enum CORE_Mode_Conversion_Mode
+ *! \enum ADMW_CORE_Mode_Conversion_Mode
*! \brief Conversion Mode (Conversion_Mode) Enumerations
* ========================================================================= */
typedef enum
{
CORE_MODE_SINGLECYCLE = 0, /**< Single Cycle */
- CORE_MODE_MULTICYCLE = 1, /**< Multi Cycle */
CORE_MODE_CONTINUOUS = 2 /**< Continuous Conversion */
-} CORE_Mode_Conversion_Mode;
+} ADMW_CORE_Mode_Conversion_Mode;
/* =========================================================================
- *! \enum CORE_Mode_Drdy_Mode
+ *! \enum ADMW_CORE_Mode_Drdy_Mode
*! \brief Indicates Behavior of DRDY with Respect to FIFO State (Drdy_Mode) Enumerations
* ========================================================================= */
typedef enum
{
- CORE_MODE_DRDY_PER_CONVERSION = 0, /**< Data Ready Per Conversion */
- CORE_MODE_DRDY_PER_CYCLE = 1, /**< Data Ready Per Cycle */
- CORE_MODE_DRDY_PER_FIFO_FILL = 2 /**< Data Ready Per FIFO Fill / Multi-Cycle Burst */
-} CORE_Mode_Drdy_Mode;
+ CORE_MODE_DRDY_PER_CONVERSION = 0, /**< Data Ready Per Conversion */
+ CORE_MODE_DRDY_PER_CYCLE = 1 /**< Data Ready Per Cycle */
+} ADMW_CORE_Mode_Drdy_Mode;
/* ==========================================================================
- *! \struct CORE_Mode_Struct
+ *! \struct ADMW_CORE_Mode_Struct
*! \brief Operating Mode and DRDY Control Register bit field structure
* ========================================================================== */
-typedef struct CORE_Mode_t {
+typedef struct _ADMW_CORE_Mode_t {
union {
struct {
uint8_t Conversion_Mode : 2; /**< Conversion Mode */
@@ -517,7 +514,7 @@
};
uint8_t VALUE8;
};
-} CORE_Mode_t;
+} ADMW_CORE_Mode_t;
/*@}*/
@@ -527,21 +524,21 @@
*/
/* =========================================================================
- *! \enum CORE_Power_Config_Power_Mode_MCU
+ *! \enum ADMW_CORE_Power_Config_Power_Mode_MCU
*! \brief MCU Power Mode (Power_Mode_MCU) Enumerations
* ========================================================================= */
typedef enum
{
CORE_POWER_CONFIG_ACTIVE_MODE = 0, /**< Part is fully powered up and either cycling through a sequence or awaiting a configuration */
CORE_POWER_CONFIG_HIBERNATION = 1 /**< module has entede hibernation mode. All analog circuitry is disabled. All peripherals disabled apart from the Wake-up pin functionality. */
-} CORE_Power_Config_Power_Mode_MCU;
+} ADMW_CORE_Power_Config_Power_Mode_MCU;
/* ==========================================================================
- *! \struct CORE_Power_Config_Struct
+ *! \struct ADMW_CORE_Power_Config_Struct
*! \brief General Configuration Register bit field structure
* ========================================================================== */
-typedef struct CORE_Power_Config_t {
+typedef struct _ADMW_CORE_Power_Config_t {
union {
struct {
uint8_t Power_Mode_MCU : 1; /**< MCU Power Mode */
@@ -549,7 +546,7 @@
};
uint8_t VALUE8;
};
-} CORE_Power_Config_t;
+} ADMW_CORE_Power_Config_t;
/*@}*/
@@ -559,72 +556,53 @@
*/
/* =========================================================================
- *! \enum CORE_Cycle_Control_Cycle_Time_Units
+ *! \enum ADMW_CORE_Cycle_Control_Cycle_Type
+ *! \brief Type of Measurement Cycle (Cycle_Type) Enumerations
+ * ========================================================================= */
+typedef enum
+{
+ CORE_CYCLE_CONTROL_SWITCH = 0, /**< Switch Channels After Every Conversion */
+ CORE_CYCLE_CONTROL_FULL = 1 /**< Perform Full Number Of Conversions On A Channel Consecutively */
+} ADMW_CORE_Cycle_Control_Cycle_Type;
+
+
+/* =========================================================================
+ *! \enum ADMW_CORE_Cycle_Control_Vbias
+ *! \brief Voltage Bias Global Enable (Vbias) Enumerations
+ * ========================================================================= */
+typedef enum
+{
+ CORE_CYCLE_CONTROL_VBIAS_DISABLE = 0, /**< Vbias Disabled */
+ CORE_CYCLE_CONTROL_VBIAS_ENABLE = 1 /**< Enable Vbias Output For the Duration of a Cycle */
+} ADMW_CORE_Cycle_Control_Vbias;
+
+
+/* =========================================================================
+ *! \enum ADMW_CORE_Cycle_Control_Cycle_Time_Units
*! \brief Units for Cycle Time (Cycle_Time_Units) Enumerations
* ========================================================================= */
typedef enum
{
- CORE_CYCLE_CONTROL_MICROSECONDS = 0, /**< Micro-Seconds */
- CORE_CYCLE_CONTROL_MILLISECONDS = 1, /**< Milli-Seconds */
- CORE_CYCLE_CONTROL_SECONDS = 2 /**< Seconds */
-} CORE_Cycle_Control_Cycle_Time_Units;
+ CORE_CYCLE_CONTROL_MILLISECONDS = 0, /**< Milli-Seconds */
+ CORE_CYCLE_CONTROL_SECONDS = 1 /**< Seconds */
+} ADMW_CORE_Cycle_Control_Cycle_Time_Units;
/* ==========================================================================
- *! \struct CORE_Cycle_Control_Struct
+ *! \struct ADMW_CORE_Cycle_Control_Struct
*! \brief Measurement Cycle Register bit field structure
* ========================================================================== */
-typedef struct CORE_Cycle_Control_t {
+typedef struct _ADMW_CORE_Cycle_Control_t {
union {
struct {
uint16_t Cycle_Time : 12; /**< Duration of a Full Measurement Cycle */
- uint16_t reserved12 : 2;
+ uint16_t Cycle_Type : 1; /**< Type of Measurement Cycle */
+ uint16_t Vbias : 1; /**< Voltage Bias Global Enable */
uint16_t Cycle_Time_Units : 2; /**< Units for Cycle Time */
};
uint16_t VALUE16;
};
-} CORE_Cycle_Control_t;
-
-/*@}*/
-
-/** @defgroup Fifo_Num_Cycles Number of Measurement Cycles to Store in FIFO (Fifo_Num_Cycles) Register
- * Number of Measurement Cycles to Store in FIFO (Fifo_Num_Cycles) Register.
- * @{
- */
-
-/* ==========================================================================
- *! \struct CORE_Fifo_Num_Cycles_Struct
- *! \brief Number of Measurement Cycles to Store in FIFO Register bit field structure
- * ========================================================================== */
-typedef struct CORE_Fifo_Num_Cycles_t {
- union {
- struct {
- uint8_t Fifo_Num_Cycles : 8; /**< How Many Cycles to Fill FIFO */
- };
- uint8_t VALUE8;
- };
-} CORE_Fifo_Num_Cycles_t;
-
-/*@}*/
-
-/** @defgroup Multi_Cycle_Repeat_Interval Time Between Repeats of Multi-Cycle Conversions.... (Multi_Cycle_Repeat_Interval) Register
- * Time Between Repeats of Multi-Cycle Conversions.... (Multi_Cycle_Repeat_Interval) Register.
- * @{
- */
-
-/* ==========================================================================
- *! \struct CORE_Multi_Cycle_Repeat_Interval_Struct
- *! \brief Time Between Repeats of Multi-Cycle Conversions.... Register bit field structure
- * ========================================================================== */
-typedef struct CORE_Multi_Cycle_Repeat_Interval_t {
- union {
- struct {
- uint32_t Multi_Cycle_Repeat_Interval : 24; /**< Defines Time Between Repetitions of Measurement Cycles. */
- uint32_t reserved24 : 8;
- };
- uint32_t VALUE32;
- };
-} CORE_Multi_Cycle_Repeat_Interval_t;
+} ADMW_CORE_Cycle_Control_t;
/*@}*/
@@ -634,10 +612,10 @@
*/
/* ==========================================================================
- *! \struct CORE_Status_Struct
+ *! \struct ADMW_CORE_Status_Struct
*! \brief General Status Register bit field structure
* ========================================================================== */
-typedef struct CORE_Status_t {
+typedef struct _ADMW_CORE_Status_t {
union {
struct {
uint8_t reserved0 : 1;
@@ -650,7 +628,7 @@
};
uint8_t VALUE8;
};
-} CORE_Status_t;
+} ADMW_CORE_Status_t;
/*@}*/
@@ -660,10 +638,10 @@
*/
/* ==========================================================================
- *! \struct CORE_Diagnostics_Status_Struct
+ *! \struct ADMW_CORE_Diagnostics_Status_Struct
*! \brief Diagnostics Status Register bit field structure
* ========================================================================== */
-typedef struct CORE_Diagnostics_Status_t {
+typedef struct _ADMW_CORE_Diagnostics_Status_t {
union {
struct {
uint16_t Diag_Checksum_Error : 1; /**< Indicates Error on Internal Checksum Calculations */
@@ -678,7 +656,7 @@
};
uint16_t VALUE16;
};
-} CORE_Diagnostics_Status_t;
+} ADMW_CORE_Diagnostics_Status_t;
/*@}*/
@@ -688,10 +666,10 @@
*/
/* ==========================================================================
- *! \struct CORE_Channel_Alert_Status_Struct
+ *! \struct ADMW_CORE_Channel_Alert_Status_Struct
*! \brief Alert Status Summary Register bit field structure
* ========================================================================== */
-typedef struct CORE_Channel_Alert_Status_t {
+typedef struct _ADMW_CORE_Channel_Alert_Status_t {
union {
struct {
uint16_t Alert_Ch0 : 1; /**< Indicates Channel Alert is Active */
@@ -710,7 +688,7 @@
};
uint16_t VALUE16;
};
-} CORE_Channel_Alert_Status_t;
+} ADMW_CORE_Channel_Alert_Status_t;
/*@}*/
@@ -720,10 +698,10 @@
*/
/* ==========================================================================
- *! \struct CORE_Alert_Status_2_Struct
+ *! \struct ADMW_CORE_Alert_Status_2_Struct
*! \brief Additional Alert Status Information Register bit field structure
* ========================================================================== */
-typedef struct CORE_Alert_Status_2_t {
+typedef struct _ADMW_CORE_Alert_Status_2_t {
union {
struct {
uint16_t reserved0 : 1;
@@ -733,7 +711,7 @@
};
uint16_t VALUE16;
};
-} CORE_Alert_Status_2_t;
+} ADMW_CORE_Alert_Status_2_t;
/*@}*/
@@ -743,10 +721,10 @@
*/
/* ==========================================================================
- *! \struct CORE_Alert_Detail_Ch_Struct
+ *! \struct ADMW_CORE_Alert_Detail_Ch_Struct
*! \brief Detailed Error Information Register bit field structure
* ========================================================================== */
-typedef struct CORE_Alert_Detail_Ch_t {
+typedef struct _ADMW_CORE_Alert_Detail_Ch_t {
union {
struct {
uint16_t Time_Out : 1; /**< Indicates Time-Out Error from Digital Sensor */
@@ -768,7 +746,7 @@
};
uint16_t VALUE16;
};
-} CORE_Alert_Detail_Ch_t;
+} ADMW_CORE_Alert_Detail_Ch_t;
/*@}*/
@@ -778,17 +756,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Error_Code_Struct
+ *! \struct ADMW_CORE_Error_Code_Struct
*! \brief Code Indicating Source of Error Register bit field structure
* ========================================================================== */
-typedef struct CORE_Error_Code_t {
+typedef struct _ADMW_CORE_Error_Code_t {
union {
struct {
uint16_t Error_Code : 16; /**< Code Indicating Type of Error */
};
uint16_t VALUE16;
};
-} CORE_Error_Code_t;
+} ADMW_CORE_Error_Code_t;
/*@}*/
@@ -798,17 +776,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Alert_Code_Struct
+ *! \struct ADMW_CORE_Alert_Code_Struct
*! \brief Code Indicating Source of Alert Register bit field structure
* ========================================================================== */
-typedef struct CORE_Alert_Code_t {
+typedef struct _ADMW_CORE_Alert_Code_t {
union {
struct {
uint16_t Alert_Code : 16; /**< Code Indicating Type of Alert */
};
uint16_t VALUE16;
};
-} CORE_Alert_Code_t;
+} ADMW_CORE_Alert_Code_t;
/*@}*/
@@ -818,17 +796,17 @@
*/
/* ==========================================================================
- *! \struct CORE_External_Reference_Resistor_Struct
+ *! \struct ADMW_CORE_External_Reference_Resistor_Struct
*! \brief External Reference Information Register bit field structure
* ========================================================================== */
-typedef struct CORE_External_Reference_Resistor_t {
+typedef struct _ADMW_CORE_External_Reference_Resistor_t {
union {
struct {
float Ext_Refin1_Value; /**< Refin1 Value */
};
float VALUE32;
};
-} CORE_External_Reference_Resistor_t;
+} ADMW_CORE_External_Reference_Resistor_t;
/*@}*/
@@ -838,17 +816,17 @@
*/
/* ==========================================================================
- *! \struct CORE_External_Voltage_Reference_Struct
+ *! \struct ADMW_CORE_External_Voltage_Reference_Struct
*! \brief External Reference Information Register bit field structure
* ========================================================================== */
-typedef struct CORE_External_Voltage_Reference_t {
+typedef struct _ADMW_CORE_External_Voltage_Reference_t {
union {
struct {
float Ext_Refin2_Value; /**< Refin2 Value */
};
float VALUE32;
};
-} CORE_External_Voltage_Reference_t;
+} ADMW_CORE_External_Voltage_Reference_t;
/*@}*/
@@ -858,7 +836,7 @@
*/
/* =========================================================================
- *! \enum CORE_Diagnostics_Control_Diag_OSD_Freq
+ *! \enum ADMW_CORE_Diagnostics_Control_Diag_OSD_Freq
*! \brief Diagnostics Open Sensor Detect Frequency (Diag_OSD_Freq) Enumerations
* ========================================================================= */
typedef enum
@@ -867,14 +845,14 @@
CORE_DIAGNOSTICS_CONTROL_OCD_PER_1_CYCLE = 1, /**< Open-Circuit Detection Performed Once Per Measurement Cycle */
CORE_DIAGNOSTICS_CONTROL_OCD_PER_100_CYCLES = 2, /**< Open-Circuit Detection Performed Once Per Hundred Measurement Cycles */
CORE_DIAGNOSTICS_CONTROL_OCD_PER_1000_CYCLES = 3 /**< Open-Circuit Detection Performed Once Per Thousand Measurement Cycles */
-} CORE_Diagnostics_Control_Diag_OSD_Freq;
+} ADMW_CORE_Diagnostics_Control_Diag_OSD_Freq;
/* ==========================================================================
- *! \struct CORE_Diagnostics_Control_Struct
+ *! \struct ADMW_CORE_Diagnostics_Control_Struct
*! \brief Diagnostic Control Register bit field structure
* ========================================================================== */
-typedef struct CORE_Diagnostics_Control_t {
+typedef struct _ADMW_CORE_Diagnostics_Control_t {
union {
struct {
uint16_t Diag_Global_En : 1; /**< Diagnostics Global Enable */
@@ -884,7 +862,7 @@
};
uint16_t VALUE16;
};
-} CORE_Diagnostics_Control_t;
+} ADMW_CORE_Diagnostics_Control_t;
/*@}*/
@@ -894,17 +872,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Data_FIFO_Struct
+ *! \struct ADMW_CORE_Data_FIFO_Struct
*! \brief FIFO Buffer of Sensor Results Register bit field structure
* ========================================================================== */
-typedef struct CORE_Data_FIFO_t {
+typedef struct _ADMW_CORE_Data_FIFO_t {
union {
struct {
uint8_t Data_Fifo : 8; /**< Fifo Buffer of Sensor Results */
};
uint8_t VALUE8;
};
-} CORE_Data_FIFO_t;
+} ADMW_CORE_Data_FIFO_t;
/*@}*/
@@ -914,17 +892,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Debug_Code_Struct
+ *! \struct ADMW_CORE_Debug_Code_Struct
*! \brief Additional Information on Source of Alert or Errors Register bit field structure
* ========================================================================== */
-typedef struct CORE_Debug_Code_t {
+typedef struct _ADMW_CORE_Debug_Code_t {
union {
struct {
uint32_t Debug_Code : 32; /**< Additional Information on Source of Alert or Errors */
};
uint32_t VALUE32;
};
-} CORE_Debug_Code_t;
+} ADMW_CORE_Debug_Code_t;
/*@}*/
@@ -934,17 +912,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Advanced_Sensor_Access_Struct
+ *! \struct ADMW_CORE_Advanced_Sensor_Access_Struct
*! \brief Enables Access to Advanced Sensor Configuration Register bit field structure
* ========================================================================== */
-typedef struct CORE_Advanced_Sensor_Access_t {
+typedef struct _ADMW_CORE_Advanced_Sensor_Access_t {
union {
struct {
uint16_t Advanced_Sensor_Access : 16; /**< Write Specific Key Value to Access Advanced Sensors */
};
uint16_t VALUE16;
};
-} CORE_Advanced_Sensor_Access_t;
+} ADMW_CORE_Advanced_Sensor_Access_t;
/*@}*/
@@ -954,21 +932,21 @@
*/
/* =========================================================================
- *! \enum CORE_LUT_Select_LUT_RW
+ *! \enum ADMW_CORE_LUT_Select_LUT_RW
*! \brief Read or Write LUT Data (LUT_RW) Enumerations
* ========================================================================= */
typedef enum
{
CORE_LUT_SELECT_LUT_READ = 0, /**< Read Addressed LUT Data */
CORE_LUT_SELECT_LUT_WRITE = 1 /**< Write Addressed LUT Data */
-} CORE_LUT_Select_LUT_RW;
+} ADMW_CORE_LUT_Select_LUT_RW;
/* ==========================================================================
- *! \struct CORE_LUT_Select_Struct
+ *! \struct ADMW_CORE_LUT_Select_Struct
*! \brief Read/Write Strobe Register bit field structure
* ========================================================================== */
-typedef struct CORE_LUT_Select_t {
+typedef struct _ADMW_CORE_LUT_Select_t {
union {
struct {
uint8_t reserved0 : 7;
@@ -976,7 +954,7 @@
};
uint8_t VALUE8;
};
-} CORE_LUT_Select_t;
+} ADMW_CORE_LUT_Select_t;
/*@}*/
@@ -986,10 +964,10 @@
*/
/* ==========================================================================
- *! \struct CORE_LUT_Offset_Struct
+ *! \struct ADMW_CORE_LUT_Offset_Struct
*! \brief Offset into Selected LUT Register bit field structure
* ========================================================================== */
-typedef struct CORE_LUT_Offset_t {
+typedef struct _ADMW_CORE_LUT_Offset_t {
union {
struct {
uint16_t LUT_Offset : 14; /**< Offset into Look-Up-Table */
@@ -997,7 +975,7 @@
};
uint16_t VALUE16;
};
-} CORE_LUT_Offset_t;
+} ADMW_CORE_LUT_Offset_t;
/*@}*/
@@ -1007,17 +985,17 @@
*/
/* ==========================================================================
- *! \struct CORE_LUT_Data_Struct
+ *! \struct ADMW_CORE_LUT_Data_Struct
*! \brief Data to Read/Write from Addressed LUT Entry Register bit field structure
* ========================================================================== */
-typedef struct CORE_LUT_Data_t {
+typedef struct _ADMW_CORE_LUT_Data_t {
union {
struct {
uint8_t LUT_Data : 8; /**< Data Byte to Write to / Read from Look-Up-Table */
};
uint8_t VALUE8;
};
-} CORE_LUT_Data_t;
+} ADMW_CORE_LUT_Data_t;
/*@}*/
@@ -1027,10 +1005,10 @@
*/
/* ==========================================================================
- *! \struct CORE_Revision_Struct
+ *! \struct ADMW_CORE_Revision_Struct
*! \brief Hardware, Firmware Revision Register bit field structure
* ========================================================================== */
-typedef struct CORE_Revision_t {
+typedef struct _ADMW_CORE_Revision_t {
union {
struct {
uint32_t Rev_Patch : 16; /**< Patch Revision Information */
@@ -1039,7 +1017,7 @@
};
uint32_t VALUE32;
};
-} CORE_Revision_t;
+} ADMW_CORE_Revision_t;
/*@}*/
@@ -1049,10 +1027,10 @@
*/
/* ==========================================================================
- *! \struct CORE_Channel_Count_Struct
+ *! \struct ADMW_CORE_Channel_Count_Struct
*! \brief Number of Channel Occurrences per Measurement Cycle Register bit field structure
* ========================================================================== */
-typedef struct CORE_Channel_Count_t {
+typedef struct _ADMW_CORE_Channel_Count_t {
union {
struct {
uint8_t Channel_Count : 7; /**< How Many Times Channel Should Appear in One Cycle */
@@ -1060,7 +1038,7 @@
};
uint8_t VALUE8;
};
-} CORE_Channel_Count_t;
+} ADMW_CORE_Channel_Count_t;
/*@}*/
@@ -1070,10 +1048,10 @@
*/
/* ==========================================================================
- *! \struct CORE_Channel_Options_Struct
+ *! \struct ADMW_CORE_Channel_Options_Struct
*! \brief Position of Channel Within Sequence and Enable for FFT Register bit field structure
* ========================================================================== */
-typedef struct CORE_Channel_Options_t {
+typedef struct _ADMW_CORE_Channel_Options_t {
union {
struct {
uint8_t Channel_Priority : 4; /**< Indicates Priority or Position of This Channel in Sequence */
@@ -1081,7 +1059,7 @@
};
uint8_t VALUE8;
};
-} CORE_Channel_Options_t;
+} ADMW_CORE_Channel_Options_t;
/*@}*/
@@ -1091,7 +1069,7 @@
*/
/* =========================================================================
- *! \enum CORE_Sensor_Type_Sensor_Type
+ *! \enum ADMW_CORE_Sensor_Type_Sensor_Type
*! \brief Sensor Type (Sensor_Type) Enumerations
* ========================================================================= */
typedef enum
@@ -1125,14 +1103,14 @@
CORE_SENSOR_TYPE_SPI_ACCELEROMETER_A = 3200, /**< SPI Accelerometer Sensor A 3-Axis Defined Level 1 */
CORE_SENSOR_TYPE_SPI_ACCELEROMETER_B = 3201, /**< SPI Accelerometer Sensor B 3-Axis Defined Level 1 */
CORE_SENSOR_TYPE_CO2_A_DEF = 3584 /**< CO2 Sensor A Defined Level 1 */
-} CORE_Sensor_Type_Sensor_Type;
+} ADMW_CORE_Sensor_Type_Sensor_Type;
/* ==========================================================================
- *! \struct CORE_Sensor_Type_Struct
+ *! \struct ADMW_CORE_Sensor_Type_Struct
*! \brief Sensor Select Register bit field structure
* ========================================================================== */
-typedef struct CORE_Sensor_Type_t {
+typedef struct _ADMW_CORE_Sensor_Type_t {
union {
struct {
uint16_t Sensor_Type : 12; /**< Sensor Type */
@@ -1140,7 +1118,7 @@
};
uint16_t VALUE16;
};
-} CORE_Sensor_Type_t;
+} ADMW_CORE_Sensor_Type_t;
/*@}*/
@@ -1150,7 +1128,7 @@
*/
/* =========================================================================
- *! \enum CORE_Sensor_Details_Measurement_Units
+ *! \enum ADMW_CORE_Sensor_Details_Measurement_Units
*! \brief Units of Sensor Measurement (Measurement_Units) Enumerations
* ========================================================================= */
typedef enum
@@ -1159,7 +1137,8 @@
CORE_SENSOR_DETAILS_UNITS_RESERVED = 1, /**< Reserved */
CORE_SENSOR_DETAILS_UNITS_DEGC = 2, /**< Degrees C */
CORE_SENSOR_DETAILS_UNITS_DEGF = 3 /**< Degrees F */
-} CORE_Sensor_Details_Measurement_Units;
+} ADMW_CORE_Sensor_Details_Measurement_Units;
+
/* =========================================================================
*! \enum ADMW_CORE_Sensor_Details_LUT_Select
@@ -1171,27 +1150,25 @@
CORE_SENSOR_DETAILS_LUT_UNITY = 1, /**< Unity Lookup Table. 1:1 Mapping From Input to Output */
CORE_SENSOR_DETAILS_LUT_CUSTOM = 2, /**< User Defined Custom Lookup Table. */
CORE_SENSOR_DETAILS_LUT_RESERVED = 3 /**< Reserved */
-} CORE_Sensor_Details_LUT_Select;
+} ADMW_CORE_Sensor_Details_LUT_Select;
/* =========================================================================
-
-/* =========================================================================
- *! \enum CORE_Sensor_Details_Reference_Select
+ *! \enum ADMW_CORE_Sensor_Details_Reference_Select
*! \brief Reference Selection (Reference_Select) Enumerations
* ========================================================================= */
typedef enum
{
- CORE_SENSOR_DETAILS_REF_INT = 0, /**< Internal Reference */
- CORE_SENSOR_DETAILS_REF_AVDD = 1, /**< AVDD */
- CORE_SENSOR_DETAILS_REF_VEXT1 = 2, /**< External Voltage on Refin1 */
- CORE_SENSOR_DETAILS_REF_REXT1 = 6, /**< External Resistor on RSENSE+ and RSENSE- */
- CORE_SENSOR_DETAILS_REF_EXC = 8 /**< Bridge Excitation Voltage from VREF+ and VREF- */
-} CORE_Sensor_Details_Reference_Select;
+ CORE_SENSOR_DETAILS_REF_VINT = 0, /**< Internal voltage reference (1.2V) */
+ CORE_SENSOR_DETAILS_REF_VEXT1 = 1, /**< External Voltage reference applied to VERF+ and VREF- */
+ CORE_SENSOR_DETAILS_REF_VRESERVED = 2, /**< ExReserved for future use. */
+ CORE_SENSOR_DETAILS_REF_AVDD = 3, /**< AVDD Supply Used as Excitation and Internally applied as Reference */
+ CORE_SENSOR_DETAILS_REF_NUM /**< Number of reference options. */
+} ADMW_CORE_Sensor_Details_Reference_Select;
/* =========================================================================
- *! \enum CORE_Sensor_Details_PGA_Gain
+ *! \enum ADMW_CORE_Sensor_Details_PGA_Gain
*! \brief PGA Gain (PGA_Gain) Enumerations
* ========================================================================= */
typedef enum
@@ -1204,11 +1181,11 @@
CORE_SENSOR_DETAILS_PGA_GAIN_32 = 5, /**< Gain of 32 */
CORE_SENSOR_DETAILS_PGA_GAIN_64 = 6, /**< Gain of 64 */
CORE_SENSOR_DETAILS_PGA_GAIN_128 = 7 /**< Gain of 128 */
-} CORE_Sensor_Details_PGA_Gain;
+} ADMW_CORE_Sensor_Details_PGA_Gain;
/* =========================================================================
- *! \enum CORE_Sensor_Details_RTD_Curve
+ *! \enum ADMW_CORE_Sensor_Details_RTD_Curve
*! \brief Select RTD Curve for Linearisation (RTD_Curve) Enumerations
* ========================================================================= */
typedef enum
@@ -1217,23 +1194,22 @@
CORE_SENSOR_DETAILS_AMERICAN_CURVE = 1, /**< American Curve */
CORE_SENSOR_DETAILS_JAPANESE_CURVE = 2, /**< Japanese Curve */
CORE_SENSOR_DETAILS_ITS90_CURVE = 3 /**< ITS-90 Curve */
-} CORE_Sensor_Details_RTD_Curve;
+} ADMW_CORE_Sensor_Details_RTD_Curve;
/* ==========================================================================
- *! \struct CORE_Sensor_Details_Struct
+ *! \struct ADMW_CORE_Sensor_Details_Struct
*! \brief Sensor Details Register bit field structure
* ========================================================================== */
-typedef struct CORE_Sensor_Details_t {
+typedef struct _ADMW_CORE_Sensor_Details_t {
union {
struct {
uint32_t Measurement_Units : 4; /**< Units of Sensor Measurement */
uint32_t Compensation_Channel : 4; /**< Indicates Which Channel is Used to Compensate Sensor Result */
- uint32_t reserved8 : 8;
- uint32_t Unity_LUT_Select : 1; /**< Selects Unity Transfer Function Instead of Sensor Default */
+ uint32_t reserved8 : 7;
+ uint32_t LUT_Select : 2; /**< Lookup Table Select */
uint32_t Do_Not_Publish : 1; /**< Do Not Publish Channel Result */
- uint32_t reserved18 : 1;
- uint32_t Vbias : 1; /**< Controls ADC Vbias Output */
+ uint32_t reserved18 : 2;
uint32_t Reference_Select : 4; /**< Reference Selection */
uint32_t PGA_Gain : 3; /**< PGA Gain */
uint32_t RTD_Curve : 2; /**< Select RTD Curve for Linearisation */
@@ -1242,7 +1218,7 @@
};
uint32_t VALUE32;
};
-} CORE_Sensor_Details_t;
+} ADMW_CORE_Sensor_Details_t;
/*@}*/
@@ -1252,25 +1228,25 @@
*/
/* =========================================================================
- *! \enum CORE_Channel_Excitation_IOUT_Excitation_Current
+ *! \enum ADMW_CORE_Channel_Excitation_IOUT_Excitation_Current
*! \brief Current Source Value (IOUT_Excitation_Current) Enumerations
* ========================================================================= */
typedef enum
{
- CORE_CHANNEL_EXCITATION_EXTERNAL = 0, /**< External Current Sourced */
- CORE_CHANNEL_EXCITATION_RESERVED = 1, /**< Reserved */
- CORE_CHANNEL_EXCITATION_IEXC_10UA = 2, /**< 10 \mu;A */
- CORE_CHANNEL_EXCITATION_RESERVED2 = 3, /**< Reserved */
- CORE_CHANNEL_EXCITATION_IEXC_50UA = 4, /**< 50 \mu;A */
- CORE_CHANNEL_EXCITATION_IEXC_100UA = 5, /**< 100 \mu;A */
- CORE_CHANNEL_EXCITATION_IEXC_250UA = 6, /**< 250 \mu;A */
- CORE_CHANNEL_EXCITATION_IEXC_500UA = 7, /**< 500 \mu;A */
- CORE_CHANNEL_EXCITATION_IEXC_1000UA = 8 /**< 1000 \mu;A */
-} CORE_Channel_Excitation_IOUT_Excitation_Current;
+ CORE_CHANNEL_EXCITATION_EXTERNAL = 0, /**< External Current Sourced */
+ CORE_CHANNEL_EXCITATION_RESERVED = 1, /**< Reserved */
+ CORE_CHANNEL_EXCITATION_IEXC_10UA = 2, /**< 10 \mu;A */
+ CORE_CHANNEL_EXCITATION_RESERVED2 = 3, /**< Reserved */
+ CORE_CHANNEL_EXCITATION_IEXC_50UA = 4, /**< 50 \mu;A */
+ CORE_CHANNEL_EXCITATION_IEXC_100UA = 5, /**< 100 \mu;A */
+ CORE_CHANNEL_EXCITATION_IEXC_250UA = 6, /**< 250 \mu;A */
+ CORE_CHANNEL_EXCITATION_IEXC_500UA = 7, /**< 500 \mu;A */
+ CORE_CHANNEL_EXCITATION_IEXC_1000UA = 8 /**< 1000 \mu;A */
+} ADMW_CORE_Channel_Excitation_IOUT_Excitation_Current;
/* =========================================================================
- *! \enum CORE_Channel_Excitation_IOUT_Diode_Ratio
+ *! \enum ADMW_CORE_Channel_Excitation_IOUT_Diode_Ratio
*! \brief Modify Current Ratios Used for Diode Sensor (IOUT_Diode_Ratio) Enumerations
* ========================================================================= */
typedef enum
@@ -1283,14 +1259,14 @@
CORE_CHANNEL_EXCITATION_DIODE_3PT_20UA_100UA_160UA = 5, /**< 3 current measuremet 20uA 100uA 160uA */
CORE_CHANNEL_EXCITATION_DIODE_3PT_50UA_150UA_300UA = 6, /**< 3 current measuremet 50uA 150uA 300uA */
CORE_CHANNEL_EXCITATION_DIODE_3PT_100UA_300UA_600UA = 7 /**< 3 current measuremet 100uA 300uA 600uA */
-} CORE_Channel_Excitation_IOUT_Diode_Ratio;
+} ADMW_CORE_Channel_Excitation_IOUT_Diode_Ratio;
/* ==========================================================================
- *! \struct CORE_Channel_Excitation_Struct
+ *! \struct ADMW_CORE_Channel_Excitation_Struct
*! \brief Excitation Current Register bit field structure
* ========================================================================== */
-typedef struct CORE_Channel_Excitation_t {
+typedef struct _ADMW_CORE_Channel_Excitation_t {
union {
struct {
uint16_t IOUT_Excitation_Current : 4; /**< Current Source Value */
@@ -1300,7 +1276,7 @@
};
uint16_t VALUE16;
};
-} CORE_Channel_Excitation_t;
+} ADMW_CORE_Channel_Excitation_t;
/*@}*/
@@ -1310,7 +1286,7 @@
*/
/* =========================================================================
- *! \enum CORE_Settling_Time_Settling_Time_Units
+ *! \enum ADMW_CORE_Settling_Time_Settling_Time_Units
*! \brief Units for Settling Time (Settling_Time_Units) Enumerations
* ========================================================================= */
typedef enum
@@ -1318,14 +1294,14 @@
CORE_SETTLING_TIME_MICROSECONDS = 0, /**< Micro-Seconds */
CORE_SETTLING_TIME_MILLISECONDS = 1, /**< Milli-Seconds */
CORE_SETTLING_TIME_SECONDS = 2 /**< Seconds */
-} CORE_Settling_Time_Settling_Time_Units;
+} ADMW_CORE_Settling_Time_Settling_Time_Units;
/* ==========================================================================
- *! \struct CORE_Settling_Time_Struct
+ *! \struct ADMW_CORE_Settling_Time_Struct
*! \brief Settling Time Register bit field structure
* ========================================================================== */
-typedef struct CORE_Settling_Time_t {
+typedef struct _ADMW_CORE_Settling_Time_t {
union {
struct {
uint16_t Settling_Time : 14; /**< Settling Time to Allow When Switching to Channel */
@@ -1333,7 +1309,7 @@
};
uint16_t VALUE16;
};
-} CORE_Settling_Time_t;
+} ADMW_CORE_Settling_Time_t;
/*@}*/
@@ -1343,65 +1319,89 @@
*/
/* =========================================================================
- *! \enum CORE_Measurement_Setup_Custom_Calibration
+ *! \enum ADMW_CORE_Measurement_Setup_Custom_Calibration
*! \brief Enables Custom Calibration for Selected Sensor (Custom_Calibration) Enumerations
* ========================================================================= */
typedef enum
{
CORE_MEASUREMENT_SETUP_INTERNAL_CALIBRATION = 0, /**< */
CORE_MEASUREMENT_SETUP_CUSTOM_CALIBRATION = 1 /**< */
-} CORE_Measurement_Setup_Custom_Calibration;
+} ADMW_CORE_Measurement_Setup_Custom_Calibration;
/* =========================================================================
- *! \enum CORE_Measurement_Setup_NOTCH_EN_2
+ *! \enum ADMW_CORE_Measurement_Setup_NOTCH_EN_2
*! \brief Enable Notch 2 Filter Mode (NOTCH_EN_2) Enumerations
* ========================================================================= */
typedef enum
{
CORE_MEASUREMENT_SETUP_NOTCH_DIS = 0, /**< Disable Notch Filter */
CORE_MEASUREMENT_SETUP_NOTCH_EN = 1 /**< Enable Notch 2 Filter option. Places a addtional notch at 1.2X ODR. Can be used for 50 and 60Hz rejection simultaneously */
-} CORE_Measurement_Setup_NOTCH_EN_2;
+} ADMW_CORE_Measurement_Setup_NOTCH_EN_2;
/* =========================================================================
- *! \enum CORE_Measurement_Setup_Chop_Mode
+ *! \enum ADMW_CORE_Measurement_Setup_PST_MEAS_EXC_CTRL
+ *! \brief Disabled Current Sources After Measurement Has Been Complete (PST_MEAS_EXC_CTRL) Enumerations
+ * ========================================================================= */
+typedef enum
+{
+ CORE_MEASUREMENT_SETUP_POWERCYCLE = 0, /**< */
+ CORE_MEASUREMENT_SETUP_ALWAYSON = 1 /**< */
+} ADMW_CORE_Measurement_Setup_PST_MEAS_EXC_CTRL;
+
+
+/* =========================================================================
+ *! \enum ADMW_CORE_Measurement_Setup_Chop_Mode
*! \brief Enabled and Disable Chop Mode (Chop_Mode) Enumerations
* ========================================================================= */
typedef enum
{
CORE_MEASUREMENT_SETUP_DISABLE_CHOP = 0, /**< Chop Mode Disabled */
- CORE_MEASUREMENT_SETUP_ENABLE_CHOP = 2 /**< Chop Mode Enabled */
-} CORE_Measurement_Setup_Chop_Mode;
+ CORE_MEASUREMENT_SETUP_HW_CHOP = 1, /**< Chop Mode Enabled */
+ CORE_MEASUREMENT_SETUP_ENABLE_CHOP = 2, /**< Chop Mode Enabled */
+ CORE_MEASUREMENT_SETUP_HW_SW_CHOP = 3 /**< Chop Mode Enabled */
+} ADMW_CORE_Measurement_Setup_Chop_Mode;
/* =========================================================================
- *! \enum CORE_Measurement_Setup_ADC_Filter_Type
+ *! \enum ADMW_CORE_Measurement_Setup_ADC_Filter_Type
*! \brief ADC Digital Filter Type (ADC_Filter_Type) Enumerations
* ========================================================================= */
typedef enum
{
CORE_MEASUREMENT_SETUP_ENABLE_SINC4 = 0, /**< Enabled SINC4 Filter */
CORE_MEASUREMENT_SETUP_ENABLE_SINC3 = 1 /**< Enabled SINC3 Filter */
-} CORE_Measurement_Setup_ADC_Filter_Type;
+} ADMW_CORE_Measurement_Setup_ADC_Filter_Type;
/* =========================================================================
- *! \enum CORE_Measurement_Setup_GND_SW
+ *! \enum ADMW_CORE_Measurement_Setup_GND_SW
*! \brief GND_SW (GND_SW) Enumerations
* ========================================================================= */
typedef enum
{
CORE_MEASUREMENT_SETUP_GND_SW_OPEN = 0, /**< GND_SW Open. The GND SW is not enabled for the sensor measurement */
CORE_MEASUREMENT_SETUP_GND_SW_CLOSED = 1 /**< GND_SW Closed. The GND SW is enabled for the sensor measurement, bit wiil Remain Closed After the Measurement */
-} CORE_Measurement_Setup_GND_SW;
+} ADMW_CORE_Measurement_Setup_GND_SW;
+
+
+/* =========================================================================
+ *! \enum ADMW_CORE_Measurement_Setup_Buffer_Bypass
+ *! \brief Disable Buffers (Buffer_Bypass) Enumerations
+ * ========================================================================= */
+typedef enum
+{
+ CORE_MEASUREMENT_SETUP_BUFFERS_ENABLED = 0, /**< */
+ CORE_MEASUREMENT_SETUP_BUFFERS_DISABLED = 1 /**< */
+} ADMW_CORE_Measurement_Setup_Buffer_Bypass;
/* ==========================================================================
- *! \struct CORE_Measurement_Setup_Struct
+ *! \struct ADMW_CORE_Measurement_Setup_Struct
*! \brief ADC Digital Filter Selection Register bit field structure
* ========================================================================== */
-typedef struct CORE_Measurement_Setup_t {
+typedef struct _ADMW_CORE_Measurement_Setup_t {
union {
struct {
uint32_t ADC_SF : 7; /**< ADC Digital Filter Select */
@@ -1411,11 +1411,12 @@
uint32_t Chop_Mode : 2; /**< Enabled and Disable Chop Mode */
uint32_t ADC_Filter_Type : 1; /**< ADC Digital Filter Type */
uint32_t GND_SW : 2; /**< GND_SW */
- uint32_t reserved15 : 17;
+ uint32_t Buffer_Bypass : 1; /**< Disable Buffers */
+ uint32_t reserved16 : 16;
};
uint32_t VALUE32;
};
-} CORE_Measurement_Setup_t;
+} ADMW_CORE_Measurement_Setup_t;
/*@}*/
@@ -1425,17 +1426,17 @@
*/
/* ==========================================================================
- *! \struct CORE_High_Threshold_Limit_Struct
+ *! \struct ADMW_CORE_High_Threshold_Limit_Struct
*! \brief High Threshold Register bit field structure
* ========================================================================== */
-typedef struct CORE_High_Threshold_Limit_t {
+typedef struct _ADMW_CORE_High_Threshold_Limit_t {
union {
struct {
float High_Threshold; /**< Upper Limit for Sensor Alert Comparison */
};
float VALUE32;
};
-} CORE_High_Threshold_Limit_t;
+} ADMW_CORE_High_Threshold_Limit_t;
/*@}*/
@@ -1445,17 +1446,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Low_Threshold_Limit_Struct
+ *! \struct ADMW_CORE_Low_Threshold_Limit_Struct
*! \brief Low Threshold Register bit field structure
* ========================================================================== */
-typedef struct CORE_Low_Threshold_Limit_t {
+typedef struct _ADMW_CORE_Low_Threshold_Limit_t {
union {
struct {
float Low_Threshold; /**< Lower Limit for Sensor Alert Comparison */
};
float VALUE32;
};
-} CORE_Low_Threshold_Limit_t;
+} ADMW_CORE_Low_Threshold_Limit_t;
/*@}*/
@@ -1465,17 +1466,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Sensor_Offset_Struct
+ *! \struct ADMW_CORE_Sensor_Offset_Struct
*! \brief Sensor Offset Adjustment Register bit field structure
* ========================================================================== */
-typedef struct CORE_Sensor_Offset_t {
+typedef struct _ADMW_CORE_Sensor_Offset_t {
union {
struct {
float Sensor_Offset; /**< Sensor Offset Adjustment */
};
float VALUE32;
};
-} CORE_Sensor_Offset_t;
+} ADMW_CORE_Sensor_Offset_t;
/*@}*/
@@ -1485,17 +1486,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Sensor_Gain_Struct
+ *! \struct ADMW_CORE_Sensor_Gain_Struct
*! \brief Sensor Gain Adjustment Register bit field structure
* ========================================================================== */
-typedef struct CORE_Sensor_Gain_t {
+typedef struct _ADMW_CORE_Sensor_Gain_t {
union {
struct {
float Sensor_Gain; /**< Sensor Gain Adjustment */
};
float VALUE32;
};
-} CORE_Sensor_Gain_t;
+} ADMW_CORE_Sensor_Gain_t;
/*@}*/
@@ -1505,17 +1506,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Alert_Code_Ch_Struct
+ *! \struct ADMW_CORE_Alert_Code_Ch_Struct
*! \brief Per-Channel Detailed Alert-Code Information Register bit field structure
* ========================================================================== */
-typedef struct CORE_Alert_Code_Ch_t {
+typedef struct _ADMW_CORE_Alert_Code_Ch_t {
union {
struct {
uint16_t Alert_Code_Ch : 16; /**< Per-Channel Code Indicating Type of Alert */
};
uint16_t VALUE16;
};
-} CORE_Alert_Code_Ch_t;
+} ADMW_CORE_Alert_Code_Ch_t;
/*@}*/
@@ -1525,10 +1526,10 @@
*/
/* ==========================================================================
- *! \struct CORE_Channel_Skip_Struct
+ *! \struct ADMW_CORE_Channel_Skip_Struct
*! \brief Indicates If Channel Will Skip Some Measurement Cycles Register bit field structure
* ========================================================================== */
-typedef struct CORE_Channel_Skip_t {
+typedef struct _ADMW_CORE_Channel_Skip_t {
union {
struct {
uint16_t Channel_Skip : 8; /**< Indicates If Channel Will Skip Some Measurement Cycles */
@@ -1536,7 +1537,7 @@
};
uint16_t VALUE16;
};
-} CORE_Channel_Skip_t;
+} ADMW_CORE_Channel_Skip_t;
/*@}*/
@@ -1546,17 +1547,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Sensor_Parameter_Struct
+ *! \struct ADMW_CORE_Sensor_Parameter_Struct
*! \brief Sensor Parameter Adjustment Register bit field structure
* ========================================================================== */
-typedef struct CORE_Sensor_Parameter_t {
+typedef struct _ADMW_CORE_Sensor_Parameter_t {
union {
struct {
float Sensor_Parameter; /**< Sensor Parameter Adjustment */
};
float VALUE32;
};
-} CORE_Sensor_Parameter_t;
+} ADMW_CORE_Sensor_Parameter_t;
/*@}*/
@@ -1566,10 +1567,10 @@
*/
/* ==========================================================================
- *! \struct CORE_Calibration_Parameter_Struct
+ *! \struct ADMW_CORE_Calibration_Parameter_Struct
*! \brief Calibration Parameter Value Register bit field structure
* ========================================================================== */
-typedef struct CORE_Calibration_Parameter_t {
+typedef struct _ADMW_CORE_Calibration_Parameter_t {
union {
struct {
uint32_t Calibration_Parameter : 24; /**< Calibration Parameter Value */
@@ -1578,7 +1579,7 @@
};
uint32_t VALUE32;
};
-} CORE_Calibration_Parameter_t;
+} ADMW_CORE_Calibration_Parameter_t;
/*@}*/
@@ -1588,7 +1589,7 @@
*/
/* =========================================================================
- *! \enum CORE_Digital_Sensor_Config_Digital_Sensor_Coding
+ *! \enum ADMW_CORE_Digital_Sensor_Config_Digital_Sensor_Coding
*! \brief Data Encoding of Sensor Result (Digital_Sensor_Coding) Enumerations
* ========================================================================= */
typedef enum
@@ -1597,14 +1598,14 @@
CORE_DIGITAL_SENSOR_CONFIG_CODING_UNIPOLAR = 1, /**< Unipolar */
CORE_DIGITAL_SENSOR_CONFIG_CODING_TWOS_COMPL = 2, /**< Twos Complement */
CORE_DIGITAL_SENSOR_CONFIG_CODING_OFFSET_BINARY = 3 /**< Offset Binary */
-} CORE_Digital_Sensor_Config_Digital_Sensor_Coding;
+} ADMW_CORE_Digital_Sensor_Config_Digital_Sensor_Coding;
/* ==========================================================================
- *! \struct CORE_Digital_Sensor_Config_Struct
+ *! \struct ADMW_CORE_Digital_Sensor_Config_Struct
*! \brief Digital Sensor Data Coding Register bit field structure
* ========================================================================== */
-typedef struct CORE_Digital_Sensor_Config_t {
+typedef struct _ADMW_CORE_Digital_Sensor_Config_t {
union {
struct {
uint16_t Digital_Sensor_Coding : 2; /**< Data Encoding of Sensor Result */
@@ -1616,7 +1617,7 @@
};
uint16_t VALUE16;
};
-} CORE_Digital_Sensor_Config_t;
+} ADMW_CORE_Digital_Sensor_Config_t;
/*@}*/
@@ -1626,17 +1627,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Digital_Sensor_Address_Struct
+ *! \struct ADMW_CORE_Digital_Sensor_Address_Struct
*! \brief Sensor Address Register bit field structure
* ========================================================================== */
-typedef struct CORE_Digital_Sensor_Address_t {
+typedef struct _ADMW_CORE_Digital_Sensor_Address_t {
union {
struct {
uint8_t Digital_Sensor_Address : 8; /**< I2C Address or Write Address Command for SPI Sensor */
};
uint8_t VALUE8;
};
-} CORE_Digital_Sensor_Address_t;
+} ADMW_CORE_Digital_Sensor_Address_t;
/*@}*/
@@ -1646,10 +1647,10 @@
*/
/* ==========================================================================
- *! \struct CORE_Digital_Sensor_Num_Cmds_Struct
+ *! \struct ADMW_CORE_Digital_Sensor_Num_Cmds_Struct
*! \brief Number of Configuration, Read Commands for Digital Sensors Register bit field structure
* ========================================================================== */
-typedef struct CORE_Digital_Sensor_Num_Cmds_t {
+typedef struct _ADMW_CORE_Digital_Sensor_Num_Cmds_t {
union {
struct {
uint8_t Digital_Sensor_Num_Cfg_Cmds : 3; /**< Number of Configuration Commands for Digital Sensor */
@@ -1659,7 +1660,7 @@
};
uint8_t VALUE8;
};
-} CORE_Digital_Sensor_Num_Cmds_t;
+} ADMW_CORE_Digital_Sensor_Num_Cmds_t;
/*@}*/
@@ -1669,43 +1670,43 @@
*/
/* =========================================================================
- *! \enum CORE_Digital_Sensor_Comms_Digital_Sensor_Comms_En
+ *! \enum ADMW_CORE_Digital_Sensor_Comms_Digital_Sensor_Comms_En
*! \brief Enable Digital Sensor Comms Register Parameters (Digital_Sensor_Comms_En) Enumerations
* ========================================================================= */
typedef enum
{
CORE_DIGITAL_SENSOR_COMMS_DIGITAL_COMMS_DEFAULT = 0, /**< Default Parameters Used for Digital Sensor Communications */
CORE_DIGITAL_SENSOR_COMMS_DIGITAL_COMMS_USER = 1 /**< User Supplied Parameters Used for Digital Sensor Communications */
-} CORE_Digital_Sensor_Comms_Digital_Sensor_Comms_En;
+} ADMW_CORE_Digital_Sensor_Comms_Digital_Sensor_Comms_En;
/* =========================================================================
- *! \enum CORE_Digital_Sensor_Comms_SPI_Clock
+ *! \enum ADMW_CORE_Digital_Sensor_Comms_SPI_Clock
*! \brief Controls Clock Frequency for SPI Sensors (SPI_Clock) Enumerations
* ========================================================================= */
typedef enum
{
- CORE_DIGITAL_SENSOR_COMMS_SPI_13MHZ = 0, /**< 13 MHz */
- CORE_DIGITAL_SENSOR_COMMS_SPI_6_5MHZ = 1, /**< 6.5 MHz */
- CORE_DIGITAL_SENSOR_COMMS_SPI_3_25MHZ = 2, /**< 3.25 MHz */
- CORE_DIGITAL_SENSOR_COMMS_SPI_1_625MHZ = 3, /**< 1.625 MHz */
- CORE_DIGITAL_SENSOR_COMMS_SPI_812KHZ = 4, /**< 812.5kHz */
- CORE_DIGITAL_SENSOR_COMMS_SPI_406KHZ = 5, /**< 406.2kHz */
- CORE_DIGITAL_SENSOR_COMMS_SPI_203KHZ = 6, /**< 203.1kHz */
- CORE_DIGITAL_SENSOR_COMMS_SPI_101KHZ = 7, /**< 101.5kHz */
- CORE_DIGITAL_SENSOR_COMMS_SPI_50KHZ = 8, /**< 50.8kHz */
- CORE_DIGITAL_SENSOR_COMMS_SPI_25KHZ = 9, /**< 25.4kHz */
- CORE_DIGITAL_SENSOR_COMMS_SPI_12KHZ = 10, /**< 12.7kHz */
- CORE_DIGITAL_SENSOR_COMMS_SPI_6KHZ = 11, /**< 6.3kHz */
- CORE_DIGITAL_SENSOR_COMMS_SPI_3KHZ = 12, /**< 3.2kHz */
- CORE_DIGITAL_SENSOR_COMMS_SPI_1_5KHZ = 13, /**< 1.58kHz */
- CORE_DIGITAL_SENSOR_COMMS_SPI_793HZ = 14, /**< 793Hz */
- CORE_DIGITAL_SENSOR_COMMS_SPI_396HZ = 15 /**< 396Hz */
-} CORE_Digital_Sensor_Comms_SPI_Clock;
+ CORE_DIGITAL_SENSOR_COMMS_SPI_8MHZ = 0, /**< 8MHz */
+ CORE_DIGITAL_SENSOR_COMMS_SPI_4MHZ = 1, /**< 4MHz */
+ CORE_DIGITAL_SENSOR_COMMS_SPI_2MHZ = 2, /**< 2MHz */
+ CORE_DIGITAL_SENSOR_COMMS_SPI_1MHZ = 3, /**< 1MHz */
+ CORE_DIGITAL_SENSOR_COMMS_SPI_500KHZ = 4, /**< 500kHz */
+ CORE_DIGITAL_SENSOR_COMMS_SPI_250KHZ = 5, /**< 250kHz */
+ CORE_DIGITAL_SENSOR_COMMS_SPI_125KHZ = 6, /**< 125kHz */
+ CORE_DIGITAL_SENSOR_COMMS_SPI_62P5KHZ = 7, /**< 62.5kHz */
+ CORE_DIGITAL_SENSOR_COMMS_SPI_31P3KHZ = 8, /**< 31.25kHz */
+ CORE_DIGITAL_SENSOR_COMMS_SPI_15P6KHZ = 9, /**< 15.625kHz */
+ CORE_DIGITAL_SENSOR_COMMS_SPI_7P8KHZ = 10, /**< 7.8kHz */
+ CORE_DIGITAL_SENSOR_COMMS_SPI_3P9KHZ = 11, /**< 3.9kHz */
+ CORE_DIGITAL_SENSOR_COMMS_SPI_1P9KHZ = 12, /**< 1.95kHz */
+ CORE_DIGITAL_SENSOR_COMMS_SPI_977HZ = 13, /**< 977Hz */
+ CORE_DIGITAL_SENSOR_COMMS_SPI_488HZ = 14, /**< 488Hz */
+ CORE_DIGITAL_SENSOR_COMMS_SPI_244HZ = 15 /**< 244Hz */
+} ADMW_CORE_Digital_Sensor_Comms_SPI_Clock;
/* =========================================================================
- *! \enum CORE_Digital_Sensor_Comms_I2C_Clock
+ *! \enum ADMW_CORE_Digital_Sensor_Comms_I2C_Clock
*! \brief Controls SCLK Frequency for I2C Sensors (I2C_Clock) Enumerations
* ========================================================================= */
typedef enum
@@ -1714,11 +1715,11 @@
CORE_DIGITAL_SENSOR_COMMS_I2C_400K = 1, /**< 400kHz SCL */
CORE_DIGITAL_SENSOR_COMMS_I2C_RESERVED1 = 2, /**< Reserved */
CORE_DIGITAL_SENSOR_COMMS_I2C_RESERVED2 = 3 /**< Reserved */
-} CORE_Digital_Sensor_Comms_I2C_Clock;
+} ADMW_CORE_Digital_Sensor_Comms_I2C_Clock;
/* =========================================================================
- *! \enum CORE_Digital_Sensor_Comms_SPI_Mode
+ *! \enum ADMW_CORE_Digital_Sensor_Comms_SPI_Mode
*! \brief Configuration for Sensor SPI Protocol (SPI_Mode) Enumerations
* ========================================================================= */
typedef enum
@@ -1727,14 +1728,14 @@
CORE_DIGITAL_SENSOR_COMMS_SPI_MODE_1 = 1, /**< Clock Polarity = 0 Clock Phase = 1 */
CORE_DIGITAL_SENSOR_COMMS_SPI_MODE_2 = 2, /**< Clock Polarity = 1 Clock Phase = 0 */
CORE_DIGITAL_SENSOR_COMMS_SPI_MODE_3 = 3 /**< Clock Polarity = 1 Clock Phase = 1 */
-} CORE_Digital_Sensor_Comms_SPI_Mode;
+} ADMW_CORE_Digital_Sensor_Comms_SPI_Mode;
/* ==========================================================================
- *! \struct CORE_Digital_Sensor_Comms_Struct
+ *! \struct ADMW_CORE_Digital_Sensor_Comms_Struct
*! \brief Digital Sensor Communication Clock Configuration Register bit field structure
* ========================================================================== */
-typedef struct CORE_Digital_Sensor_Comms_t {
+typedef struct _ADMW_CORE_Digital_Sensor_Comms_t {
union {
struct {
uint16_t Digital_Sensor_Comms_En : 1; /**< Enable Digital Sensor Comms Register Parameters */
@@ -1746,7 +1747,7 @@
};
uint16_t VALUE16;
};
-} CORE_Digital_Sensor_Comms_t;
+} ADMW_CORE_Digital_Sensor_Comms_t;
/*@}*/
@@ -1756,17 +1757,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Digital_Sensor_Command1_Struct
+ *! \struct ADMW_CORE_Digital_Sensor_Command1_Struct
*! \brief Sensor Configuration Command1 Register bit field structure
* ========================================================================== */
-typedef struct CORE_Digital_Sensor_Command1_t {
+typedef struct _ADMW_CORE_Digital_Sensor_Command1_t {
union {
struct {
uint8_t Digital_Sensor_Command1 : 8; /**< Configuration Command to Send to Digital I2C/SPI Sensor */
};
uint8_t VALUE8;
};
-} CORE_Digital_Sensor_Command1_t;
+} ADMW_CORE_Digital_Sensor_Command1_t;
/*@}*/
@@ -1776,17 +1777,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Digital_Sensor_Command2_Struct
+ *! \struct ADMW_CORE_Digital_Sensor_Command2_Struct
*! \brief Sensor Configuration Command2 Register bit field structure
* ========================================================================== */
-typedef struct CORE_Digital_Sensor_Command2_t {
+typedef struct _ADMW_CORE_Digital_Sensor_Command2_t {
union {
struct {
uint8_t Digital_Sensor_Command2 : 8; /**< Configuration Command to Send to Digital I2C/SPI Sensor */
};
uint8_t VALUE8;
};
-} CORE_Digital_Sensor_Command2_t;
+} ADMW_CORE_Digital_Sensor_Command2_t;
/*@}*/
@@ -1796,17 +1797,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Digital_Sensor_Command3_Struct
+ *! \struct ADMW_CORE_Digital_Sensor_Command3_Struct
*! \brief Sensor Configuration Command3 Register bit field structure
* ========================================================================== */
-typedef struct CORE_Digital_Sensor_Command3_t {
+typedef struct _ADMW_CORE_Digital_Sensor_Command3_t {
union {
struct {
uint8_t Digital_Sensor_Command3 : 8; /**< Configuration Command to Send to Digital I2C/SPI Sensor */
};
uint8_t VALUE8;
};
-} CORE_Digital_Sensor_Command3_t;
+} ADMW_CORE_Digital_Sensor_Command3_t;
/*@}*/
@@ -1816,17 +1817,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Digital_Sensor_Command4_Struct
+ *! \struct ADMW_CORE_Digital_Sensor_Command4_Struct
*! \brief Sensor Configuration Command4 Register bit field structure
* ========================================================================== */
-typedef struct CORE_Digital_Sensor_Command4_t {
+typedef struct _ADMW_CORE_Digital_Sensor_Command4_t {
union {
struct {
uint8_t Digital_Sensor_Command4 : 8; /**< Configuration Command to Send to Digital I2C/SPI Sensor */
};
uint8_t VALUE8;
};
-} CORE_Digital_Sensor_Command4_t;
+} ADMW_CORE_Digital_Sensor_Command4_t;
/*@}*/
@@ -1836,17 +1837,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Digital_Sensor_Command5_Struct
+ *! \struct ADMW_CORE_Digital_Sensor_Command5_Struct
*! \brief Sensor Configuration Command5 Register bit field structure
* ========================================================================== */
-typedef struct CORE_Digital_Sensor_Command5_t {
+typedef struct _ADMW_CORE_Digital_Sensor_Command5_t {
union {
struct {
uint8_t Digital_Sensor_Command5 : 8; /**< Configuration Command to Send to Digital I2C/SPI Sensor */
};
uint8_t VALUE8;
};
-} CORE_Digital_Sensor_Command5_t;
+} ADMW_CORE_Digital_Sensor_Command5_t;
/*@}*/
@@ -1856,17 +1857,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Digital_Sensor_Command6_Struct
+ *! \struct ADMW_CORE_Digital_Sensor_Command6_Struct
*! \brief Sensor Configuration Command6 Register bit field structure
* ========================================================================== */
-typedef struct CORE_Digital_Sensor_Command6_t {
+typedef struct _ADMW_CORE_Digital_Sensor_Command6_t {
union {
struct {
uint8_t Digital_Sensor_Command6 : 8; /**< Configuration Command to Send to Digital I2C/SPI Sensor */
};
uint8_t VALUE8;
};
-} CORE_Digital_Sensor_Command6_t;
+} ADMW_CORE_Digital_Sensor_Command6_t;
/*@}*/
@@ -1876,17 +1877,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Digital_Sensor_Command7_Struct
+ *! \struct ADMW_CORE_Digital_Sensor_Command7_Struct
*! \brief Sensor Configuration Command7 Register bit field structure
* ========================================================================== */
-typedef struct CORE_Digital_Sensor_Command7_t {
+typedef struct _ADMW_CORE_Digital_Sensor_Command7_t {
union {
struct {
uint8_t Digital_Sensor_Command7 : 8; /**< Configuration Command to Send to Digital I2C/SPI Sensor */
};
uint8_t VALUE8;
};
-} CORE_Digital_Sensor_Command7_t;
+} ADMW_CORE_Digital_Sensor_Command7_t;
/*@}*/
@@ -1896,17 +1897,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Digital_Sensor_Read_Cmd1_Struct
+ *! \struct ADMW_CORE_Digital_Sensor_Read_Cmd1_Struct
*! \brief Sensor Read Command1 Register bit field structure
* ========================================================================== */
-typedef struct CORE_Digital_Sensor_Read_Cmd1_t {
+typedef struct _ADMW_CORE_Digital_Sensor_Read_Cmd1_t {
union {
struct {
uint8_t Digital_Sensor_Read_Cmd1 : 8; /**< Per Conversion Command to Send to Digital I2C/SPI Sensor */
};
uint8_t VALUE8;
};
-} CORE_Digital_Sensor_Read_Cmd1_t;
+} ADMW_CORE_Digital_Sensor_Read_Cmd1_t;
/*@}*/
@@ -1916,17 +1917,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Digital_Sensor_Read_Cmd2_Struct
+ *! \struct ADMW_CORE_Digital_Sensor_Read_Cmd2_Struct
*! \brief Sensor Read Command2 Register bit field structure
* ========================================================================== */
-typedef struct CORE_Digital_Sensor_Read_Cmd2_t {
+typedef struct _ADMW_CORE_Digital_Sensor_Read_Cmd2_t {
union {
struct {
uint8_t Digital_Sensor_Read_Cmd2 : 8; /**< Per Conversion Command to Send to Digital I2C/SPI Sensor */
};
uint8_t VALUE8;
};
-} CORE_Digital_Sensor_Read_Cmd2_t;
+} ADMW_CORE_Digital_Sensor_Read_Cmd2_t;
/*@}*/
@@ -1936,17 +1937,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Digital_Sensor_Read_Cmd3_Struct
+ *! \struct ADMW_CORE_Digital_Sensor_Read_Cmd3_Struct
*! \brief Sensor Read Command3 Register bit field structure
* ========================================================================== */
-typedef struct CORE_Digital_Sensor_Read_Cmd3_t {
+typedef struct _ADMW_CORE_Digital_Sensor_Read_Cmd3_t {
union {
struct {
uint8_t Digital_Sensor_Read_Cmd3 : 8; /**< Per Conversion Command to Send to Digital I2C/SPI Sensor */
};
uint8_t VALUE8;
};
-} CORE_Digital_Sensor_Read_Cmd3_t;
+} ADMW_CORE_Digital_Sensor_Read_Cmd3_t;
/*@}*/
@@ -1956,17 +1957,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Digital_Sensor_Read_Cmd4_Struct
+ *! \struct ADMW_CORE_Digital_Sensor_Read_Cmd4_Struct
*! \brief Sensor Read Command4 Register bit field structure
* ========================================================================== */
-typedef struct CORE_Digital_Sensor_Read_Cmd4_t {
+typedef struct _ADMW_CORE_Digital_Sensor_Read_Cmd4_t {
union {
struct {
uint8_t Digital_Sensor_Read_Cmd4 : 8; /**< Per Conversion Command to Send to Digital I2C/SPI Sensor */
};
uint8_t VALUE8;
};
-} CORE_Digital_Sensor_Read_Cmd4_t;
+} ADMW_CORE_Digital_Sensor_Read_Cmd4_t;
/*@}*/
@@ -1976,17 +1977,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Digital_Sensor_Read_Cmd5_Struct
+ *! \struct ADMW_CORE_Digital_Sensor_Read_Cmd5_Struct
*! \brief Sensor Read Command5 Register bit field structure
* ========================================================================== */
-typedef struct CORE_Digital_Sensor_Read_Cmd5_t {
+typedef struct _ADMW_CORE_Digital_Sensor_Read_Cmd5_t {
union {
struct {
uint8_t Digital_Sensor_Read_Cmd5 : 8; /**< Per Conversion Command to Send to Digital I2C/SPI Sensor */
};
uint8_t VALUE8;
};
-} CORE_Digital_Sensor_Read_Cmd5_t;
+} ADMW_CORE_Digital_Sensor_Read_Cmd5_t;
/*@}*/
@@ -1996,17 +1997,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Digital_Sensor_Read_Cmd6_Struct
+ *! \struct ADMW_CORE_Digital_Sensor_Read_Cmd6_Struct
*! \brief Sensor Read Command6 Register bit field structure
* ========================================================================== */
-typedef struct CORE_Digital_Sensor_Read_Cmd6_t {
+typedef struct _ADMW_CORE_Digital_Sensor_Read_Cmd6_t {
union {
struct {
uint8_t Digital_Sensor_Read_Cmd6 : 8; /**< Per Conversion Command to Send to Digital I2C/SPI Sensor */
};
uint8_t VALUE8;
};
-} CORE_Digital_Sensor_Read_Cmd6_t;
+} ADMW_CORE_Digital_Sensor_Read_Cmd6_t;
/*@}*/
@@ -2016,17 +2017,17 @@
*/
/* ==========================================================================
- *! \struct CORE_Digital_Sensor_Read_Cmd7_Struct
+ *! \struct ADMW_CORE_Digital_Sensor_Read_Cmd7_Struct
*! \brief Sensor Read Command7 Register bit field structure
* ========================================================================== */
-typedef struct CORE_Digital_Sensor_Read_Cmd7_t {
+typedef struct _ADMW_CORE_Digital_Sensor_Read_Cmd7_t {
union {
struct {
uint8_t Digital_Sensor_Read_Cmd7 : 8; /**< Per Conversion Command to Send to Digital I2C/SPI Sensor */
};
uint8_t VALUE8;
};
-} CORE_Digital_Sensor_Read_Cmd7_t;
+} ADMW_CORE_Digital_Sensor_Read_Cmd7_t;
/*@}*/