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Operating Mode and DRDY Control (Mode) Register

Operating Mode and DRDY Control (Mode) Register

Operating Mode and DRDY Control (Mode) Register. More...

Enumerations

enum  ADMW_CORE_Mode_Conversion_Mode { CORE_MODE_SINGLECYCLE = 0, CORE_MODE_RESERVED = 1, CORE_MODE_CONTINUOUS = 2 }
enum  ADMW_CORE_Mode_Drdy_Mode { CORE_MODE_DRDY_PER_CONVERSION = 0, CORE_MODE_DRDY_PER_CYCLE = 1, CORE_MODE_DRDY_PER_FIFO_FILL = 2 }

Detailed Description

Operating Mode and DRDY Control (Mode) Register.


Enumeration Type Documentation

Enumerator:
CORE_MODE_SINGLECYCLE 

Single cycle conversion mode.

A cycle is completed every time a convert command is issued

CORE_MODE_RESERVED 

Reserved for future use.

CORE_MODE_CONTINUOUS 

Continuous conversion mode.

A cycle is started repeatedly at time specified in cycle time

Definition at line 329 of file ADMW1001_REGISTERS_typedefs.h.

Enumerator:
CORE_MODE_DRDY_PER_CONVERSION 

Data ready per conversion.

CORE_MODE_DRDY_PER_CYCLE 

Data ready per cycle.

CORE_MODE_DRDY_PER_FIFO_FILL 

Data ready per FIFO fill.

Definition at line 341 of file ADMW1001_REGISTERS_typedefs.h.