Vybhav Kadaba / Mbed OS EV-PRO-MW1001_Development

added wait_us(31) in admw_spi.cpp to support hibernation mode

inc/admw1001/admw1001_host_comms.h@5:0728bde67bdb, 2019-06-05 (annotated)

Committer:
Vkadaba
Date:
Wed Jun 05 05:39:15 2019 +0000
Revision:
5:0728bde67bdb
Child:
6:9d393a9677f4
Replaced all references to ADISense/ADISENSE1000/adi_sense with ADMW/ADMW1001/admw and the prject builds.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Vkadaba 5:0728bde67bdb 1 /*
Vkadaba 5:0728bde67bdb 2 Copyright (c) 2018 by ADI. This model is the confidential and
Vkadaba 5:0728bde67bdb 3 proprietary property of ADI and the possession or use of this
Vkadaba 5:0728bde67bdb 4 file requires a written license.
Vkadaba 5:0728bde67bdb 5 */
Vkadaba 5:0728bde67bdb 6 #ifndef __ADMW1001_HOST_COMMS_H__
Vkadaba 5:0728bde67bdb 7 #define __ADMW1001_HOST_COMMS_H__
Vkadaba 5:0728bde67bdb 8
Vkadaba 5:0728bde67bdb 9 #include "admw_types.h"
Vkadaba 5:0728bde67bdb 10 /*
Vkadaba 5:0728bde67bdb 11 * The host is expected to transfer a 16-bit command, followed by data bytes, in 2
Vkadaba 5:0728bde67bdb 12 * separate transfers delineated by the CS signal and a short delay in between.
Vkadaba 5:0728bde67bdb 13 *
Vkadaba 5:0728bde67bdb 14 * The 16-bit command contains a right-justified 11-bit register address (offset),
Vkadaba 5:0728bde67bdb 15 * and the remaining upper 5 bits are reserved as command bits assigned as follows:
Vkadaba 5:0728bde67bdb 16 * [15:11] 10000b = write command, 01000b = read command, anything else is invalid
Vkadaba 5:0728bde67bdb 17 * [10:0] register address (0-2047)
Vkadaba 5:0728bde67bdb 18 */
Vkadaba 5:0728bde67bdb 19
Vkadaba 5:0728bde67bdb 20 /* Register address space is limited to 2048 bytes (11 bit address) */
Vkadaba 5:0728bde67bdb 21 #define ADMW1001_HOST_COMMS_CMD_MASK 0xF800
Vkadaba 5:0728bde67bdb 22 #define ADMW1001_HOST_COMMS_ADR_MASK 0x07FF
Vkadaba 5:0728bde67bdb 23
Vkadaba 5:0728bde67bdb 24 /*
Vkadaba 5:0728bde67bdb 25 * The following commands are currently supported, anything else is treated
Vkadaba 5:0728bde67bdb 26 * as an error
Vkadaba 5:0728bde67bdb 27 */
Vkadaba 5:0728bde67bdb 28 #define ADMW1001_HOST_COMMS_WRITE_CMD 0x8000
Vkadaba 5:0728bde67bdb 29 #define ADMW1001_HOST_COMMS_READ_CMD 0x4000
Vkadaba 5:0728bde67bdb 30
Vkadaba 5:0728bde67bdb 31 /*
Vkadaba 5:0728bde67bdb 32 * The following bytes are sent back to the host when a command is recieved,
Vkadaba 5:0728bde67bdb 33 * to be used by the host to verify that we were ready to receive the command.
Vkadaba 5:0728bde67bdb 34 */
Vkadaba 5:0728bde67bdb 35 #define ADMW1001_HOST_COMMS_CMD_RESP_0 0xF0
Vkadaba 5:0728bde67bdb 36 #define ADMW1001_HOST_COMMS_CMD_RESP_1 0xE1
Vkadaba 5:0728bde67bdb 37
Vkadaba 5:0728bde67bdb 38 /*
Vkadaba 5:0728bde67bdb 39 * The following minimum delay, in microseconds, must be inserted after each SPI
Vkadaba 5:0728bde67bdb 40 * transfer to allow time for it to be processed by the device
Vkadaba 5:0728bde67bdb 41 */
Vkadaba 5:0728bde67bdb 42 #define ADMW1001_HOST_COMMS_XFER_DELAY (60)
Vkadaba 5:0728bde67bdb 43
Vkadaba 5:0728bde67bdb 44 /*! ADMW1001 Sensor Result bit field structure */
Vkadaba 5:0728bde67bdb 45 typedef struct _ADMW1001_Sensor_Result_t {
Vkadaba 5:0728bde67bdb 46 union {
Vkadaba 5:0728bde67bdb 47 struct {
Vkadaba 5:0728bde67bdb 48 float32_t Sensor_Result; /**< Linearized and compensated sensor result */
Vkadaba 5:0728bde67bdb 49 uint32_t Channel_ID : 4; /**< Indicates which channel this result corresponds to */
Vkadaba 5:0728bde67bdb 50 uint32_t Ch_Error : 1; /**< Indicates Error on channel */
Vkadaba 5:0728bde67bdb 51 uint32_t Ch_Alert : 1; /**< Indicates Alert on channel */
Vkadaba 5:0728bde67bdb 52 uint32_t Ch_Raw : 1; /**< Indicates if Raw sensor data field is valid */
Vkadaba 5:0728bde67bdb 53 uint32_t Ch_Valid : 1; /**< Indicates if this Result structure is valid */
Vkadaba 5:0728bde67bdb 54 uint32_t Raw_Sample : 24; /**< Raw sensor data value */
Vkadaba 5:0728bde67bdb 55 };
Vkadaba 5:0728bde67bdb 56 uint64_t VALUE64;
Vkadaba 5:0728bde67bdb 57 };
Vkadaba 5:0728bde67bdb 58 } ADMW1001_Sensor_Result_t;
Vkadaba 5:0728bde67bdb 59
Vkadaba 5:0728bde67bdb 60 #endif /* __ADMW1001_HOST_COMMS_H__ */
Vkadaba 5:0728bde67bdb 61