Vitaly Badeev / Mbed 2 deprecated Radar1

Dependencies:   FT800_2 mbed Encoder

DSP/src/arm_const_structs.c@0:fda1a80ff1ac, 2019-04-25 (annotated)

Committer:
Vitan
Date:
Thu Apr 25 11:19:28 2019 +0000
Revision:
0:fda1a80ff1ac
Radar1

Who changed what in which revision?

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Vitan 0:fda1a80ff1ac 1 /* ----------------------------------------------------------------------
Vitan 0:fda1a80ff1ac 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
Vitan 0:fda1a80ff1ac 3 *
Vitan 0:fda1a80ff1ac 4 * $Date: 19. March 2015
Vitan 0:fda1a80ff1ac 5 * $Revision: V.1.4.5
Vitan 0:fda1a80ff1ac 6 *
Vitan 0:fda1a80ff1ac 7 * Project: CMSIS DSP Library
Vitan 0:fda1a80ff1ac 8 * Title: arm_const_structs.c
Vitan 0:fda1a80ff1ac 9 *
Vitan 0:fda1a80ff1ac 10 * Description: This file has constant structs that are initialized for
Vitan 0:fda1a80ff1ac 11 * user convenience. For example, some can be given as
Vitan 0:fda1a80ff1ac 12 * arguments to the arm_cfft_f32() function.
Vitan 0:fda1a80ff1ac 13 *
Vitan 0:fda1a80ff1ac 14 * Target Processor: Cortex-M4/Cortex-M3
Vitan 0:fda1a80ff1ac 15 *
Vitan 0:fda1a80ff1ac 16 * Redistribution and use in source and binary forms, with or without
Vitan 0:fda1a80ff1ac 17 * modification, are permitted provided that the following conditions
Vitan 0:fda1a80ff1ac 18 * are met:
Vitan 0:fda1a80ff1ac 19 * - Redistributions of source code must retain the above copyright
Vitan 0:fda1a80ff1ac 20 * notice, this list of conditions and the following disclaimer.
Vitan 0:fda1a80ff1ac 21 * - Redistributions in binary form must reproduce the above copyright
Vitan 0:fda1a80ff1ac 22 * notice, this list of conditions and the following disclaimer in
Vitan 0:fda1a80ff1ac 23 * the documentation and/or other materials provided with the
Vitan 0:fda1a80ff1ac 24 * distribution.
Vitan 0:fda1a80ff1ac 25 * - Neither the name of ARM LIMITED nor the names of its contributors
Vitan 0:fda1a80ff1ac 26 * may be used to endorse or promote products derived from this
Vitan 0:fda1a80ff1ac 27 * software without specific prior written permission.
Vitan 0:fda1a80ff1ac 28 *
Vitan 0:fda1a80ff1ac 29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
Vitan 0:fda1a80ff1ac 30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
Vitan 0:fda1a80ff1ac 31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
Vitan 0:fda1a80ff1ac 32 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
Vitan 0:fda1a80ff1ac 33 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
Vitan 0:fda1a80ff1ac 34 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
Vitan 0:fda1a80ff1ac 35 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
Vitan 0:fda1a80ff1ac 36 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Vitan 0:fda1a80ff1ac 37 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
Vitan 0:fda1a80ff1ac 38 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
Vitan 0:fda1a80ff1ac 39 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Vitan 0:fda1a80ff1ac 40 * POSSIBILITY OF SUCH DAMAGE.
Vitan 0:fda1a80ff1ac 41 * -------------------------------------------------------------------- */
Vitan 0:fda1a80ff1ac 42
Vitan 0:fda1a80ff1ac 43 #include "arm_const_structs.h"
Vitan 0:fda1a80ff1ac 44
Vitan 0:fda1a80ff1ac 45 //Floating-point structs
Vitan 0:fda1a80ff1ac 46
Vitan 0:fda1a80ff1ac 47 const arm_cfft_instance_f32 arm_cfft_sR_f32_len16 = {
Vitan 0:fda1a80ff1ac 48 16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE__16_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 49 };
Vitan 0:fda1a80ff1ac 50
Vitan 0:fda1a80ff1ac 51 const arm_cfft_instance_f32 arm_cfft_sR_f32_len32 = {
Vitan 0:fda1a80ff1ac 52 32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE__32_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 53 };
Vitan 0:fda1a80ff1ac 54
Vitan 0:fda1a80ff1ac 55 const arm_cfft_instance_f32 arm_cfft_sR_f32_len64 = {
Vitan 0:fda1a80ff1ac 56 64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE__64_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 57 };
Vitan 0:fda1a80ff1ac 58
Vitan 0:fda1a80ff1ac 59 const arm_cfft_instance_f32 arm_cfft_sR_f32_len128 = {
Vitan 0:fda1a80ff1ac 60 128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 61 };
Vitan 0:fda1a80ff1ac 62
Vitan 0:fda1a80ff1ac 63 const arm_cfft_instance_f32 arm_cfft_sR_f32_len256 = {
Vitan 0:fda1a80ff1ac 64 256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 65 };
Vitan 0:fda1a80ff1ac 66
Vitan 0:fda1a80ff1ac 67 const arm_cfft_instance_f32 arm_cfft_sR_f32_len512 = {
Vitan 0:fda1a80ff1ac 68 512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 69 };
Vitan 0:fda1a80ff1ac 70
Vitan 0:fda1a80ff1ac 71 const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024 = {
Vitan 0:fda1a80ff1ac 72 1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE1024_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 73 };
Vitan 0:fda1a80ff1ac 74
Vitan 0:fda1a80ff1ac 75 const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048 = {
Vitan 0:fda1a80ff1ac 76 2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE2048_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 77 };
Vitan 0:fda1a80ff1ac 78
Vitan 0:fda1a80ff1ac 79 const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096 = {
Vitan 0:fda1a80ff1ac 80 4096, twiddleCoef_4096, armBitRevIndexTable4096, ARMBITREVINDEXTABLE4096_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 81 };
Vitan 0:fda1a80ff1ac 82
Vitan 0:fda1a80ff1ac 83 //Fixed-point structs
Vitan 0:fda1a80ff1ac 84
Vitan 0:fda1a80ff1ac 85 const arm_cfft_instance_q31 arm_cfft_sR_q31_len16 = {
Vitan 0:fda1a80ff1ac 86 16, twiddleCoef_16_q31, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 87 };
Vitan 0:fda1a80ff1ac 88
Vitan 0:fda1a80ff1ac 89 const arm_cfft_instance_q31 arm_cfft_sR_q31_len32 = {
Vitan 0:fda1a80ff1ac 90 32, twiddleCoef_32_q31, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 91 };
Vitan 0:fda1a80ff1ac 92
Vitan 0:fda1a80ff1ac 93 const arm_cfft_instance_q31 arm_cfft_sR_q31_len64 = {
Vitan 0:fda1a80ff1ac 94 64, twiddleCoef_64_q31, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 95 };
Vitan 0:fda1a80ff1ac 96
Vitan 0:fda1a80ff1ac 97 const arm_cfft_instance_q31 arm_cfft_sR_q31_len128 = {
Vitan 0:fda1a80ff1ac 98 128, twiddleCoef_128_q31, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 99 };
Vitan 0:fda1a80ff1ac 100
Vitan 0:fda1a80ff1ac 101 const arm_cfft_instance_q31 arm_cfft_sR_q31_len256 = {
Vitan 0:fda1a80ff1ac 102 256, twiddleCoef_256_q31, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 103 };
Vitan 0:fda1a80ff1ac 104
Vitan 0:fda1a80ff1ac 105 const arm_cfft_instance_q31 arm_cfft_sR_q31_len512 = {
Vitan 0:fda1a80ff1ac 106 512, twiddleCoef_512_q31, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 107 };
Vitan 0:fda1a80ff1ac 108
Vitan 0:fda1a80ff1ac 109 const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024 = {
Vitan 0:fda1a80ff1ac 110 1024, twiddleCoef_1024_q31, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 111 };
Vitan 0:fda1a80ff1ac 112
Vitan 0:fda1a80ff1ac 113 const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048 = {
Vitan 0:fda1a80ff1ac 114 2048, twiddleCoef_2048_q31, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 115 };
Vitan 0:fda1a80ff1ac 116
Vitan 0:fda1a80ff1ac 117 const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096 = {
Vitan 0:fda1a80ff1ac 118 4096, twiddleCoef_4096_q31, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 119 };
Vitan 0:fda1a80ff1ac 120
Vitan 0:fda1a80ff1ac 121
Vitan 0:fda1a80ff1ac 122 const arm_cfft_instance_q15 arm_cfft_sR_q15_len16 = {
Vitan 0:fda1a80ff1ac 123 16, twiddleCoef_16_q15, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 124 };
Vitan 0:fda1a80ff1ac 125
Vitan 0:fda1a80ff1ac 126 const arm_cfft_instance_q15 arm_cfft_sR_q15_len32 = {
Vitan 0:fda1a80ff1ac 127 32, twiddleCoef_32_q15, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 128 };
Vitan 0:fda1a80ff1ac 129
Vitan 0:fda1a80ff1ac 130 const arm_cfft_instance_q15 arm_cfft_sR_q15_len64 = {
Vitan 0:fda1a80ff1ac 131 64, twiddleCoef_64_q15, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 132 };
Vitan 0:fda1a80ff1ac 133
Vitan 0:fda1a80ff1ac 134 const arm_cfft_instance_q15 arm_cfft_sR_q15_len128 = {
Vitan 0:fda1a80ff1ac 135 128, twiddleCoef_128_q15, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 136 };
Vitan 0:fda1a80ff1ac 137
Vitan 0:fda1a80ff1ac 138 const arm_cfft_instance_q15 arm_cfft_sR_q15_len256 = {
Vitan 0:fda1a80ff1ac 139 256, twiddleCoef_256_q15, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 140 };
Vitan 0:fda1a80ff1ac 141
Vitan 0:fda1a80ff1ac 142 const arm_cfft_instance_q15 arm_cfft_sR_q15_len512 = {
Vitan 0:fda1a80ff1ac 143 512, twiddleCoef_512_q15, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 144 };
Vitan 0:fda1a80ff1ac 145
Vitan 0:fda1a80ff1ac 146 const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024 = {
Vitan 0:fda1a80ff1ac 147 1024, twiddleCoef_1024_q15, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 148 };
Vitan 0:fda1a80ff1ac 149
Vitan 0:fda1a80ff1ac 150 const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048 = {
Vitan 0:fda1a80ff1ac 151 2048, twiddleCoef_2048_q15, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 152 };
Vitan 0:fda1a80ff1ac 153
Vitan 0:fda1a80ff1ac 154 const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096 = {
Vitan 0:fda1a80ff1ac 155 4096, twiddleCoef_4096_q15, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
Vitan 0:fda1a80ff1ac 156 };