Radar1

Dependencies:   FT800_2 mbed Encoder

Committer:
Vitan
Date:
Thu Apr 25 11:19:28 2019 +0000
Revision:
0:fda1a80ff1ac
Radar1

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Vitan 0:fda1a80ff1ac 1 /* ----------------------------------------------------------------------
Vitan 0:fda1a80ff1ac 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
Vitan 0:fda1a80ff1ac 3 *
Vitan 0:fda1a80ff1ac 4 * $Date: 19. March 2015
Vitan 0:fda1a80ff1ac 5 * $Revision: V.1.4.5
Vitan 0:fda1a80ff1ac 6 *
Vitan 0:fda1a80ff1ac 7 * Project: CMSIS DSP Library
Vitan 0:fda1a80ff1ac 8 * Title: arm_bitreversal.c
Vitan 0:fda1a80ff1ac 9 *
Vitan 0:fda1a80ff1ac 10 * Description: This file has common tables like Bitreverse, reciprocal etc which are used across different functions
Vitan 0:fda1a80ff1ac 11 *
Vitan 0:fda1a80ff1ac 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
Vitan 0:fda1a80ff1ac 13 *
Vitan 0:fda1a80ff1ac 14 * Redistribution and use in source and binary forms, with or without
Vitan 0:fda1a80ff1ac 15 * modification, are permitted provided that the following conditions
Vitan 0:fda1a80ff1ac 16 * are met:
Vitan 0:fda1a80ff1ac 17 * - Redistributions of source code must retain the above copyright
Vitan 0:fda1a80ff1ac 18 * notice, this list of conditions and the following disclaimer.
Vitan 0:fda1a80ff1ac 19 * - Redistributions in binary form must reproduce the above copyright
Vitan 0:fda1a80ff1ac 20 * notice, this list of conditions and the following disclaimer in
Vitan 0:fda1a80ff1ac 21 * the documentation and/or other materials provided with the
Vitan 0:fda1a80ff1ac 22 * distribution.
Vitan 0:fda1a80ff1ac 23 * - Neither the name of ARM LIMITED nor the names of its contributors
Vitan 0:fda1a80ff1ac 24 * may be used to endorse or promote products derived from this
Vitan 0:fda1a80ff1ac 25 * software without specific prior written permission.
Vitan 0:fda1a80ff1ac 26 *
Vitan 0:fda1a80ff1ac 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
Vitan 0:fda1a80ff1ac 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
Vitan 0:fda1a80ff1ac 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
Vitan 0:fda1a80ff1ac 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
Vitan 0:fda1a80ff1ac 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
Vitan 0:fda1a80ff1ac 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
Vitan 0:fda1a80ff1ac 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
Vitan 0:fda1a80ff1ac 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Vitan 0:fda1a80ff1ac 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
Vitan 0:fda1a80ff1ac 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
Vitan 0:fda1a80ff1ac 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Vitan 0:fda1a80ff1ac 38 * POSSIBILITY OF SUCH DAMAGE.
Vitan 0:fda1a80ff1ac 39 * -------------------------------------------------------------------- */
Vitan 0:fda1a80ff1ac 40
Vitan 0:fda1a80ff1ac 41 #include "arm_math.h"
Vitan 0:fda1a80ff1ac 42 #include "arm_common_tables.h"
Vitan 0:fda1a80ff1ac 43
Vitan 0:fda1a80ff1ac 44 /*
Vitan 0:fda1a80ff1ac 45 * @brief In-place bit reversal function.
Vitan 0:fda1a80ff1ac 46 * @param[in, out] *pSrc points to the in-place buffer of floating-point data type.
Vitan 0:fda1a80ff1ac 47 * @param[in] fftSize length of the FFT.
Vitan 0:fda1a80ff1ac 48 * @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table.
Vitan 0:fda1a80ff1ac 49 * @param[in] *pBitRevTab points to the bit reversal table.
Vitan 0:fda1a80ff1ac 50 * @return none.
Vitan 0:fda1a80ff1ac 51 */
Vitan 0:fda1a80ff1ac 52
Vitan 0:fda1a80ff1ac 53 void arm_bitreversal_f32(
Vitan 0:fda1a80ff1ac 54 float32_t * pSrc,
Vitan 0:fda1a80ff1ac 55 uint16_t fftSize,
Vitan 0:fda1a80ff1ac 56 uint16_t bitRevFactor,
Vitan 0:fda1a80ff1ac 57 uint16_t * pBitRevTab)
Vitan 0:fda1a80ff1ac 58 {
Vitan 0:fda1a80ff1ac 59 uint16_t fftLenBy2, fftLenBy2p1;
Vitan 0:fda1a80ff1ac 60 uint16_t i, j;
Vitan 0:fda1a80ff1ac 61 float32_t in;
Vitan 0:fda1a80ff1ac 62
Vitan 0:fda1a80ff1ac 63 /* Initializations */
Vitan 0:fda1a80ff1ac 64 j = 0u;
Vitan 0:fda1a80ff1ac 65 fftLenBy2 = fftSize >> 1u;
Vitan 0:fda1a80ff1ac 66 fftLenBy2p1 = (fftSize >> 1u) + 1u;
Vitan 0:fda1a80ff1ac 67
Vitan 0:fda1a80ff1ac 68 /* Bit Reversal Implementation */
Vitan 0:fda1a80ff1ac 69 for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u)
Vitan 0:fda1a80ff1ac 70 {
Vitan 0:fda1a80ff1ac 71 if(i < j)
Vitan 0:fda1a80ff1ac 72 {
Vitan 0:fda1a80ff1ac 73 /* pSrc[i] <-> pSrc[j]; */
Vitan 0:fda1a80ff1ac 74 in = pSrc[2u * i];
Vitan 0:fda1a80ff1ac 75 pSrc[2u * i] = pSrc[2u * j];
Vitan 0:fda1a80ff1ac 76 pSrc[2u * j] = in;
Vitan 0:fda1a80ff1ac 77
Vitan 0:fda1a80ff1ac 78 /* pSrc[i+1u] <-> pSrc[j+1u] */
Vitan 0:fda1a80ff1ac 79 in = pSrc[(2u * i) + 1u];
Vitan 0:fda1a80ff1ac 80 pSrc[(2u * i) + 1u] = pSrc[(2u * j) + 1u];
Vitan 0:fda1a80ff1ac 81 pSrc[(2u * j) + 1u] = in;
Vitan 0:fda1a80ff1ac 82
Vitan 0:fda1a80ff1ac 83 /* pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */
Vitan 0:fda1a80ff1ac 84 in = pSrc[2u * (i + fftLenBy2p1)];
Vitan 0:fda1a80ff1ac 85 pSrc[2u * (i + fftLenBy2p1)] = pSrc[2u * (j + fftLenBy2p1)];
Vitan 0:fda1a80ff1ac 86 pSrc[2u * (j + fftLenBy2p1)] = in;
Vitan 0:fda1a80ff1ac 87
Vitan 0:fda1a80ff1ac 88 /* pSrc[i+fftLenBy2p1+1u] <-> pSrc[j+fftLenBy2p1+1u] */
Vitan 0:fda1a80ff1ac 89 in = pSrc[(2u * (i + fftLenBy2p1)) + 1u];
Vitan 0:fda1a80ff1ac 90 pSrc[(2u * (i + fftLenBy2p1)) + 1u] =
Vitan 0:fda1a80ff1ac 91 pSrc[(2u * (j + fftLenBy2p1)) + 1u];
Vitan 0:fda1a80ff1ac 92 pSrc[(2u * (j + fftLenBy2p1)) + 1u] = in;
Vitan 0:fda1a80ff1ac 93
Vitan 0:fda1a80ff1ac 94 }
Vitan 0:fda1a80ff1ac 95
Vitan 0:fda1a80ff1ac 96 /* pSrc[i+1u] <-> pSrc[j+1u] */
Vitan 0:fda1a80ff1ac 97 in = pSrc[2u * (i + 1u)];
Vitan 0:fda1a80ff1ac 98 pSrc[2u * (i + 1u)] = pSrc[2u * (j + fftLenBy2)];
Vitan 0:fda1a80ff1ac 99 pSrc[2u * (j + fftLenBy2)] = in;
Vitan 0:fda1a80ff1ac 100
Vitan 0:fda1a80ff1ac 101 /* pSrc[i+2u] <-> pSrc[j+2u] */
Vitan 0:fda1a80ff1ac 102 in = pSrc[(2u * (i + 1u)) + 1u];
Vitan 0:fda1a80ff1ac 103 pSrc[(2u * (i + 1u)) + 1u] = pSrc[(2u * (j + fftLenBy2)) + 1u];
Vitan 0:fda1a80ff1ac 104 pSrc[(2u * (j + fftLenBy2)) + 1u] = in;
Vitan 0:fda1a80ff1ac 105
Vitan 0:fda1a80ff1ac 106 /* Reading the index for the bit reversal */
Vitan 0:fda1a80ff1ac 107 j = *pBitRevTab;
Vitan 0:fda1a80ff1ac 108
Vitan 0:fda1a80ff1ac 109 /* Updating the bit reversal index depending on the fft length */
Vitan 0:fda1a80ff1ac 110 pBitRevTab += bitRevFactor;
Vitan 0:fda1a80ff1ac 111 }
Vitan 0:fda1a80ff1ac 112 }
Vitan 0:fda1a80ff1ac 113
Vitan 0:fda1a80ff1ac 114
Vitan 0:fda1a80ff1ac 115
Vitan 0:fda1a80ff1ac 116 /*
Vitan 0:fda1a80ff1ac 117 * @brief In-place bit reversal function.
Vitan 0:fda1a80ff1ac 118 * @param[in, out] *pSrc points to the in-place buffer of Q31 data type.
Vitan 0:fda1a80ff1ac 119 * @param[in] fftLen length of the FFT.
Vitan 0:fda1a80ff1ac 120 * @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
Vitan 0:fda1a80ff1ac 121 * @param[in] *pBitRevTab points to bit reversal table.
Vitan 0:fda1a80ff1ac 122 * @return none.
Vitan 0:fda1a80ff1ac 123 */
Vitan 0:fda1a80ff1ac 124
Vitan 0:fda1a80ff1ac 125 void arm_bitreversal_q31(
Vitan 0:fda1a80ff1ac 126 q31_t * pSrc,
Vitan 0:fda1a80ff1ac 127 uint32_t fftLen,
Vitan 0:fda1a80ff1ac 128 uint16_t bitRevFactor,
Vitan 0:fda1a80ff1ac 129 uint16_t * pBitRevTable)
Vitan 0:fda1a80ff1ac 130 {
Vitan 0:fda1a80ff1ac 131 uint32_t fftLenBy2, fftLenBy2p1, i, j;
Vitan 0:fda1a80ff1ac 132 q31_t in;
Vitan 0:fda1a80ff1ac 133
Vitan 0:fda1a80ff1ac 134 /* Initializations */
Vitan 0:fda1a80ff1ac 135 j = 0u;
Vitan 0:fda1a80ff1ac 136 fftLenBy2 = fftLen / 2u;
Vitan 0:fda1a80ff1ac 137 fftLenBy2p1 = (fftLen / 2u) + 1u;
Vitan 0:fda1a80ff1ac 138
Vitan 0:fda1a80ff1ac 139 /* Bit Reversal Implementation */
Vitan 0:fda1a80ff1ac 140 for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u)
Vitan 0:fda1a80ff1ac 141 {
Vitan 0:fda1a80ff1ac 142 if(i < j)
Vitan 0:fda1a80ff1ac 143 {
Vitan 0:fda1a80ff1ac 144 /* pSrc[i] <-> pSrc[j]; */
Vitan 0:fda1a80ff1ac 145 in = pSrc[2u * i];
Vitan 0:fda1a80ff1ac 146 pSrc[2u * i] = pSrc[2u * j];
Vitan 0:fda1a80ff1ac 147 pSrc[2u * j] = in;
Vitan 0:fda1a80ff1ac 148
Vitan 0:fda1a80ff1ac 149 /* pSrc[i+1u] <-> pSrc[j+1u] */
Vitan 0:fda1a80ff1ac 150 in = pSrc[(2u * i) + 1u];
Vitan 0:fda1a80ff1ac 151 pSrc[(2u * i) + 1u] = pSrc[(2u * j) + 1u];
Vitan 0:fda1a80ff1ac 152 pSrc[(2u * j) + 1u] = in;
Vitan 0:fda1a80ff1ac 153
Vitan 0:fda1a80ff1ac 154 /* pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */
Vitan 0:fda1a80ff1ac 155 in = pSrc[2u * (i + fftLenBy2p1)];
Vitan 0:fda1a80ff1ac 156 pSrc[2u * (i + fftLenBy2p1)] = pSrc[2u * (j + fftLenBy2p1)];
Vitan 0:fda1a80ff1ac 157 pSrc[2u * (j + fftLenBy2p1)] = in;
Vitan 0:fda1a80ff1ac 158
Vitan 0:fda1a80ff1ac 159 /* pSrc[i+fftLenBy2p1+1u] <-> pSrc[j+fftLenBy2p1+1u] */
Vitan 0:fda1a80ff1ac 160 in = pSrc[(2u * (i + fftLenBy2p1)) + 1u];
Vitan 0:fda1a80ff1ac 161 pSrc[(2u * (i + fftLenBy2p1)) + 1u] =
Vitan 0:fda1a80ff1ac 162 pSrc[(2u * (j + fftLenBy2p1)) + 1u];
Vitan 0:fda1a80ff1ac 163 pSrc[(2u * (j + fftLenBy2p1)) + 1u] = in;
Vitan 0:fda1a80ff1ac 164
Vitan 0:fda1a80ff1ac 165 }
Vitan 0:fda1a80ff1ac 166
Vitan 0:fda1a80ff1ac 167 /* pSrc[i+1u] <-> pSrc[j+1u] */
Vitan 0:fda1a80ff1ac 168 in = pSrc[2u * (i + 1u)];
Vitan 0:fda1a80ff1ac 169 pSrc[2u * (i + 1u)] = pSrc[2u * (j + fftLenBy2)];
Vitan 0:fda1a80ff1ac 170 pSrc[2u * (j + fftLenBy2)] = in;
Vitan 0:fda1a80ff1ac 171
Vitan 0:fda1a80ff1ac 172 /* pSrc[i+2u] <-> pSrc[j+2u] */
Vitan 0:fda1a80ff1ac 173 in = pSrc[(2u * (i + 1u)) + 1u];
Vitan 0:fda1a80ff1ac 174 pSrc[(2u * (i + 1u)) + 1u] = pSrc[(2u * (j + fftLenBy2)) + 1u];
Vitan 0:fda1a80ff1ac 175 pSrc[(2u * (j + fftLenBy2)) + 1u] = in;
Vitan 0:fda1a80ff1ac 176
Vitan 0:fda1a80ff1ac 177 /* Reading the index for the bit reversal */
Vitan 0:fda1a80ff1ac 178 j = *pBitRevTable;
Vitan 0:fda1a80ff1ac 179
Vitan 0:fda1a80ff1ac 180 /* Updating the bit reversal index depending on the fft length */
Vitan 0:fda1a80ff1ac 181 pBitRevTable += bitRevFactor;
Vitan 0:fda1a80ff1ac 182 }
Vitan 0:fda1a80ff1ac 183 }
Vitan 0:fda1a80ff1ac 184
Vitan 0:fda1a80ff1ac 185
Vitan 0:fda1a80ff1ac 186
Vitan 0:fda1a80ff1ac 187 /*
Vitan 0:fda1a80ff1ac 188 * @brief In-place bit reversal function.
Vitan 0:fda1a80ff1ac 189 * @param[in, out] *pSrc points to the in-place buffer of Q15 data type.
Vitan 0:fda1a80ff1ac 190 * @param[in] fftLen length of the FFT.
Vitan 0:fda1a80ff1ac 191 * @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
Vitan 0:fda1a80ff1ac 192 * @param[in] *pBitRevTab points to bit reversal table.
Vitan 0:fda1a80ff1ac 193 * @return none.
Vitan 0:fda1a80ff1ac 194 */
Vitan 0:fda1a80ff1ac 195
Vitan 0:fda1a80ff1ac 196 void arm_bitreversal_q15(
Vitan 0:fda1a80ff1ac 197 q15_t * pSrc16,
Vitan 0:fda1a80ff1ac 198 uint32_t fftLen,
Vitan 0:fda1a80ff1ac 199 uint16_t bitRevFactor,
Vitan 0:fda1a80ff1ac 200 uint16_t * pBitRevTab)
Vitan 0:fda1a80ff1ac 201 {
Vitan 0:fda1a80ff1ac 202 q31_t *pSrc = (q31_t *) pSrc16;
Vitan 0:fda1a80ff1ac 203 q31_t in;
Vitan 0:fda1a80ff1ac 204 uint32_t fftLenBy2, fftLenBy2p1;
Vitan 0:fda1a80ff1ac 205 uint32_t i, j;
Vitan 0:fda1a80ff1ac 206
Vitan 0:fda1a80ff1ac 207 /* Initializations */
Vitan 0:fda1a80ff1ac 208 j = 0u;
Vitan 0:fda1a80ff1ac 209 fftLenBy2 = fftLen / 2u;
Vitan 0:fda1a80ff1ac 210 fftLenBy2p1 = (fftLen / 2u) + 1u;
Vitan 0:fda1a80ff1ac 211
Vitan 0:fda1a80ff1ac 212 /* Bit Reversal Implementation */
Vitan 0:fda1a80ff1ac 213 for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u)
Vitan 0:fda1a80ff1ac 214 {
Vitan 0:fda1a80ff1ac 215 if(i < j)
Vitan 0:fda1a80ff1ac 216 {
Vitan 0:fda1a80ff1ac 217 /* pSrc[i] <-> pSrc[j]; */
Vitan 0:fda1a80ff1ac 218 /* pSrc[i+1u] <-> pSrc[j+1u] */
Vitan 0:fda1a80ff1ac 219 in = pSrc[i];
Vitan 0:fda1a80ff1ac 220 pSrc[i] = pSrc[j];
Vitan 0:fda1a80ff1ac 221 pSrc[j] = in;
Vitan 0:fda1a80ff1ac 222
Vitan 0:fda1a80ff1ac 223 /* pSrc[i + fftLenBy2p1] <-> pSrc[j + fftLenBy2p1]; */
Vitan 0:fda1a80ff1ac 224 /* pSrc[i + fftLenBy2p1+1u] <-> pSrc[j + fftLenBy2p1+1u] */
Vitan 0:fda1a80ff1ac 225 in = pSrc[i + fftLenBy2p1];
Vitan 0:fda1a80ff1ac 226 pSrc[i + fftLenBy2p1] = pSrc[j + fftLenBy2p1];
Vitan 0:fda1a80ff1ac 227 pSrc[j + fftLenBy2p1] = in;
Vitan 0:fda1a80ff1ac 228 }
Vitan 0:fda1a80ff1ac 229
Vitan 0:fda1a80ff1ac 230 /* pSrc[i+1u] <-> pSrc[j+fftLenBy2]; */
Vitan 0:fda1a80ff1ac 231 /* pSrc[i+2] <-> pSrc[j+fftLenBy2+1u] */
Vitan 0:fda1a80ff1ac 232 in = pSrc[i + 1u];
Vitan 0:fda1a80ff1ac 233 pSrc[i + 1u] = pSrc[j + fftLenBy2];
Vitan 0:fda1a80ff1ac 234 pSrc[j + fftLenBy2] = in;
Vitan 0:fda1a80ff1ac 235
Vitan 0:fda1a80ff1ac 236 /* Reading the index for the bit reversal */
Vitan 0:fda1a80ff1ac 237 j = *pBitRevTab;
Vitan 0:fda1a80ff1ac 238
Vitan 0:fda1a80ff1ac 239 /* Updating the bit reversal index depending on the fft length */
Vitan 0:fda1a80ff1ac 240 pBitRevTab += bitRevFactor;
Vitan 0:fda1a80ff1ac 241 }
Vitan 0:fda1a80ff1ac 242 }