Diff: targets/TARGET_NUVOTON/TARGET_M451/analogin_api.c

Revision:

153:fa9ff456f731

Parent:

149:156823d33999

--- a/targets/TARGET_NUVOTON/TARGET_M451/analogin_api.c	Thu Dec 15 11:48:27 2016 +0000
+++ b/targets/TARGET_NUVOTON/TARGET_M451/analogin_api.c	Tue Dec 20 17:27:56 2016 +0000
@@ -23,76 +23,25 @@
 #include "PeripheralPins.h"
 #include "nu_modutil.h"
 
-struct nu_adc_var {
-    uint32_t    en_msk;
-};
-
-static struct nu_adc_var adc0_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc1_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc2_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc3_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc4_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc5_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc6_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc7_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc8_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc9_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc10_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc11_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc12_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc13_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc14_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc15_var = {
-    .en_msk = 0
-};
+static uint32_t eadc_modinit_mask = 0;
 
 static const struct nu_modinit_s adc_modinit_tab[] = {
-    {ADC_0_0, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc0_var},
-    {ADC_0_1, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc1_var},
-    {ADC_0_2, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc2_var},
-    {ADC_0_3, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc3_var},
-    {ADC_0_4, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc4_var},
-    {ADC_0_5, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc5_var},
-    {ADC_0_6, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc6_var},
-    {ADC_0_7, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc7_var},
-    {ADC_0_8, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc8_var},
-    {ADC_0_9, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc9_var},
-    {ADC_0_10, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc10_var},
-    {ADC_0_11, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc11_var},
-    {ADC_0_12, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc12_var},
-    {ADC_0_13, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc13_var},
-    {ADC_0_14, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc14_var},
-    {ADC_0_15, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc15_var},
+    {ADC_0_0, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
+    {ADC_0_1, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
+    {ADC_0_2, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
+    {ADC_0_3, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
+    {ADC_0_4, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
+    {ADC_0_5, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
+    {ADC_0_6, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
+    {ADC_0_7, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
+    {ADC_0_8, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
+    {ADC_0_9, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
+    {ADC_0_10, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
+    {ADC_0_11, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
+    {ADC_0_12, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
+    {ADC_0_13, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
+    {ADC_0_14, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
+    {ADC_0_15, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
 };
 
 void analogin_init(analogin_t *obj, PinName pin)
@@ -107,7 +56,7 @@
     EADC_T *eadc_base = (EADC_T *) NU_MODBASE(obj->adc);
     
     // NOTE: All channels (identified by ADCName) share a ADC module. This reset will also affect other channels of the same ADC module.
-    if (! ((struct nu_adc_var *) modinit->var)->en_msk) {
+    if (! eadc_modinit_mask) {
         // Reset this module if no channel enabled
         SYS_ResetModule(modinit->rsetidx);
         
@@ -116,9 +65,6 @@
         // Enable clock of paired channels
         CLK_EnableModuleClock(modinit->clkidx);
         
-        // Power on ADC
-        //ADC_POWER_ON(ADC);
-        
         // Set the ADC internal sampling time, input mode as single-end and enable the A/D converter
         EADC_Open(eadc_base, EADC_CTL_DIFFEN_SINGLE_END);
         EADC_SetInternalSampleTime(eadc_base, 6);
@@ -130,9 +76,9 @@
     pinmap_pinout(pin, PinMap_ADC);
     
     // Configure the sample module Nmod for analog input channel Nch and software trigger source
-    EADC_ConfigSampleModule(EADC, chn, EADC_SOFTWARE_TRIGGER, chn);
+    EADC_ConfigSampleModule(eadc_base, chn, EADC_SOFTWARE_TRIGGER, chn);
     
-    ((struct nu_adc_var *) modinit->var)->en_msk |= 1 << chn;
+    eadc_modinit_mask |= 1 << chn;
 }
 
 uint16_t analogin_read_u16(analogin_t *obj)
@@ -141,7 +87,7 @@
     uint32_t chn =  NU_MODSUBINDEX(obj->adc);
     
     EADC_START_CONV(eadc_base, 1 << chn);
-    while (EADC_GET_PENDING_CONV(eadc_base) & (1 << chn));
+    while (EADC_GET_DATA_VALID_FLAG(eadc_base, 1 << chn) != (1 << chn));
     uint16_t conv_res_12 = EADC_GET_CONV_DATA(eadc_base, chn);
     // Just 12 bits are effective. Convert to 16 bits.
     // conv_res_12: 0000 b11b10b9b8 b7b6b5b4 b3b2b1b0