Tux Leon / mbed-dev

mbed library sources. Supersedes mbed-src.

Fork of mbed-dev by mbed official

targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_utils.h@167:e84263d55307, 2017-06-21 (annotated)

Committer:
AnnaBridge
Date:
Wed Jun 21 17:46:44 2017 +0100
Revision:
167:e84263d55307
Parent:
149:156823d33999 
This updates the lib to the mbed lib v 145

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32l4xx_ll_utils.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
AnnaBridge 167:e84263d55307 5 * @version V1.7.1
AnnaBridge 167:e84263d55307 6 * @date 21-April-2017
<> 144:ef7eb2e8f9f7 7 * @brief Header file of UTILS LL module.
<> 144:ef7eb2e8f9f7 8 @verbatim
<> 144:ef7eb2e8f9f7 9 ==============================================================================
<> 144:ef7eb2e8f9f7 10 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 11 ==============================================================================
<> 144:ef7eb2e8f9f7 12 [..]
<> 144:ef7eb2e8f9f7 13 The LL UTILS driver contains a set of generic APIs that can be
<> 144:ef7eb2e8f9f7 14 used by user:
<> 144:ef7eb2e8f9f7 15 (+) Device electronic signature
<> 144:ef7eb2e8f9f7 16 (+) Timing functions
<> 144:ef7eb2e8f9f7 17 (+) PLL configuration functions
<> 144:ef7eb2e8f9f7 18
<> 144:ef7eb2e8f9f7 19 @endverbatim
<> 144:ef7eb2e8f9f7 20 ******************************************************************************
<> 144:ef7eb2e8f9f7 21 * @attention
<> 144:ef7eb2e8f9f7 22 *
AnnaBridge 167:e84263d55307 23 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 24 *
<> 144:ef7eb2e8f9f7 25 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 26 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 27 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 28 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 29 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 30 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 31 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 32 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 33 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 34 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 35 *
<> 144:ef7eb2e8f9f7 36 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 37 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 38 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 39 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 40 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 41 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 42 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 43 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 44 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 45 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 46 *
<> 144:ef7eb2e8f9f7 47 ******************************************************************************
<> 144:ef7eb2e8f9f7 48 */
<> 144:ef7eb2e8f9f7 49
<> 144:ef7eb2e8f9f7 50 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 51 #ifndef __STM32L4xx_LL_UTILS_H
<> 144:ef7eb2e8f9f7 52 #define __STM32L4xx_LL_UTILS_H
<> 144:ef7eb2e8f9f7 53
<> 144:ef7eb2e8f9f7 54 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 55 extern "C" {
<> 144:ef7eb2e8f9f7 56 #endif
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 59 #include "stm32l4xx.h"
<> 144:ef7eb2e8f9f7 60
<> 144:ef7eb2e8f9f7 61 /** @addtogroup STM32L4xx_LL_Driver
<> 144:ef7eb2e8f9f7 62 * @{
<> 144:ef7eb2e8f9f7 63 */
<> 144:ef7eb2e8f9f7 64
<> 144:ef7eb2e8f9f7 65 /** @defgroup UTILS_LL UTILS
<> 144:ef7eb2e8f9f7 66 * @{
<> 144:ef7eb2e8f9f7 67 */
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 /* Private types -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 70 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 /* Private constants ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 73 /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants
<> 144:ef7eb2e8f9f7 74 * @{
<> 144:ef7eb2e8f9f7 75 */
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 /* Max delay can be used in LL_mDelay */
AnnaBridge 167:e84263d55307 78 #define LL_MAX_DELAY 0xFFFFFFFFU
<> 144:ef7eb2e8f9f7 79
<> 144:ef7eb2e8f9f7 80 /**
<> 144:ef7eb2e8f9f7 81 * @brief Unique device ID register base address
<> 144:ef7eb2e8f9f7 82 */
<> 144:ef7eb2e8f9f7 83 #define UID_BASE_ADDRESS UID_BASE
<> 144:ef7eb2e8f9f7 84
<> 144:ef7eb2e8f9f7 85 /**
<> 144:ef7eb2e8f9f7 86 * @brief Flash size data register base address
<> 144:ef7eb2e8f9f7 87 */
<> 144:ef7eb2e8f9f7 88 #define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE
<> 144:ef7eb2e8f9f7 89
<> 144:ef7eb2e8f9f7 90 /**
<> 144:ef7eb2e8f9f7 91 * @brief Package data register base address
<> 144:ef7eb2e8f9f7 92 */
<> 144:ef7eb2e8f9f7 93 #define PACKAGE_BASE_ADDRESS PACKAGE_BASE
<> 144:ef7eb2e8f9f7 94
<> 144:ef7eb2e8f9f7 95 /**
<> 144:ef7eb2e8f9f7 96 * @}
<> 144:ef7eb2e8f9f7 97 */
<> 144:ef7eb2e8f9f7 98
<> 144:ef7eb2e8f9f7 99 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 100 /** @defgroup UTILS_LL_Private_Macros UTILS Private Macros
<> 144:ef7eb2e8f9f7 101 * @{
<> 144:ef7eb2e8f9f7 102 */
<> 144:ef7eb2e8f9f7 103 /**
<> 144:ef7eb2e8f9f7 104 * @}
<> 144:ef7eb2e8f9f7 105 */
<> 144:ef7eb2e8f9f7 106 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 107 /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures
<> 144:ef7eb2e8f9f7 108 * @{
<> 144:ef7eb2e8f9f7 109 */
<> 144:ef7eb2e8f9f7 110 /**
<> 144:ef7eb2e8f9f7 111 * @brief UTILS PLL structure definition
<> 144:ef7eb2e8f9f7 112 */
<> 144:ef7eb2e8f9f7 113 typedef struct
<> 144:ef7eb2e8f9f7 114 {
<> 144:ef7eb2e8f9f7 115 uint32_t PLLM; /*!< Division factor for PLL VCO input clock.
<> 144:ef7eb2e8f9f7 116 This parameter can be a value of @ref RCC_LL_EC_PLLM_DIV
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 This feature can be modified afterwards using unitary function
<> 144:ef7eb2e8f9f7 119 @ref LL_RCC_PLL_ConfigDomain_SYS(). */
<> 144:ef7eb2e8f9f7 120
<> 144:ef7eb2e8f9f7 121 uint32_t PLLN; /*!< Multiplication factor for PLL VCO output clock.
AnnaBridge 167:e84263d55307 122 This parameter must be a number between Min_Data = 8 and Max_Data = 86
<> 144:ef7eb2e8f9f7 123
<> 144:ef7eb2e8f9f7 124 This feature can be modified afterwards using unitary function
<> 144:ef7eb2e8f9f7 125 @ref LL_RCC_PLL_ConfigDomain_SYS(). */
<> 144:ef7eb2e8f9f7 126
<> 144:ef7eb2e8f9f7 127 uint32_t PLLR; /*!< Division for the main system clock.
AnnaBridge 167:e84263d55307 128 This parameter can be a value of @ref RCC_LL_EC_PLLR_DIV
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 This feature can be modified afterwards using unitary function
<> 144:ef7eb2e8f9f7 131 @ref LL_RCC_PLL_ConfigDomain_SYS(). */
<> 144:ef7eb2e8f9f7 132 } LL_UTILS_PLLInitTypeDef;
<> 144:ef7eb2e8f9f7 133
<> 144:ef7eb2e8f9f7 134 /**
<> 144:ef7eb2e8f9f7 135 * @brief UTILS System, AHB and APB buses clock configuration structure definition
<> 144:ef7eb2e8f9f7 136 */
<> 144:ef7eb2e8f9f7 137 typedef struct
<> 144:ef7eb2e8f9f7 138 {
<> 144:ef7eb2e8f9f7 139 uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK).
<> 144:ef7eb2e8f9f7 140 This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV
<> 144:ef7eb2e8f9f7 141
<> 144:ef7eb2e8f9f7 142 This feature can be modified afterwards using unitary function
<> 144:ef7eb2e8f9f7 143 @ref LL_RCC_SetAHBPrescaler(). */
<> 144:ef7eb2e8f9f7 144
<> 144:ef7eb2e8f9f7 145 uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
<> 144:ef7eb2e8f9f7 146 This parameter can be a value of @ref RCC_LL_EC_APB1_DIV
<> 144:ef7eb2e8f9f7 147
<> 144:ef7eb2e8f9f7 148 This feature can be modified afterwards using unitary function
<> 144:ef7eb2e8f9f7 149 @ref LL_RCC_SetAPB1Prescaler(). */
<> 144:ef7eb2e8f9f7 150
<> 144:ef7eb2e8f9f7 151 uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK).
<> 144:ef7eb2e8f9f7 152 This parameter can be a value of @ref RCC_LL_EC_APB2_DIV
<> 144:ef7eb2e8f9f7 153
<> 144:ef7eb2e8f9f7 154 This feature can be modified afterwards using unitary function
<> 144:ef7eb2e8f9f7 155 @ref LL_RCC_SetAPB2Prescaler(). */
<> 144:ef7eb2e8f9f7 156
<> 144:ef7eb2e8f9f7 157 } LL_UTILS_ClkInitTypeDef;
<> 144:ef7eb2e8f9f7 158
<> 144:ef7eb2e8f9f7 159 /**
<> 144:ef7eb2e8f9f7 160 * @}
<> 144:ef7eb2e8f9f7 161 */
<> 144:ef7eb2e8f9f7 162
<> 144:ef7eb2e8f9f7 163 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 164 /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants
<> 144:ef7eb2e8f9f7 165 * @{
<> 144:ef7eb2e8f9f7 166 */
<> 144:ef7eb2e8f9f7 167
<> 144:ef7eb2e8f9f7 168 /** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation
<> 144:ef7eb2e8f9f7 169 * @{
<> 144:ef7eb2e8f9f7 170 */
AnnaBridge 167:e84263d55307 171 #define LL_UTILS_HSEBYPASS_OFF 0x00000000U /*!< HSE Bypass is not enabled */
AnnaBridge 167:e84263d55307 172 #define LL_UTILS_HSEBYPASS_ON 0x00000001U /*!< HSE Bypass is enabled */
<> 144:ef7eb2e8f9f7 173 /**
<> 144:ef7eb2e8f9f7 174 * @}
<> 144:ef7eb2e8f9f7 175 */
<> 144:ef7eb2e8f9f7 176
<> 144:ef7eb2e8f9f7 177 /** @defgroup UTILS_EC_PACKAGETYPE PACKAGE TYPE
<> 144:ef7eb2e8f9f7 178 * @{
<> 144:ef7eb2e8f9f7 179 */
AnnaBridge 167:e84263d55307 180 #define LL_UTILS_PACKAGETYPE_LQFP64 0x00000000U /*!< LQFP64 package type */
AnnaBridge 167:e84263d55307 181 #define LL_UTILS_PACKAGETYPE_WLCSP64 0x00000001U /*!< WLCSP64 package type */
AnnaBridge 167:e84263d55307 182 #define LL_UTILS_PACKAGETYPE_LQFP100 0x00000002U /*!< LQFP100 package type */
AnnaBridge 167:e84263d55307 183 #define LL_UTILS_PACKAGETYPE_BGA132 0x00000003U /*!< BGA132 package type */
AnnaBridge 167:e84263d55307 184 #define LL_UTILS_PACKAGETYPE_LQFP144_CSP72 0x00000004U /*!< LQFP144, WLCSP81 or WLCSP72 package type */
AnnaBridge 167:e84263d55307 185 #define LL_UTILS_PACKAGETYPE_UFQFPN32 0x00000008U /*!< UFQFPN32 package type */
AnnaBridge 167:e84263d55307 186 #define LL_UTILS_PACKAGETYPE_UFQFPN48 0x0000000AU /*!< UFQFPN48 package type */
AnnaBridge 167:e84263d55307 187 #define LL_UTILS_PACKAGETYPE_LQFP48 0x0000000BU /*!< LQFP48 package type */
AnnaBridge 167:e84263d55307 188 #define LL_UTILS_PACKAGETYPE_WLCSP49 0x0000000CU /*!< WLCSP49 package type */
AnnaBridge 167:e84263d55307 189 #define LL_UTILS_PACKAGETYPE_UFBGA64 0x0000000DU /*!< UFBGA64 package type */
AnnaBridge 167:e84263d55307 190 #define LL_UTILS_PACKAGETYPE_UFBGA100 0x0000000EU /*!< UFBGA100 package type */
AnnaBridge 167:e84263d55307 191 #define LL_UTILS_PACKAGETYPE_UFBGA169 0x00000010U /*!< UFBGA169 package type */
<> 144:ef7eb2e8f9f7 192 /**
<> 144:ef7eb2e8f9f7 193 * @}
<> 144:ef7eb2e8f9f7 194 */
<> 144:ef7eb2e8f9f7 195
<> 144:ef7eb2e8f9f7 196 /**
<> 144:ef7eb2e8f9f7 197 * @}
<> 144:ef7eb2e8f9f7 198 */
<> 144:ef7eb2e8f9f7 199
<> 144:ef7eb2e8f9f7 200 /* Exported macro ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 201
<> 144:ef7eb2e8f9f7 202 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 203 /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions
<> 144:ef7eb2e8f9f7 204 * @{
<> 144:ef7eb2e8f9f7 205 */
<> 144:ef7eb2e8f9f7 206
<> 144:ef7eb2e8f9f7 207 /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE
<> 144:ef7eb2e8f9f7 208 * @{
<> 144:ef7eb2e8f9f7 209 */
<> 144:ef7eb2e8f9f7 210
<> 144:ef7eb2e8f9f7 211 /**
<> 144:ef7eb2e8f9f7 212 * @brief Get Word0 of the unique device identifier (UID based on 96 bits)
<> 144:ef7eb2e8f9f7 213 * @retval UID[31:0]: X and Y coordinates on the wafer expressed in BCD format
<> 144:ef7eb2e8f9f7 214 */
<> 144:ef7eb2e8f9f7 215 __STATIC_INLINE uint32_t LL_GetUID_Word0(void)
<> 144:ef7eb2e8f9f7 216 {
<> 144:ef7eb2e8f9f7 217 return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS)));
<> 144:ef7eb2e8f9f7 218 }
<> 144:ef7eb2e8f9f7 219
<> 144:ef7eb2e8f9f7 220 /**
<> 144:ef7eb2e8f9f7 221 * @brief Get Word1 of the unique device identifier (UID based on 96 bits)
<> 144:ef7eb2e8f9f7 222 * @retval UID[63:32]: Wafer number (UID[39:32]) & LOT_NUM[23:0] (UID[63:40])
<> 144:ef7eb2e8f9f7 223 */
<> 144:ef7eb2e8f9f7 224 __STATIC_INLINE uint32_t LL_GetUID_Word1(void)
<> 144:ef7eb2e8f9f7 225 {
<> 144:ef7eb2e8f9f7 226 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U))));
<> 144:ef7eb2e8f9f7 227 }
<> 144:ef7eb2e8f9f7 228
<> 144:ef7eb2e8f9f7 229 /**
<> 144:ef7eb2e8f9f7 230 * @brief Get Word2 of the unique device identifier (UID based on 96 bits)
<> 144:ef7eb2e8f9f7 231 * @retval UID[95:64]: Lot number (ASCII encoded) - LOT_NUM[55:24]
<> 144:ef7eb2e8f9f7 232 */
<> 144:ef7eb2e8f9f7 233 __STATIC_INLINE uint32_t LL_GetUID_Word2(void)
<> 144:ef7eb2e8f9f7 234 {
<> 144:ef7eb2e8f9f7 235 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U))));
<> 144:ef7eb2e8f9f7 236 }
<> 144:ef7eb2e8f9f7 237
<> 144:ef7eb2e8f9f7 238 /**
<> 144:ef7eb2e8f9f7 239 * @brief Get Flash memory size
<> 144:ef7eb2e8f9f7 240 * @note This bitfield indicates the size of the device Flash memory expressed in
<> 144:ef7eb2e8f9f7 241 * Kbytes. As an example, 0x040 corresponds to 64 Kbytes.
<> 144:ef7eb2e8f9f7 242 * @retval FLASH_SIZE[15:0]: Flash memory size
<> 144:ef7eb2e8f9f7 243 */
<> 144:ef7eb2e8f9f7 244 __STATIC_INLINE uint32_t LL_GetFlashSize(void)
<> 144:ef7eb2e8f9f7 245 {
<> 144:ef7eb2e8f9f7 246 return (uint16_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)));
<> 144:ef7eb2e8f9f7 247 }
<> 144:ef7eb2e8f9f7 248
<> 144:ef7eb2e8f9f7 249 /**
<> 144:ef7eb2e8f9f7 250 * @brief Get Package type
<> 144:ef7eb2e8f9f7 251 * @retval Returned value can be one of the following values:
<> 144:ef7eb2e8f9f7 252 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP64 (*)
<> 144:ef7eb2e8f9f7 253 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP100 (*)
<> 144:ef7eb2e8f9f7 254 * @arg @ref LL_UTILS_PACKAGETYPE_BGA132 (*)
<> 144:ef7eb2e8f9f7 255 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP144_CSP72 (*)
<> 144:ef7eb2e8f9f7 256 * @arg @ref LL_UTILS_PACKAGETYPE_UFQFPN32 (*)
<> 144:ef7eb2e8f9f7 257 * @arg @ref LL_UTILS_PACKAGETYPE_UFQFPN48 (*)
<> 144:ef7eb2e8f9f7 258 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP48 (*)
<> 144:ef7eb2e8f9f7 259 * @arg @ref LL_UTILS_PACKAGETYPE_WLCSP49 (*)
<> 144:ef7eb2e8f9f7 260 * @arg @ref LL_UTILS_PACKAGETYPE_UFBGA64 (*)
<> 144:ef7eb2e8f9f7 261 * @arg @ref LL_UTILS_PACKAGETYPE_UFBGA100 (*)
AnnaBridge 167:e84263d55307 262 * @arg @ref LL_UTILS_PACKAGETYPE_UFBGA169 (*)
<> 144:ef7eb2e8f9f7 263 *
<> 144:ef7eb2e8f9f7 264 * (*) value not defined in all devices.
<> 144:ef7eb2e8f9f7 265 */
<> 144:ef7eb2e8f9f7 266 __STATIC_INLINE uint32_t LL_GetPackageType(void)
<> 144:ef7eb2e8f9f7 267 {
AnnaBridge 167:e84263d55307 268 return (uint8_t)(READ_REG(*((uint32_t *)PACKAGE_BASE_ADDRESS)) & 0x1FU);
<> 144:ef7eb2e8f9f7 269 }
<> 144:ef7eb2e8f9f7 270
<> 144:ef7eb2e8f9f7 271 /**
<> 144:ef7eb2e8f9f7 272 * @}
<> 144:ef7eb2e8f9f7 273 */
<> 144:ef7eb2e8f9f7 274
<> 144:ef7eb2e8f9f7 275 /** @defgroup UTILS_LL_EF_DELAY DELAY
<> 144:ef7eb2e8f9f7 276 * @{
<> 144:ef7eb2e8f9f7 277 */
<> 144:ef7eb2e8f9f7 278
<> 144:ef7eb2e8f9f7 279 /**
<> 144:ef7eb2e8f9f7 280 * @brief This function configures the Cortex-M SysTick source of the time base.
<> 144:ef7eb2e8f9f7 281 * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
<> 144:ef7eb2e8f9f7 282 * @note When a RTOS is used, it is recommended to avoid changing the SysTick
<> 144:ef7eb2e8f9f7 283 * configuration by calling this function, for a delay use rather osDelay RTOS service.
<> 144:ef7eb2e8f9f7 284 * @param Ticks Number of ticks
<> 144:ef7eb2e8f9f7 285 * @retval None
<> 144:ef7eb2e8f9f7 286 */
<> 144:ef7eb2e8f9f7 287 __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
<> 144:ef7eb2e8f9f7 288 {
<> 144:ef7eb2e8f9f7 289 /* Configure the SysTick to have interrupt in 1ms time base */
<> 144:ef7eb2e8f9f7 290 SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */
<> 144:ef7eb2e8f9f7 291 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
<> 144:ef7eb2e8f9f7 292 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
<> 144:ef7eb2e8f9f7 293 SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */
<> 144:ef7eb2e8f9f7 294 }
<> 144:ef7eb2e8f9f7 295
<> 144:ef7eb2e8f9f7 296 void LL_Init1msTick(uint32_t HCLKFrequency);
<> 144:ef7eb2e8f9f7 297 void LL_mDelay(uint32_t Delay);
<> 144:ef7eb2e8f9f7 298
<> 144:ef7eb2e8f9f7 299 /**
<> 144:ef7eb2e8f9f7 300 * @}
<> 144:ef7eb2e8f9f7 301 */
<> 144:ef7eb2e8f9f7 302
<> 144:ef7eb2e8f9f7 303 /** @defgroup UTILS_EF_SYSTEM SYSTEM
<> 144:ef7eb2e8f9f7 304 * @{
<> 144:ef7eb2e8f9f7 305 */
<> 144:ef7eb2e8f9f7 306
<> 144:ef7eb2e8f9f7 307 void LL_SetSystemCoreClock(uint32_t HCLKFrequency);
<> 144:ef7eb2e8f9f7 308 ErrorStatus LL_PLL_ConfigSystemClock_MSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
<> 144:ef7eb2e8f9f7 309 LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
<> 144:ef7eb2e8f9f7 310 ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
<> 144:ef7eb2e8f9f7 311 LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
<> 144:ef7eb2e8f9f7 312 ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass,
<> 144:ef7eb2e8f9f7 313 LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
<> 144:ef7eb2e8f9f7 314
<> 144:ef7eb2e8f9f7 315 /**
<> 144:ef7eb2e8f9f7 316 * @}
<> 144:ef7eb2e8f9f7 317 */
<> 144:ef7eb2e8f9f7 318
<> 144:ef7eb2e8f9f7 319 /**
<> 144:ef7eb2e8f9f7 320 * @}
<> 144:ef7eb2e8f9f7 321 */
<> 144:ef7eb2e8f9f7 322
<> 144:ef7eb2e8f9f7 323 /**
<> 144:ef7eb2e8f9f7 324 * @}
<> 144:ef7eb2e8f9f7 325 */
<> 144:ef7eb2e8f9f7 326
<> 144:ef7eb2e8f9f7 327 /**
<> 144:ef7eb2e8f9f7 328 * @}
<> 144:ef7eb2e8f9f7 329 */
<> 144:ef7eb2e8f9f7 330
<> 144:ef7eb2e8f9f7 331 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 332 }
<> 144:ef7eb2e8f9f7 333 #endif
<> 144:ef7eb2e8f9f7 334
<> 144:ef7eb2e8f9f7 335 #endif /* __STM32L4xx_LL_UTILS_H */
<> 144:ef7eb2e8f9f7 336
<> 144:ef7eb2e8f9f7 337 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/