Tux Leon / mbed-dev

mbed library sources. Supersedes mbed-src.

Fork of mbed-dev by mbed official

targets/TARGET_RENESAS/TARGET_VK_RZ_A1H/us_ticker.c@181:96ed750bd169, 2018-01-17 (annotated)

Committer:
Anna Bridge
Date:
Wed Jan 17 15:23:54 2018 +0000
Revision:
181:96ed750bd169
Parent:
174:b96e65c34a4d 
mbed-dev libray. Release version 158

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 119:3921aeca8633 1 /* mbed Microcontroller Library
mbed_official 119:3921aeca8633 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 119:3921aeca8633 3 *
mbed_official 119:3921aeca8633 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 119:3921aeca8633 5 * you may not use this file except in compliance with the License.
mbed_official 119:3921aeca8633 6 * You may obtain a copy of the License at
mbed_official 119:3921aeca8633 7 *
mbed_official 119:3921aeca8633 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 119:3921aeca8633 9 *
mbed_official 119:3921aeca8633 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 119:3921aeca8633 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 119:3921aeca8633 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 119:3921aeca8633 13 * See the License for the specific language governing permissions and
mbed_official 119:3921aeca8633 14 * limitations under the License.
mbed_official 119:3921aeca8633 15 */
mbed_official 119:3921aeca8633 16 #include <stddef.h>
mbed_official 119:3921aeca8633 17 #include "us_ticker_api.h"
mbed_official 119:3921aeca8633 18 #include "PeripheralNames.h"
mbed_official 119:3921aeca8633 19 #include "ostm_iodefine.h"
mbed_official 119:3921aeca8633 20
mbed_official 119:3921aeca8633 21 #include "RZ_A1_Init.h"
mbed_official 119:3921aeca8633 22 #include "VKRZA1H.h"
Anna Bridge 181:96ed750bd169 23 #include "mbed_critical.h"
mbed_official 119:3921aeca8633 24
mbed_official 119:3921aeca8633 25 #define US_TICKER_TIMER_IRQn (OSTMI1TINT_IRQn)
mbed_official 119:3921aeca8633 26 #define CPG_STBCR5_BIT_MSTP50 (0x01u) /* OSTM1 */
mbed_official 119:3921aeca8633 27
mbed_official 119:3921aeca8633 28 #define US_TICKER_CLOCK_US_DEV (1000000)
mbed_official 119:3921aeca8633 29
mbed_official 119:3921aeca8633 30 int us_ticker_inited = 0;
mbed_official 119:3921aeca8633 31 static double count_clock = 0;
mbed_official 119:3921aeca8633 32 static uint32_t last_read = 0;
mbed_official 119:3921aeca8633 33 static uint32_t wrap_arround = 0;
mbed_official 119:3921aeca8633 34 static uint64_t ticker_us_last64 = 0;
mbed_official 119:3921aeca8633 35
mbed_official 119:3921aeca8633 36 void us_ticker_interrupt(void) {
mbed_official 119:3921aeca8633 37 us_ticker_irq_handler();
mbed_official 119:3921aeca8633 38 }
mbed_official 119:3921aeca8633 39
mbed_official 119:3921aeca8633 40 void us_ticker_init(void) {
mbed_official 119:3921aeca8633 41 if (us_ticker_inited) return;
mbed_official 119:3921aeca8633 42 us_ticker_inited = 1;
mbed_official 119:3921aeca8633 43
mbed_official 119:3921aeca8633 44 /* set Counter Clock(us) */
mbed_official 119:3921aeca8633 45 if (false == RZ_A1_IsClockMode0()) {
mbed_official 119:3921aeca8633 46 count_clock = ((double)CM1_RENESAS_RZ_A1_P0_CLK / (double)US_TICKER_CLOCK_US_DEV);
mbed_official 119:3921aeca8633 47 } else {
mbed_official 119:3921aeca8633 48 count_clock = ((double)CM0_RENESAS_RZ_A1_P0_CLK / (double)US_TICKER_CLOCK_US_DEV);
mbed_official 119:3921aeca8633 49 }
mbed_official 119:3921aeca8633 50
mbed_official 119:3921aeca8633 51 /* Power Control for Peripherals */
mbed_official 119:3921aeca8633 52 CPGSTBCR5 &= ~(CPG_STBCR5_BIT_MSTP50); /* enable OSTM1 clock */
mbed_official 119:3921aeca8633 53
mbed_official 119:3921aeca8633 54 // timer settings
mbed_official 119:3921aeca8633 55 OSTM1TT = 0x01; /* Stop the counter and clears the OSTM1TE bit. */
mbed_official 119:3921aeca8633 56 OSTM1CTL = 0x02; /* Free running timer mode. Interrupt disabled when star counter */
mbed_official 119:3921aeca8633 57
mbed_official 119:3921aeca8633 58 OSTM1TS = 0x1; /* Start the counter and sets the OSTM0TE bit. */
mbed_official 119:3921aeca8633 59
mbed_official 119:3921aeca8633 60 // INTC settings
mbed_official 119:3921aeca8633 61 InterruptHandlerRegister(US_TICKER_TIMER_IRQn, (void (*)(uint32_t))us_ticker_interrupt);
mbed_official 119:3921aeca8633 62 GIC_SetPriority(US_TICKER_TIMER_IRQn, 5);
mbed_official 119:3921aeca8633 63 GIC_EnableIRQ(US_TICKER_TIMER_IRQn);
mbed_official 119:3921aeca8633 64 }
mbed_official 119:3921aeca8633 65
mbed_official 119:3921aeca8633 66 static uint64_t ticker_read_counter64(void) {
mbed_official 119:3921aeca8633 67 uint32_t cnt_val;
mbed_official 119:3921aeca8633 68 uint64_t cnt_val64;
mbed_official 119:3921aeca8633 69
mbed_official 119:3921aeca8633 70 if (!us_ticker_inited)
mbed_official 119:3921aeca8633 71 us_ticker_init();
mbed_official 119:3921aeca8633 72
mbed_official 119:3921aeca8633 73 /* read counter */
mbed_official 119:3921aeca8633 74 cnt_val = OSTM1CNT;
mbed_official 119:3921aeca8633 75 if (last_read > cnt_val) {
mbed_official 119:3921aeca8633 76 wrap_arround++;
mbed_official 119:3921aeca8633 77 }
mbed_official 119:3921aeca8633 78 last_read = cnt_val;
mbed_official 119:3921aeca8633 79 cnt_val64 = ((uint64_t)wrap_arround << 32) + cnt_val;
mbed_official 119:3921aeca8633 80
mbed_official 119:3921aeca8633 81 return cnt_val64;
mbed_official 119:3921aeca8633 82 }
mbed_official 119:3921aeca8633 83
mbed_official 119:3921aeca8633 84 uint32_t us_ticker_read() {
mbed_official 119:3921aeca8633 85 uint64_t cnt_val64;
mbed_official 119:3921aeca8633 86 uint64_t us_val64;
mbed_official 119:3921aeca8633 87
Anna Bridge 181:96ed750bd169 88 core_util_critical_section_enter();
mbed_official 119:3921aeca8633 89
mbed_official 119:3921aeca8633 90 cnt_val64 = ticker_read_counter64();
mbed_official 119:3921aeca8633 91 us_val64 = (cnt_val64 / count_clock);
mbed_official 119:3921aeca8633 92 ticker_us_last64 = us_val64;
mbed_official 119:3921aeca8633 93
Anna Bridge 181:96ed750bd169 94 core_util_critical_section_exit();
mbed_official 119:3921aeca8633 95 /* clock to us */
mbed_official 119:3921aeca8633 96 return (uint32_t)us_val64;
mbed_official 119:3921aeca8633 97 }
mbed_official 119:3921aeca8633 98
mbed_official 119:3921aeca8633 99 void us_ticker_set_interrupt(timestamp_t timestamp) {
mbed_official 119:3921aeca8633 100 // set match value
mbed_official 119:3921aeca8633 101 uint64_t timestamp64;
mbed_official 119:3921aeca8633 102 uint64_t set_cmp_val64;
mbed_official 119:3921aeca8633 103 volatile uint32_t set_cmp_val;
mbed_official 119:3921aeca8633 104 uint64_t count_val_64;
mbed_official 119:3921aeca8633 105
mbed_official 119:3921aeca8633 106 /* calc compare mach timestamp */
mbed_official 119:3921aeca8633 107 timestamp64 = (ticker_us_last64 & 0xFFFFFFFF00000000) + timestamp;
mbed_official 119:3921aeca8633 108 if (timestamp < (ticker_us_last64 & 0x00000000FFFFFFFF)) {
mbed_official 119:3921aeca8633 109 /* This event is wrap arround */
mbed_official 119:3921aeca8633 110 timestamp64 += 0x100000000;
mbed_official 119:3921aeca8633 111 }
mbed_official 119:3921aeca8633 112
mbed_official 119:3921aeca8633 113 /* calc compare mach timestamp */
mbed_official 119:3921aeca8633 114 set_cmp_val64 = timestamp64 * count_clock;
mbed_official 119:3921aeca8633 115 set_cmp_val = (uint32_t)(set_cmp_val64 & 0x00000000FFFFFFFF);
mbed_official 119:3921aeca8633 116 count_val_64 = ticker_read_counter64();
mbed_official 119:3921aeca8633 117 if (set_cmp_val64 <= (count_val_64 + 500)) {
mbed_official 119:3921aeca8633 118 GIC_SetPendingIRQ(US_TICKER_TIMER_IRQn);
mbed_official 119:3921aeca8633 119 GIC_EnableIRQ(US_TICKER_TIMER_IRQn);
mbed_official 119:3921aeca8633 120 return;
mbed_official 119:3921aeca8633 121 }
mbed_official 119:3921aeca8633 122 OSTM1CMP = set_cmp_val;
mbed_official 119:3921aeca8633 123 GIC_EnableIRQ(US_TICKER_TIMER_IRQn);
mbed_official 119:3921aeca8633 124 }
mbed_official 119:3921aeca8633 125
AnnaBridge 174:b96e65c34a4d 126 void us_ticker_fire_interrupt(void) {
AnnaBridge 174:b96e65c34a4d 127 GIC_SetPendingIRQ(US_TICKER_TIMER_IRQn);
AnnaBridge 174:b96e65c34a4d 128 }
AnnaBridge 174:b96e65c34a4d 129
mbed_official 119:3921aeca8633 130 void us_ticker_disable_interrupt(void) {
mbed_official 119:3921aeca8633 131 GIC_DisableIRQ(US_TICKER_TIMER_IRQn);
mbed_official 119:3921aeca8633 132 }
mbed_official 119:3921aeca8633 133
mbed_official 119:3921aeca8633 134 void us_ticker_clear_interrupt(void) {
mbed_official 119:3921aeca8633 135 GIC_ClearPendingIRQ(US_TICKER_TIMER_IRQn);
mbed_official 119:3921aeca8633 136 }