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targets/TARGET_NUVOTON/TARGET_M480/device/StdDriver/m480_crc.h@172:7d866c31b3c5, 2017-08-31 (annotated)

Committer:
AnnaBridge
Date:
Thu Aug 31 17:27:04 2017 +0100
Revision:
172:7d866c31b3c5
This updates the lib to the mbed lib v 150

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 172:7d866c31b3c5 1 /**************************************************************************//**
AnnaBridge 172:7d866c31b3c5 2 * @file crc.h
AnnaBridge 172:7d866c31b3c5 3 * @version V1.00
AnnaBridge 172:7d866c31b3c5 4 * @brief M480 series CRC driver header file
AnnaBridge 172:7d866c31b3c5 5 *
AnnaBridge 172:7d866c31b3c5 6 * @copyright (C) 2016 Nuvoton Technology Corp. All rights reserved.
AnnaBridge 172:7d866c31b3c5 7 *****************************************************************************/
AnnaBridge 172:7d866c31b3c5 8 #ifndef __CRC_H__
AnnaBridge 172:7d866c31b3c5 9 #define __CRC_H__
AnnaBridge 172:7d866c31b3c5 10
AnnaBridge 172:7d866c31b3c5 11 #ifdef __cplusplus
AnnaBridge 172:7d866c31b3c5 12 extern "C"
AnnaBridge 172:7d866c31b3c5 13 {
AnnaBridge 172:7d866c31b3c5 14 #endif
AnnaBridge 172:7d866c31b3c5 15
AnnaBridge 172:7d866c31b3c5 16
AnnaBridge 172:7d866c31b3c5 17 /** @addtogroup M480_Device_Driver M480 Device Driver
AnnaBridge 172:7d866c31b3c5 18 @{
AnnaBridge 172:7d866c31b3c5 19 */
AnnaBridge 172:7d866c31b3c5 20
AnnaBridge 172:7d866c31b3c5 21 /** @addtogroup M480_CRC_Driver CRC Driver
AnnaBridge 172:7d866c31b3c5 22 @{
AnnaBridge 172:7d866c31b3c5 23 */
AnnaBridge 172:7d866c31b3c5 24
AnnaBridge 172:7d866c31b3c5 25 /** @addtogroup M480_CRC_EXPORTED_CONSTANTS CRC Exported Constants
AnnaBridge 172:7d866c31b3c5 26 @{
AnnaBridge 172:7d866c31b3c5 27 */
AnnaBridge 172:7d866c31b3c5 28 /*---------------------------------------------------------------------------------------------------------*/
AnnaBridge 172:7d866c31b3c5 29 /* CRC Polynomial Mode Constant Definitions */
AnnaBridge 172:7d866c31b3c5 30 /*---------------------------------------------------------------------------------------------------------*/
AnnaBridge 172:7d866c31b3c5 31 #define CRC_CCITT (0UL << CRC_CTL_CRCMODE_Pos) /*!<CRC Polynomial Mode - CCITT \hideinitializer */
AnnaBridge 172:7d866c31b3c5 32 #define CRC_8 (1UL << CRC_CTL_CRCMODE_Pos) /*!<CRC Polynomial Mode - CRC8 \hideinitializer */
AnnaBridge 172:7d866c31b3c5 33 #define CRC_16 (2UL << CRC_CTL_CRCMODE_Pos) /*!<CRC Polynomial Mode - CRC16 \hideinitializer */
AnnaBridge 172:7d866c31b3c5 34 #define CRC_32 (3UL << CRC_CTL_CRCMODE_Pos) /*!<CRC Polynomial Mode - CRC32 \hideinitializer */
AnnaBridge 172:7d866c31b3c5 35
AnnaBridge 172:7d866c31b3c5 36 /*---------------------------------------------------------------------------------------------------------*/
AnnaBridge 172:7d866c31b3c5 37 /* Checksum, Write data Constant Definitions */
AnnaBridge 172:7d866c31b3c5 38 /*---------------------------------------------------------------------------------------------------------*/
AnnaBridge 172:7d866c31b3c5 39 #define CRC_CHECKSUM_COM (CRC_CTL_CHKSFMT_Msk) /*!<CRC Checksum Complement \hideinitializer */
AnnaBridge 172:7d866c31b3c5 40 #define CRC_CHECKSUM_RVS (CRC_CTL_CHKSREV_Msk) /*!<CRC Checksum Reverse \hideinitializer */
AnnaBridge 172:7d866c31b3c5 41 #define CRC_WDATA_COM (CRC_CTL_DATFMT_Msk) /*!<CRC Write Data Complement \hideinitializer */
AnnaBridge 172:7d866c31b3c5 42 #define CRC_WDATA_RVS (CRC_CTL_DATREV_Msk) /*!<CRC Write Data Reverse \hideinitializer */
AnnaBridge 172:7d866c31b3c5 43
AnnaBridge 172:7d866c31b3c5 44 /*---------------------------------------------------------------------------------------------------------*/
AnnaBridge 172:7d866c31b3c5 45 /* CPU Write Data Length Constant Definitions */
AnnaBridge 172:7d866c31b3c5 46 /*---------------------------------------------------------------------------------------------------------*/
AnnaBridge 172:7d866c31b3c5 47 #define CRC_CPU_WDATA_8 (0UL << CRC_CTL_DATLEN_Pos) /*!<CRC CPU Write Data length is 8-bit \hideinitializer */
AnnaBridge 172:7d866c31b3c5 48 #define CRC_CPU_WDATA_16 (1UL << CRC_CTL_DATLEN_Pos) /*!<CRC CPU Write Data length is 16-bit \hideinitializer */
AnnaBridge 172:7d866c31b3c5 49 #define CRC_CPU_WDATA_32 (2UL << CRC_CTL_DATLEN_Pos) /*!<CRC CPU Write Data length is 32-bit \hideinitializer */
AnnaBridge 172:7d866c31b3c5 50
AnnaBridge 172:7d866c31b3c5 51 /*@}*/ /* end of group M480_CRC_EXPORTED_CONSTANTS */
AnnaBridge 172:7d866c31b3c5 52
AnnaBridge 172:7d866c31b3c5 53
AnnaBridge 172:7d866c31b3c5 54 /** @addtogroup M480_CRC_EXPORTED_FUNCTIONS CRC Exported Functions
AnnaBridge 172:7d866c31b3c5 55 @{
AnnaBridge 172:7d866c31b3c5 56 */
AnnaBridge 172:7d866c31b3c5 57
AnnaBridge 172:7d866c31b3c5 58 /**
AnnaBridge 172:7d866c31b3c5 59 * @brief Set CRC Seed Value
AnnaBridge 172:7d866c31b3c5 60 *
AnnaBridge 172:7d866c31b3c5 61 * @param[in] u32Seed Seed value
AnnaBridge 172:7d866c31b3c5 62 *
AnnaBridge 172:7d866c31b3c5 63 * @return None
AnnaBridge 172:7d866c31b3c5 64 *
AnnaBridge 172:7d866c31b3c5 65 * @details This macro is used to set CRC seed value.
AnnaBridge 172:7d866c31b3c5 66 *
AnnaBridge 172:7d866c31b3c5 67 * @note User must to perform CRC_CHKSINIT(CRC_CTL[1] CRC Engine Reset) to reload the new seed value
AnnaBridge 172:7d866c31b3c5 68 * to CRC controller.
AnnaBridge 172:7d866c31b3c5 69 * \hideinitializer
AnnaBridge 172:7d866c31b3c5 70 */
AnnaBridge 172:7d866c31b3c5 71 #define CRC_SET_SEED(u32Seed) do{ CRC->SEED = (u32Seed); CRC->CTL |= CRC_CTL_CHKSINIT_Msk; }while(0)
AnnaBridge 172:7d866c31b3c5 72
AnnaBridge 172:7d866c31b3c5 73 /**
AnnaBridge 172:7d866c31b3c5 74 * @brief Get CRC Seed Value
AnnaBridge 172:7d866c31b3c5 75 *
AnnaBridge 172:7d866c31b3c5 76 * @param None
AnnaBridge 172:7d866c31b3c5 77 *
AnnaBridge 172:7d866c31b3c5 78 * @return CRC seed value
AnnaBridge 172:7d866c31b3c5 79 *
AnnaBridge 172:7d866c31b3c5 80 * @details This macro gets the current CRC seed value.
AnnaBridge 172:7d866c31b3c5 81 * \hideinitializer
AnnaBridge 172:7d866c31b3c5 82 */
AnnaBridge 172:7d866c31b3c5 83 #define CRC_GET_SEED() (CRC->SEED)
AnnaBridge 172:7d866c31b3c5 84
AnnaBridge 172:7d866c31b3c5 85 /**
AnnaBridge 172:7d866c31b3c5 86 * @brief CRC Write Data
AnnaBridge 172:7d866c31b3c5 87 *
AnnaBridge 172:7d866c31b3c5 88 * @param[in] u32Data Write data
AnnaBridge 172:7d866c31b3c5 89 *
AnnaBridge 172:7d866c31b3c5 90 * @return None
AnnaBridge 172:7d866c31b3c5 91 *
AnnaBridge 172:7d866c31b3c5 92 * @details User can write data directly to CRC Write Data Register(CRC_DAT) by this macro to perform CRC operation.
AnnaBridge 172:7d866c31b3c5 93 * \hideinitializer
AnnaBridge 172:7d866c31b3c5 94 */
AnnaBridge 172:7d866c31b3c5 95 #define CRC_WRITE_DATA(u32Data) (CRC->DAT = (u32Data))
AnnaBridge 172:7d866c31b3c5 96
AnnaBridge 172:7d866c31b3c5 97 void CRC_Open(uint32_t u32Mode, uint32_t u32Attribute, uint32_t u32Seed, uint32_t u32DataLen);
AnnaBridge 172:7d866c31b3c5 98 uint32_t CRC_GetChecksum(void);
AnnaBridge 172:7d866c31b3c5 99
AnnaBridge 172:7d866c31b3c5 100 /*@}*/ /* end of group M480_CRC_EXPORTED_FUNCTIONS */
AnnaBridge 172:7d866c31b3c5 101
AnnaBridge 172:7d866c31b3c5 102 /*@}*/ /* end of group M480_CRC_Driver */
AnnaBridge 172:7d866c31b3c5 103
AnnaBridge 172:7d866c31b3c5 104 /*@}*/ /* end of group M480_Device_Driver */
AnnaBridge 172:7d866c31b3c5 105
AnnaBridge 172:7d866c31b3c5 106 #ifdef __cplusplus
AnnaBridge 172:7d866c31b3c5 107 }
AnnaBridge 172:7d866c31b3c5 108 #endif
AnnaBridge 172:7d866c31b3c5 109
AnnaBridge 172:7d866c31b3c5 110 #endif
AnnaBridge 172:7d866c31b3c5 111
AnnaBridge 172:7d866c31b3c5 112 /*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/