Krittapong Pohdoy / MFRC522

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Dependents:   Integrate_All

MFRC522.cpp@0:879cf546d390, 2018-12-16 (annotated)

Committer:
Tezcorp
Date:
Sun Dec 16 19:40:03 2018 +0000
Revision:
0:879cf546d390
BBB

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Tezcorp 0:879cf546d390 1 /*
Tezcorp 0:879cf546d390 2 * MFRC522.cpp - Library to use ARDUINO RFID MODULE KIT 13.56 MHZ WITH TAGS SPI W AND R BY COOQROBOT.
Tezcorp 0:879cf546d390 3 * _Please_ see the comments in MFRC522.h - they give useful hints and background.
Tezcorp 0:879cf546d390 4 * Released into the public domain.
Tezcorp 0:879cf546d390 5 */
Tezcorp 0:879cf546d390 6
Tezcorp 0:879cf546d390 7 #include "MFRC522.h"
Tezcorp 0:879cf546d390 8
Tezcorp 0:879cf546d390 9 static const char* const _TypeNamePICC[] =
Tezcorp 0:879cf546d390 10 {
Tezcorp 0:879cf546d390 11 "Unknown type",
Tezcorp 0:879cf546d390 12 "PICC compliant with ISO/IEC 14443-4",
Tezcorp 0:879cf546d390 13 "PICC compliant with ISO/IEC 18092 (NFC)",
Tezcorp 0:879cf546d390 14 "MIFARE Mini, 320 bytes",
Tezcorp 0:879cf546d390 15 "MIFARE 1KB",
Tezcorp 0:879cf546d390 16 "MIFARE 4KB",
Tezcorp 0:879cf546d390 17 "MIFARE Ultralight or Ultralight C",
Tezcorp 0:879cf546d390 18 "MIFARE Plus",
Tezcorp 0:879cf546d390 19 "MIFARE TNP3XXX",
Tezcorp 0:879cf546d390 20
Tezcorp 0:879cf546d390 21 /* not complete UID */
Tezcorp 0:879cf546d390 22 "SAK indicates UID is not complete"
Tezcorp 0:879cf546d390 23 };
Tezcorp 0:879cf546d390 24
Tezcorp 0:879cf546d390 25 static const char* const _ErrorMessage[] =
Tezcorp 0:879cf546d390 26 {
Tezcorp 0:879cf546d390 27 "Unknown error",
Tezcorp 0:879cf546d390 28 "Success",
Tezcorp 0:879cf546d390 29 "Error in communication",
Tezcorp 0:879cf546d390 30 "Collision detected",
Tezcorp 0:879cf546d390 31 "Timeout in communication",
Tezcorp 0:879cf546d390 32 "A buffer is not big enough",
Tezcorp 0:879cf546d390 33 "Internal error in the code, should not happen",
Tezcorp 0:879cf546d390 34 "Invalid argument",
Tezcorp 0:879cf546d390 35 "The CRC_A does not match",
Tezcorp 0:879cf546d390 36 "A MIFARE PICC responded with NAK"
Tezcorp 0:879cf546d390 37 };
Tezcorp 0:879cf546d390 38
Tezcorp 0:879cf546d390 39 #define MFRC522_MaxPICCs (sizeof(_TypeNamePICC)/sizeof(_TypeNamePICC[0]))
Tezcorp 0:879cf546d390 40 #define MFRC522_MaxError (sizeof(_ErrorMessage)/sizeof(_ErrorMessage[0]))
Tezcorp 0:879cf546d390 41
Tezcorp 0:879cf546d390 42 /////////////////////////////////////////////////////////////////////////////////////
Tezcorp 0:879cf546d390 43 // Functions for setting up the driver
Tezcorp 0:879cf546d390 44 /////////////////////////////////////////////////////////////////////////////////////
Tezcorp 0:879cf546d390 45
Tezcorp 0:879cf546d390 46 /**
Tezcorp 0:879cf546d390 47 * Constructor.
Tezcorp 0:879cf546d390 48 * Prepares the output pins.
Tezcorp 0:879cf546d390 49 */
Tezcorp 0:879cf546d390 50 MFRC522::MFRC522(PinName mosi,
Tezcorp 0:879cf546d390 51 PinName miso,
Tezcorp 0:879cf546d390 52 PinName sclk,
Tezcorp 0:879cf546d390 53 PinName cs,
Tezcorp 0:879cf546d390 54 PinName reset) : m_SPI(mosi, miso, sclk), m_CS(cs), m_RESET(reset)
Tezcorp 0:879cf546d390 55 {
Tezcorp 0:879cf546d390 56 /* Configure SPI bus */
Tezcorp 0:879cf546d390 57 m_SPI.format(8, 0);
Tezcorp 0:879cf546d390 58 m_SPI.frequency(8000000);
Tezcorp 0:879cf546d390 59
Tezcorp 0:879cf546d390 60 /* Release SPI-CS pin */
Tezcorp 0:879cf546d390 61 m_CS = 1;
Tezcorp 0:879cf546d390 62
Tezcorp 0:879cf546d390 63 /* Release RESET pin */
Tezcorp 0:879cf546d390 64 m_RESET = 1;
Tezcorp 0:879cf546d390 65 } // End constructor
Tezcorp 0:879cf546d390 66
Tezcorp 0:879cf546d390 67
Tezcorp 0:879cf546d390 68 /**
Tezcorp 0:879cf546d390 69 * Destructor.
Tezcorp 0:879cf546d390 70 */
Tezcorp 0:879cf546d390 71 MFRC522::~MFRC522()
Tezcorp 0:879cf546d390 72 {
Tezcorp 0:879cf546d390 73
Tezcorp 0:879cf546d390 74 }
Tezcorp 0:879cf546d390 75
Tezcorp 0:879cf546d390 76
Tezcorp 0:879cf546d390 77 /////////////////////////////////////////////////////////////////////////////////////
Tezcorp 0:879cf546d390 78 // Basic interface functions for communicating with the MFRC522
Tezcorp 0:879cf546d390 79 /////////////////////////////////////////////////////////////////////////////////////
Tezcorp 0:879cf546d390 80
Tezcorp 0:879cf546d390 81 /**
Tezcorp 0:879cf546d390 82 * Writes a byte to the specified register in the MFRC522 chip.
Tezcorp 0:879cf546d390 83 * The interface is described in the datasheet section 8.1.2.
Tezcorp 0:879cf546d390 84 */
Tezcorp 0:879cf546d390 85 void MFRC522::PCD_WriteRegister(uint8_t reg, uint8_t value)
Tezcorp 0:879cf546d390 86 {
Tezcorp 0:879cf546d390 87 m_CS = 0; /* Select SPI Chip MFRC522 */
Tezcorp 0:879cf546d390 88
Tezcorp 0:879cf546d390 89 // MSB == 0 is for writing. LSB is not used in address. Datasheet section 8.1.2.3.
Tezcorp 0:879cf546d390 90 (void) m_SPI.write(reg & 0x7E);
Tezcorp 0:879cf546d390 91 (void) m_SPI.write(value);
Tezcorp 0:879cf546d390 92
Tezcorp 0:879cf546d390 93 m_CS = 1; /* Release SPI Chip MFRC522 */
Tezcorp 0:879cf546d390 94 } // End PCD_WriteRegister()
Tezcorp 0:879cf546d390 95
Tezcorp 0:879cf546d390 96 /**
Tezcorp 0:879cf546d390 97 * Writes a number of bytes to the specified register in the MFRC522 chip.
Tezcorp 0:879cf546d390 98 * The interface is described in the datasheet section 8.1.2.
Tezcorp 0:879cf546d390 99 */
Tezcorp 0:879cf546d390 100 void MFRC522::PCD_WriteRegister(uint8_t reg, uint8_t count, uint8_t *values)
Tezcorp 0:879cf546d390 101 {
Tezcorp 0:879cf546d390 102 m_CS = 0; /* Select SPI Chip MFRC522 */
Tezcorp 0:879cf546d390 103
Tezcorp 0:879cf546d390 104 // MSB == 0 is for writing. LSB is not used in address. Datasheet section 8.1.2.3.
Tezcorp 0:879cf546d390 105 (void) m_SPI.write(reg & 0x7E);
Tezcorp 0:879cf546d390 106 for (uint8_t index = 0; index < count; index++)
Tezcorp 0:879cf546d390 107 {
Tezcorp 0:879cf546d390 108 (void) m_SPI.write(values[index]);
Tezcorp 0:879cf546d390 109 }
Tezcorp 0:879cf546d390 110
Tezcorp 0:879cf546d390 111 m_CS = 1; /* Release SPI Chip MFRC522 */
Tezcorp 0:879cf546d390 112 } // End PCD_WriteRegister()
Tezcorp 0:879cf546d390 113
Tezcorp 0:879cf546d390 114 /**
Tezcorp 0:879cf546d390 115 * Reads a byte from the specified register in the MFRC522 chip.
Tezcorp 0:879cf546d390 116 * The interface is described in the datasheet section 8.1.2.
Tezcorp 0:879cf546d390 117 */
Tezcorp 0:879cf546d390 118 uint8_t MFRC522::PCD_ReadRegister(uint8_t reg)
Tezcorp 0:879cf546d390 119 {
Tezcorp 0:879cf546d390 120 uint8_t value;
Tezcorp 0:879cf546d390 121 m_CS = 0; /* Select SPI Chip MFRC522 */
Tezcorp 0:879cf546d390 122
Tezcorp 0:879cf546d390 123 // MSB == 1 is for reading. LSB is not used in address. Datasheet section 8.1.2.3.
Tezcorp 0:879cf546d390 124 (void) m_SPI.write(0x80 | reg);
Tezcorp 0:879cf546d390 125
Tezcorp 0:879cf546d390 126 // Read the value back. Send 0 to stop reading.
Tezcorp 0:879cf546d390 127 value = m_SPI.write(0);
Tezcorp 0:879cf546d390 128
Tezcorp 0:879cf546d390 129 m_CS = 1; /* Release SPI Chip MFRC522 */
Tezcorp 0:879cf546d390 130
Tezcorp 0:879cf546d390 131 return value;
Tezcorp 0:879cf546d390 132 } // End PCD_ReadRegister()
Tezcorp 0:879cf546d390 133
Tezcorp 0:879cf546d390 134 /**
Tezcorp 0:879cf546d390 135 * Reads a number of bytes from the specified register in the MFRC522 chip.
Tezcorp 0:879cf546d390 136 * The interface is described in the datasheet section 8.1.2.
Tezcorp 0:879cf546d390 137 */
Tezcorp 0:879cf546d390 138 void MFRC522::PCD_ReadRegister(uint8_t reg, uint8_t count, uint8_t *values, uint8_t rxAlign)
Tezcorp 0:879cf546d390 139 {
Tezcorp 0:879cf546d390 140 if (count == 0) { return; }
Tezcorp 0:879cf546d390 141
Tezcorp 0:879cf546d390 142 uint8_t address = 0x80 | reg; // MSB == 1 is for reading. LSB is not used in address. Datasheet section 8.1.2.3.
Tezcorp 0:879cf546d390 143 uint8_t index = 0; // Index in values array.
Tezcorp 0:879cf546d390 144
Tezcorp 0:879cf546d390 145 m_CS = 0; /* Select SPI Chip MFRC522 */
Tezcorp 0:879cf546d390 146 count--; // One read is performed outside of the loop
Tezcorp 0:879cf546d390 147 (void) m_SPI.write(address); // Tell MFRC522 which address we want to read
Tezcorp 0:879cf546d390 148
Tezcorp 0:879cf546d390 149 while (index < count)
Tezcorp 0:879cf546d390 150 {
Tezcorp 0:879cf546d390 151 if ((index == 0) && rxAlign) // Only update bit positions rxAlign..7 in values[0]
Tezcorp 0:879cf546d390 152 {
Tezcorp 0:879cf546d390 153 // Create bit mask for bit positions rxAlign..7
Tezcorp 0:879cf546d390 154 uint8_t mask = 0;
Tezcorp 0:879cf546d390 155 for (uint8_t i = rxAlign; i <= 7; i++)
Tezcorp 0:879cf546d390 156 {
Tezcorp 0:879cf546d390 157 mask |= (1 << i);
Tezcorp 0:879cf546d390 158 }
Tezcorp 0:879cf546d390 159
Tezcorp 0:879cf546d390 160 // Read value and tell that we want to read the same address again.
Tezcorp 0:879cf546d390 161 uint8_t value = m_SPI.write(address);
Tezcorp 0:879cf546d390 162
Tezcorp 0:879cf546d390 163 // Apply mask to both current value of values[0] and the new data in value.
Tezcorp 0:879cf546d390 164 values[0] = (values[index] & ~mask) | (value & mask);
Tezcorp 0:879cf546d390 165 }
Tezcorp 0:879cf546d390 166 else
Tezcorp 0:879cf546d390 167 {
Tezcorp 0:879cf546d390 168 // Read value and tell that we want to read the same address again.
Tezcorp 0:879cf546d390 169 values[index] = m_SPI.write(address);
Tezcorp 0:879cf546d390 170 }
Tezcorp 0:879cf546d390 171
Tezcorp 0:879cf546d390 172 index++;
Tezcorp 0:879cf546d390 173 }
Tezcorp 0:879cf546d390 174
Tezcorp 0:879cf546d390 175 values[index] = m_SPI.write(0); // Read the final byte. Send 0 to stop reading.
Tezcorp 0:879cf546d390 176
Tezcorp 0:879cf546d390 177 m_CS = 1; /* Release SPI Chip MFRC522 */
Tezcorp 0:879cf546d390 178 } // End PCD_ReadRegister()
Tezcorp 0:879cf546d390 179
Tezcorp 0:879cf546d390 180 /**
Tezcorp 0:879cf546d390 181 * Sets the bits given in mask in register reg.
Tezcorp 0:879cf546d390 182 */
Tezcorp 0:879cf546d390 183 void MFRC522::PCD_SetRegisterBits(uint8_t reg, uint8_t mask)
Tezcorp 0:879cf546d390 184 {
Tezcorp 0:879cf546d390 185 uint8_t tmp = PCD_ReadRegister(reg);
Tezcorp 0:879cf546d390 186 PCD_WriteRegister(reg, tmp | mask); // set bit mask
Tezcorp 0:879cf546d390 187 } // End PCD_SetRegisterBitMask()
Tezcorp 0:879cf546d390 188
Tezcorp 0:879cf546d390 189 /**
Tezcorp 0:879cf546d390 190 * Clears the bits given in mask from register reg.
Tezcorp 0:879cf546d390 191 */
Tezcorp 0:879cf546d390 192 void MFRC522::PCD_ClrRegisterBits(uint8_t reg, uint8_t mask)
Tezcorp 0:879cf546d390 193 {
Tezcorp 0:879cf546d390 194 uint8_t tmp = PCD_ReadRegister(reg);
Tezcorp 0:879cf546d390 195 PCD_WriteRegister(reg, tmp & (~mask)); // clear bit mask
Tezcorp 0:879cf546d390 196 } // End PCD_ClearRegisterBitMask()
Tezcorp 0:879cf546d390 197
Tezcorp 0:879cf546d390 198
Tezcorp 0:879cf546d390 199 /**
Tezcorp 0:879cf546d390 200 * Use the CRC coprocessor in the MFRC522 to calculate a CRC_A.
Tezcorp 0:879cf546d390 201 */
Tezcorp 0:879cf546d390 202 uint8_t MFRC522::PCD_CalculateCRC(uint8_t *data, uint8_t length, uint8_t *result)
Tezcorp 0:879cf546d390 203 {
Tezcorp 0:879cf546d390 204 PCD_WriteRegister(CommandReg, PCD_Idle); // Stop any active command.
Tezcorp 0:879cf546d390 205 PCD_WriteRegister(DivIrqReg, 0x04); // Clear the CRCIRq interrupt request bit
Tezcorp 0:879cf546d390 206 PCD_SetRegisterBits(FIFOLevelReg, 0x80); // FlushBuffer = 1, FIFO initialization
Tezcorp 0:879cf546d390 207 PCD_WriteRegister(FIFODataReg, length, data); // Write data to the FIFO
Tezcorp 0:879cf546d390 208 PCD_WriteRegister(CommandReg, PCD_CalcCRC); // Start the calculation
Tezcorp 0:879cf546d390 209
Tezcorp 0:879cf546d390 210 // Wait for the CRC calculation to complete. Each iteration of the while-loop takes 17.73us.
Tezcorp 0:879cf546d390 211 uint16_t i = 5000;
Tezcorp 0:879cf546d390 212 uint8_t n;
Tezcorp 0:879cf546d390 213 while (1)
Tezcorp 0:879cf546d390 214 {
Tezcorp 0:879cf546d390 215 n = PCD_ReadRegister(DivIrqReg); // DivIrqReg[7..0] bits are: Set2 reserved reserved MfinActIRq reserved CRCIRq reserved reserved
Tezcorp 0:879cf546d390 216 if (n & 0x04)
Tezcorp 0:879cf546d390 217 {
Tezcorp 0:879cf546d390 218 // CRCIRq bit set - calculation done
Tezcorp 0:879cf546d390 219 break;
Tezcorp 0:879cf546d390 220 }
Tezcorp 0:879cf546d390 221
Tezcorp 0:879cf546d390 222 if (--i == 0)
Tezcorp 0:879cf546d390 223 {
Tezcorp 0:879cf546d390 224 // The emergency break. We will eventually terminate on this one after 89ms.
Tezcorp 0:879cf546d390 225 // Communication with the MFRC522 might be down.
Tezcorp 0:879cf546d390 226 return STATUS_TIMEOUT;
Tezcorp 0:879cf546d390 227 }
Tezcorp 0:879cf546d390 228 }
Tezcorp 0:879cf546d390 229
Tezcorp 0:879cf546d390 230 // Stop calculating CRC for new content in the FIFO.
Tezcorp 0:879cf546d390 231 PCD_WriteRegister(CommandReg, PCD_Idle);
Tezcorp 0:879cf546d390 232
Tezcorp 0:879cf546d390 233 // Transfer the result from the registers to the result buffer
Tezcorp 0:879cf546d390 234 result[0] = PCD_ReadRegister(CRCResultRegL);
Tezcorp 0:879cf546d390 235 result[1] = PCD_ReadRegister(CRCResultRegH);
Tezcorp 0:879cf546d390 236 return STATUS_OK;
Tezcorp 0:879cf546d390 237 } // End PCD_CalculateCRC()
Tezcorp 0:879cf546d390 238
Tezcorp 0:879cf546d390 239
Tezcorp 0:879cf546d390 240 /////////////////////////////////////////////////////////////////////////////////////
Tezcorp 0:879cf546d390 241 // Functions for manipulating the MFRC522
Tezcorp 0:879cf546d390 242 /////////////////////////////////////////////////////////////////////////////////////
Tezcorp 0:879cf546d390 243
Tezcorp 0:879cf546d390 244 /**
Tezcorp 0:879cf546d390 245 * Initializes the MFRC522 chip.
Tezcorp 0:879cf546d390 246 */
Tezcorp 0:879cf546d390 247 void MFRC522::PCD_Init()
Tezcorp 0:879cf546d390 248 {
Tezcorp 0:879cf546d390 249 /* Reset MFRC522 */
Tezcorp 0:879cf546d390 250 m_RESET = 0;
Tezcorp 0:879cf546d390 251 wait_ms(10);
Tezcorp 0:879cf546d390 252 m_RESET = 1;
Tezcorp 0:879cf546d390 253
Tezcorp 0:879cf546d390 254 // Section 8.8.2 in the datasheet says the oscillator start-up time is the start up time of the crystal + 37,74us. Let us be generous: 50ms.
Tezcorp 0:879cf546d390 255 wait_ms(50);
Tezcorp 0:879cf546d390 256
Tezcorp 0:879cf546d390 257 // When communicating with a PICC we need a timeout if something goes wrong.
Tezcorp 0:879cf546d390 258 // f_timer = 13.56 MHz / (2*TPreScaler+1) where TPreScaler = [TPrescaler_Hi:TPrescaler_Lo].
Tezcorp 0:879cf546d390 259 // TPrescaler_Hi are the four low bits in TModeReg. TPrescaler_Lo is TPrescalerReg.
Tezcorp 0:879cf546d390 260 PCD_WriteRegister(TModeReg, 0x80); // TAuto=1; timer starts automatically at the end of the transmission in all communication modes at all speeds
Tezcorp 0:879cf546d390 261 PCD_WriteRegister(TPrescalerReg, 0xA9); // TPreScaler = TModeReg[3..0]:TPrescalerReg, ie 0x0A9 = 169 => f_timer=40kHz, ie a timer period of 25us.
Tezcorp 0:879cf546d390 262 PCD_WriteRegister(TReloadRegH, 0x03); // Reload timer with 0x3E8 = 1000, ie 25ms before timeout.
Tezcorp 0:879cf546d390 263 PCD_WriteRegister(TReloadRegL, 0xE8);
Tezcorp 0:879cf546d390 264
Tezcorp 0:879cf546d390 265 PCD_WriteRegister(TxASKReg, 0x40); // Default 0x00. Force a 100 % ASK modulation independent of the ModGsPReg register setting
Tezcorp 0:879cf546d390 266 PCD_WriteRegister(ModeReg, 0x3D); // Default 0x3F. Set the preset value for the CRC coprocessor for the CalcCRC command to 0x6363 (ISO 14443-3 part 6.2.4)
Tezcorp 0:879cf546d390 267
Tezcorp 0:879cf546d390 268 PCD_WriteRegister(RFCfgReg, (0x07<<4)); // Set Rx Gain to max
Tezcorp 0:879cf546d390 269
Tezcorp 0:879cf546d390 270 PCD_AntennaOn(); // Enable the antenna driver pins TX1 and TX2 (they were disabled by the reset)
Tezcorp 0:879cf546d390 271 } // End PCD_Init()
Tezcorp 0:879cf546d390 272
Tezcorp 0:879cf546d390 273 /**
Tezcorp 0:879cf546d390 274 * Performs a soft reset on the MFRC522 chip and waits for it to be ready again.
Tezcorp 0:879cf546d390 275 */
Tezcorp 0:879cf546d390 276 void MFRC522::PCD_Reset()
Tezcorp 0:879cf546d390 277 {
Tezcorp 0:879cf546d390 278 PCD_WriteRegister(CommandReg, PCD_SoftReset); // Issue the SoftReset command.
Tezcorp 0:879cf546d390 279 // The datasheet does not mention how long the SoftRest command takes to complete.
Tezcorp 0:879cf546d390 280 // But the MFRC522 might have been in soft power-down mode (triggered by bit 4 of CommandReg)
Tezcorp 0:879cf546d390 281 // Section 8.8.2 in the datasheet says the oscillator start-up time is the start up time of the crystal + 37,74us. Let us be generous: 50ms.
Tezcorp 0:879cf546d390 282 wait_ms(50);
Tezcorp 0:879cf546d390 283
Tezcorp 0:879cf546d390 284 // Wait for the PowerDown bit in CommandReg to be cleared
Tezcorp 0:879cf546d390 285 while (PCD_ReadRegister(CommandReg) & (1<<4))
Tezcorp 0:879cf546d390 286 {
Tezcorp 0:879cf546d390 287 // PCD still restarting - unlikely after waiting 50ms, but better safe than sorry.
Tezcorp 0:879cf546d390 288 }
Tezcorp 0:879cf546d390 289 } // End PCD_Reset()
Tezcorp 0:879cf546d390 290
Tezcorp 0:879cf546d390 291 /**
Tezcorp 0:879cf546d390 292 * Turns the antenna on by enabling pins TX1 and TX2.
Tezcorp 0:879cf546d390 293 * After a reset these pins disabled.
Tezcorp 0:879cf546d390 294 */
Tezcorp 0:879cf546d390 295 void MFRC522::PCD_AntennaOn()
Tezcorp 0:879cf546d390 296 {
Tezcorp 0:879cf546d390 297 uint8_t value = PCD_ReadRegister(TxControlReg);
Tezcorp 0:879cf546d390 298 if ((value & 0x03) != 0x03)
Tezcorp 0:879cf546d390 299 {
Tezcorp 0:879cf546d390 300 PCD_WriteRegister(TxControlReg, value | 0x03);
Tezcorp 0:879cf546d390 301 }
Tezcorp 0:879cf546d390 302 } // End PCD_AntennaOn()
Tezcorp 0:879cf546d390 303
Tezcorp 0:879cf546d390 304 /////////////////////////////////////////////////////////////////////////////////////
Tezcorp 0:879cf546d390 305 // Functions for communicating with PICCs
Tezcorp 0:879cf546d390 306 /////////////////////////////////////////////////////////////////////////////////////
Tezcorp 0:879cf546d390 307
Tezcorp 0:879cf546d390 308 /**
Tezcorp 0:879cf546d390 309 * Executes the Transceive command.
Tezcorp 0:879cf546d390 310 * CRC validation can only be done if backData and backLen are specified.
Tezcorp 0:879cf546d390 311 */
Tezcorp 0:879cf546d390 312 uint8_t MFRC522::PCD_TransceiveData(uint8_t *sendData,
Tezcorp 0:879cf546d390 313 uint8_t sendLen,
Tezcorp 0:879cf546d390 314 uint8_t *backData,
Tezcorp 0:879cf546d390 315 uint8_t *backLen,
Tezcorp 0:879cf546d390 316 uint8_t *validBits,
Tezcorp 0:879cf546d390 317 uint8_t rxAlign,
Tezcorp 0:879cf546d390 318 bool checkCRC)
Tezcorp 0:879cf546d390 319 {
Tezcorp 0:879cf546d390 320 uint8_t waitIRq = 0x30; // RxIRq and IdleIRq
Tezcorp 0:879cf546d390 321 return PCD_CommunicateWithPICC(PCD_Transceive, waitIRq, sendData, sendLen, backData, backLen, validBits, rxAlign, checkCRC);
Tezcorp 0:879cf546d390 322 } // End PCD_TransceiveData()
Tezcorp 0:879cf546d390 323
Tezcorp 0:879cf546d390 324 /**
Tezcorp 0:879cf546d390 325 * Transfers data to the MFRC522 FIFO, executes a commend, waits for completion and transfers data back from the FIFO.
Tezcorp 0:879cf546d390 326 * CRC validation can only be done if backData and backLen are specified.
Tezcorp 0:879cf546d390 327 */
Tezcorp 0:879cf546d390 328 uint8_t MFRC522::PCD_CommunicateWithPICC(uint8_t command,
Tezcorp 0:879cf546d390 329 uint8_t waitIRq,
Tezcorp 0:879cf546d390 330 uint8_t *sendData,
Tezcorp 0:879cf546d390 331 uint8_t sendLen,
Tezcorp 0:879cf546d390 332 uint8_t *backData,
Tezcorp 0:879cf546d390 333 uint8_t *backLen,
Tezcorp 0:879cf546d390 334 uint8_t *validBits,
Tezcorp 0:879cf546d390 335 uint8_t rxAlign,
Tezcorp 0:879cf546d390 336 bool checkCRC)
Tezcorp 0:879cf546d390 337 {
Tezcorp 0:879cf546d390 338 uint8_t n, _validBits = 0;
Tezcorp 0:879cf546d390 339 uint32_t i;
Tezcorp 0:879cf546d390 340
Tezcorp 0:879cf546d390 341 // Prepare values for BitFramingReg
Tezcorp 0:879cf546d390 342 uint8_t txLastBits = validBits ? *validBits : 0;
Tezcorp 0:879cf546d390 343 uint8_t bitFraming = (rxAlign << 4) + txLastBits; // RxAlign = BitFramingReg[6..4]. TxLastBits = BitFramingReg[2..0]
Tezcorp 0:879cf546d390 344
Tezcorp 0:879cf546d390 345 PCD_WriteRegister(CommandReg, PCD_Idle); // Stop any active command.
Tezcorp 0:879cf546d390 346 PCD_WriteRegister(ComIrqReg, 0x7F); // Clear all seven interrupt request bits
Tezcorp 0:879cf546d390 347 PCD_SetRegisterBits(FIFOLevelReg, 0x80); // FlushBuffer = 1, FIFO initialization
Tezcorp 0:879cf546d390 348 PCD_WriteRegister(FIFODataReg, sendLen, sendData); // Write sendData to the FIFO
Tezcorp 0:879cf546d390 349 PCD_WriteRegister(BitFramingReg, bitFraming); // Bit adjustments
Tezcorp 0:879cf546d390 350 PCD_WriteRegister(CommandReg, command); // Execute the command
Tezcorp 0:879cf546d390 351 if (command == PCD_Transceive)
Tezcorp 0:879cf546d390 352 {
Tezcorp 0:879cf546d390 353 PCD_SetRegisterBits(BitFramingReg, 0x80); // StartSend=1, transmission of data starts
Tezcorp 0:879cf546d390 354 }
Tezcorp 0:879cf546d390 355
Tezcorp 0:879cf546d390 356 // Wait for the command to complete.
Tezcorp 0:879cf546d390 357 // In PCD_Init() we set the TAuto flag in TModeReg. This means the timer automatically starts when the PCD stops transmitting.
Tezcorp 0:879cf546d390 358 // Each iteration of the do-while-loop takes 17.86us.
Tezcorp 0:879cf546d390 359 i = 2000;
Tezcorp 0:879cf546d390 360 while (1)
Tezcorp 0:879cf546d390 361 {
Tezcorp 0:879cf546d390 362 n = PCD_ReadRegister(ComIrqReg); // ComIrqReg[7..0] bits are: Set1 TxIRq RxIRq IdleIRq HiAlertIRq LoAlertIRq ErrIRq TimerIRq
Tezcorp 0:879cf546d390 363 if (n & waitIRq)
Tezcorp 0:879cf546d390 364 { // One of the interrupts that signal success has been set.
Tezcorp 0:879cf546d390 365 break;
Tezcorp 0:879cf546d390 366 }
Tezcorp 0:879cf546d390 367
Tezcorp 0:879cf546d390 368 if (n & 0x01)
Tezcorp 0:879cf546d390 369 { // Timer interrupt - nothing received in 25ms
Tezcorp 0:879cf546d390 370 return STATUS_TIMEOUT;
Tezcorp 0:879cf546d390 371 }
Tezcorp 0:879cf546d390 372
Tezcorp 0:879cf546d390 373 if (--i == 0)
Tezcorp 0:879cf546d390 374 { // The emergency break. If all other condions fail we will eventually terminate on this one after 35.7ms. Communication with the MFRC522 might be down.
Tezcorp 0:879cf546d390 375 return STATUS_TIMEOUT;
Tezcorp 0:879cf546d390 376 }
Tezcorp 0:879cf546d390 377 }
Tezcorp 0:879cf546d390 378
Tezcorp 0:879cf546d390 379 // Stop now if any errors except collisions were detected.
Tezcorp 0:879cf546d390 380 uint8_t errorRegValue = PCD_ReadRegister(ErrorReg); // ErrorReg[7..0] bits are: WrErr TempErr reserved BufferOvfl CollErr CRCErr ParityErr ProtocolErr
Tezcorp 0:879cf546d390 381 if (errorRegValue & 0x13)
Tezcorp 0:879cf546d390 382 { // BufferOvfl ParityErr ProtocolErr
Tezcorp 0:879cf546d390 383 return STATUS_ERROR;
Tezcorp 0:879cf546d390 384 }
Tezcorp 0:879cf546d390 385
Tezcorp 0:879cf546d390 386 // If the caller wants data back, get it from the MFRC522.
Tezcorp 0:879cf546d390 387 if (backData && backLen)
Tezcorp 0:879cf546d390 388 {
Tezcorp 0:879cf546d390 389 n = PCD_ReadRegister(FIFOLevelReg); // Number of bytes in the FIFO
Tezcorp 0:879cf546d390 390 if (n > *backLen)
Tezcorp 0:879cf546d390 391 {
Tezcorp 0:879cf546d390 392 return STATUS_NO_ROOM;
Tezcorp 0:879cf546d390 393 }
Tezcorp 0:879cf546d390 394
Tezcorp 0:879cf546d390 395 *backLen = n; // Number of bytes returned
Tezcorp 0:879cf546d390 396 PCD_ReadRegister(FIFODataReg, n, backData, rxAlign); // Get received data from FIFO
Tezcorp 0:879cf546d390 397 _validBits = PCD_ReadRegister(ControlReg) & 0x07; // RxLastBits[2:0] indicates the number of valid bits in the last received byte. If this value is 000b, the whole byte is valid.
Tezcorp 0:879cf546d390 398 if (validBits)
Tezcorp 0:879cf546d390 399 {
Tezcorp 0:879cf546d390 400 *validBits = _validBits;
Tezcorp 0:879cf546d390 401 }
Tezcorp 0:879cf546d390 402 }
Tezcorp 0:879cf546d390 403
Tezcorp 0:879cf546d390 404 // Tell about collisions
Tezcorp 0:879cf546d390 405 if (errorRegValue & 0x08)
Tezcorp 0:879cf546d390 406 { // CollErr
Tezcorp 0:879cf546d390 407 return STATUS_COLLISION;
Tezcorp 0:879cf546d390 408 }
Tezcorp 0:879cf546d390 409
Tezcorp 0:879cf546d390 410 // Perform CRC_A validation if requested.
Tezcorp 0:879cf546d390 411 if (backData && backLen && checkCRC)
Tezcorp 0:879cf546d390 412 {
Tezcorp 0:879cf546d390 413 // In this case a MIFARE Classic NAK is not OK.
Tezcorp 0:879cf546d390 414 if ((*backLen == 1) && (_validBits == 4))
Tezcorp 0:879cf546d390 415 {
Tezcorp 0:879cf546d390 416 return STATUS_MIFARE_NACK;
Tezcorp 0:879cf546d390 417 }
Tezcorp 0:879cf546d390 418
Tezcorp 0:879cf546d390 419 // We need at least the CRC_A value and all 8 bits of the last byte must be received.
Tezcorp 0:879cf546d390 420 if ((*backLen < 2) || (_validBits != 0))
Tezcorp 0:879cf546d390 421 {
Tezcorp 0:879cf546d390 422 return STATUS_CRC_WRONG;
Tezcorp 0:879cf546d390 423 }
Tezcorp 0:879cf546d390 424
Tezcorp 0:879cf546d390 425 // Verify CRC_A - do our own calculation and store the control in controlBuffer.
Tezcorp 0:879cf546d390 426 uint8_t controlBuffer[2];
Tezcorp 0:879cf546d390 427 n = PCD_CalculateCRC(&backData[0], *backLen - 2, &controlBuffer[0]);
Tezcorp 0:879cf546d390 428 if (n != STATUS_OK)
Tezcorp 0:879cf546d390 429 {
Tezcorp 0:879cf546d390 430 return n;
Tezcorp 0:879cf546d390 431 }
Tezcorp 0:879cf546d390 432
Tezcorp 0:879cf546d390 433 if ((backData[*backLen - 2] != controlBuffer[0]) || (backData[*backLen - 1] != controlBuffer[1]))
Tezcorp 0:879cf546d390 434 {
Tezcorp 0:879cf546d390 435 return STATUS_CRC_WRONG;
Tezcorp 0:879cf546d390 436 }
Tezcorp 0:879cf546d390 437 }
Tezcorp 0:879cf546d390 438
Tezcorp 0:879cf546d390 439 return STATUS_OK;
Tezcorp 0:879cf546d390 440 } // End PCD_CommunicateWithPICC()
Tezcorp 0:879cf546d390 441
Tezcorp 0:879cf546d390 442 /*
Tezcorp 0:879cf546d390 443 * Transmits a REQuest command, Type A. Invites PICCs in state IDLE to go to READY and prepare for anticollision or selection. 7 bit frame.
Tezcorp 0:879cf546d390 444 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
Tezcorp 0:879cf546d390 445 */
Tezcorp 0:879cf546d390 446 uint8_t MFRC522::PICC_RequestA(uint8_t *bufferATQA, uint8_t *bufferSize)
Tezcorp 0:879cf546d390 447 {
Tezcorp 0:879cf546d390 448 return PICC_REQA_or_WUPA(PICC_CMD_REQA, bufferATQA, bufferSize);
Tezcorp 0:879cf546d390 449 } // End PICC_RequestA()
Tezcorp 0:879cf546d390 450
Tezcorp 0:879cf546d390 451 /**
Tezcorp 0:879cf546d390 452 * Transmits a Wake-UP command, Type A. Invites PICCs in state IDLE and HALT to go to READY(*) and prepare for anticollision or selection. 7 bit frame.
Tezcorp 0:879cf546d390 453 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
Tezcorp 0:879cf546d390 454 */
Tezcorp 0:879cf546d390 455 uint8_t MFRC522::PICC_WakeupA(uint8_t *bufferATQA, uint8_t *bufferSize)
Tezcorp 0:879cf546d390 456 {
Tezcorp 0:879cf546d390 457 return PICC_REQA_or_WUPA(PICC_CMD_WUPA, bufferATQA, bufferSize);
Tezcorp 0:879cf546d390 458 } // End PICC_WakeupA()
Tezcorp 0:879cf546d390 459
Tezcorp 0:879cf546d390 460 /*
Tezcorp 0:879cf546d390 461 * Transmits REQA or WUPA commands.
Tezcorp 0:879cf546d390 462 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
Tezcorp 0:879cf546d390 463 */
Tezcorp 0:879cf546d390 464 uint8_t MFRC522::PICC_REQA_or_WUPA(uint8_t command, uint8_t *bufferATQA, uint8_t *bufferSize)
Tezcorp 0:879cf546d390 465 {
Tezcorp 0:879cf546d390 466 uint8_t validBits;
Tezcorp 0:879cf546d390 467 uint8_t status;
Tezcorp 0:879cf546d390 468
Tezcorp 0:879cf546d390 469 if (bufferATQA == NULL || *bufferSize < 2)
Tezcorp 0:879cf546d390 470 { // The ATQA response is 2 bytes long.
Tezcorp 0:879cf546d390 471 return STATUS_NO_ROOM;
Tezcorp 0:879cf546d390 472 }
Tezcorp 0:879cf546d390 473
Tezcorp 0:879cf546d390 474 // ValuesAfterColl=1 => Bits received after collision are cleared.
Tezcorp 0:879cf546d390 475 PCD_ClrRegisterBits(CollReg, 0x80);
Tezcorp 0:879cf546d390 476
Tezcorp 0:879cf546d390 477 // For REQA and WUPA we need the short frame format
Tezcorp 0:879cf546d390 478 // - transmit only 7 bits of the last (and only) byte. TxLastBits = BitFramingReg[2..0]
Tezcorp 0:879cf546d390 479 validBits = 7;
Tezcorp 0:879cf546d390 480
Tezcorp 0:879cf546d390 481 status = PCD_TransceiveData(&command, 1, bufferATQA, bufferSize, &validBits);
Tezcorp 0:879cf546d390 482 if (status != STATUS_OK)
Tezcorp 0:879cf546d390 483 {
Tezcorp 0:879cf546d390 484 return status;
Tezcorp 0:879cf546d390 485 }
Tezcorp 0:879cf546d390 486
Tezcorp 0:879cf546d390 487 if ((*bufferSize != 2) || (validBits != 0))
Tezcorp 0:879cf546d390 488 { // ATQA must be exactly 16 bits.
Tezcorp 0:879cf546d390 489 return STATUS_ERROR;
Tezcorp 0:879cf546d390 490 }
Tezcorp 0:879cf546d390 491
Tezcorp 0:879cf546d390 492 return STATUS_OK;
Tezcorp 0:879cf546d390 493 } // End PICC_REQA_or_WUPA()
Tezcorp 0:879cf546d390 494
Tezcorp 0:879cf546d390 495 /*
Tezcorp 0:879cf546d390 496 * Transmits SELECT/ANTICOLLISION commands to select a single PICC.
Tezcorp 0:879cf546d390 497 */
Tezcorp 0:879cf546d390 498 uint8_t MFRC522::PICC_Select(Uid *uid, uint8_t validBits)
Tezcorp 0:879cf546d390 499 {
Tezcorp 0:879cf546d390 500 bool uidComplete;
Tezcorp 0:879cf546d390 501 bool selectDone;
Tezcorp 0:879cf546d390 502 bool useCascadeTag;
Tezcorp 0:879cf546d390 503 uint8_t cascadeLevel = 1;
Tezcorp 0:879cf546d390 504 uint8_t result;
Tezcorp 0:879cf546d390 505 uint8_t count;
Tezcorp 0:879cf546d390 506 uint8_t index;
Tezcorp 0:879cf546d390 507 uint8_t uidIndex; // The first index in uid->uidByte[] that is used in the current Cascade Level.
Tezcorp 0:879cf546d390 508 uint8_t currentLevelKnownBits; // The number of known UID bits in the current Cascade Level.
Tezcorp 0:879cf546d390 509 uint8_t buffer[9]; // The SELECT/ANTICOLLISION commands uses a 7 byte standard frame + 2 bytes CRC_A
Tezcorp 0:879cf546d390 510 uint8_t bufferUsed; // The number of bytes used in the buffer, ie the number of bytes to transfer to the FIFO.
Tezcorp 0:879cf546d390 511 uint8_t rxAlign; // Used in BitFramingReg. Defines the bit position for the first bit received.
Tezcorp 0:879cf546d390 512 uint8_t txLastBits; // Used in BitFramingReg. The number of valid bits in the last transmitted byte.
Tezcorp 0:879cf546d390 513 uint8_t *responseBuffer;
Tezcorp 0:879cf546d390 514 uint8_t responseLength;
Tezcorp 0:879cf546d390 515
Tezcorp 0:879cf546d390 516 // Description of buffer structure:
Tezcorp 0:879cf546d390 517 // Byte 0: SEL Indicates the Cascade Level: PICC_CMD_SEL_CL1, PICC_CMD_SEL_CL2 or PICC_CMD_SEL_CL3
Tezcorp 0:879cf546d390 518 // Byte 1: NVB Number of Valid Bits (in complete command, not just the UID): High nibble: complete bytes, Low nibble: Extra bits.
Tezcorp 0:879cf546d390 519 // Byte 2: UID-data or CT See explanation below. CT means Cascade Tag.
Tezcorp 0:879cf546d390 520 // Byte 3: UID-data
Tezcorp 0:879cf546d390 521 // Byte 4: UID-data
Tezcorp 0:879cf546d390 522 // Byte 5: UID-data
Tezcorp 0:879cf546d390 523 // Byte 6: BCC Block Check Character - XOR of bytes 2-5
Tezcorp 0:879cf546d390 524 // Byte 7: CRC_A
Tezcorp 0:879cf546d390 525 // Byte 8: CRC_A
Tezcorp 0:879cf546d390 526 // The BCC and CRC_A is only transmitted if we know all the UID bits of the current Cascade Level.
Tezcorp 0:879cf546d390 527 //
Tezcorp 0:879cf546d390 528 // Description of bytes 2-5: (Section 6.5.4 of the ISO/IEC 14443-3 draft: UID contents and cascade levels)
Tezcorp 0:879cf546d390 529 // UID size Cascade level Byte2 Byte3 Byte4 Byte5
Tezcorp 0:879cf546d390 530 // ======== ============= ===== ===== ===== =====
Tezcorp 0:879cf546d390 531 // 4 bytes 1 uid0 uid1 uid2 uid3
Tezcorp 0:879cf546d390 532 // 7 bytes 1 CT uid0 uid1 uid2
Tezcorp 0:879cf546d390 533 // 2 uid3 uid4 uid5 uid6
Tezcorp 0:879cf546d390 534 // 10 bytes 1 CT uid0 uid1 uid2
Tezcorp 0:879cf546d390 535 // 2 CT uid3 uid4 uid5
Tezcorp 0:879cf546d390 536 // 3 uid6 uid7 uid8 uid9
Tezcorp 0:879cf546d390 537
Tezcorp 0:879cf546d390 538 // Sanity checks
Tezcorp 0:879cf546d390 539 if (validBits > 80)
Tezcorp 0:879cf546d390 540 {
Tezcorp 0:879cf546d390 541 return STATUS_INVALID;
Tezcorp 0:879cf546d390 542 }
Tezcorp 0:879cf546d390 543
Tezcorp 0:879cf546d390 544 // Prepare MFRC522
Tezcorp 0:879cf546d390 545 // ValuesAfterColl=1 => Bits received after collision are cleared.
Tezcorp 0:879cf546d390 546 PCD_ClrRegisterBits(CollReg, 0x80);
Tezcorp 0:879cf546d390 547
Tezcorp 0:879cf546d390 548 // Repeat Cascade Level loop until we have a complete UID.
Tezcorp 0:879cf546d390 549 uidComplete = false;
Tezcorp 0:879cf546d390 550 while ( ! uidComplete)
Tezcorp 0:879cf546d390 551 {
Tezcorp 0:879cf546d390 552 // Set the Cascade Level in the SEL byte, find out if we need to use the Cascade Tag in byte 2.
Tezcorp 0:879cf546d390 553 switch (cascadeLevel)
Tezcorp 0:879cf546d390 554 {
Tezcorp 0:879cf546d390 555 case 1:
Tezcorp 0:879cf546d390 556 buffer[0] = PICC_CMD_SEL_CL1;
Tezcorp 0:879cf546d390 557 uidIndex = 0;
Tezcorp 0:879cf546d390 558 useCascadeTag = validBits && (uid->size > 4); // When we know that the UID has more than 4 bytes
Tezcorp 0:879cf546d390 559 break;
Tezcorp 0:879cf546d390 560
Tezcorp 0:879cf546d390 561 case 2:
Tezcorp 0:879cf546d390 562 buffer[0] = PICC_CMD_SEL_CL2;
Tezcorp 0:879cf546d390 563 uidIndex = 3;
Tezcorp 0:879cf546d390 564 useCascadeTag = validBits && (uid->size > 7); // When we know that the UID has more than 7 bytes
Tezcorp 0:879cf546d390 565 break;
Tezcorp 0:879cf546d390 566
Tezcorp 0:879cf546d390 567 case 3:
Tezcorp 0:879cf546d390 568 buffer[0] = PICC_CMD_SEL_CL3;
Tezcorp 0:879cf546d390 569 uidIndex = 6;
Tezcorp 0:879cf546d390 570 useCascadeTag = false; // Never used in CL3.
Tezcorp 0:879cf546d390 571 break;
Tezcorp 0:879cf546d390 572
Tezcorp 0:879cf546d390 573 default:
Tezcorp 0:879cf546d390 574 return STATUS_INTERNAL_ERROR;
Tezcorp 0:879cf546d390 575 //break;
Tezcorp 0:879cf546d390 576 }
Tezcorp 0:879cf546d390 577
Tezcorp 0:879cf546d390 578 // How many UID bits are known in this Cascade Level?
Tezcorp 0:879cf546d390 579 if(validBits > (8 * uidIndex))
Tezcorp 0:879cf546d390 580 {
Tezcorp 0:879cf546d390 581 currentLevelKnownBits = validBits - (8 * uidIndex);
Tezcorp 0:879cf546d390 582 }
Tezcorp 0:879cf546d390 583 else
Tezcorp 0:879cf546d390 584 {
Tezcorp 0:879cf546d390 585 currentLevelKnownBits = 0;
Tezcorp 0:879cf546d390 586 }
Tezcorp 0:879cf546d390 587
Tezcorp 0:879cf546d390 588 // Copy the known bits from uid->uidByte[] to buffer[]
Tezcorp 0:879cf546d390 589 index = 2; // destination index in buffer[]
Tezcorp 0:879cf546d390 590 if (useCascadeTag)
Tezcorp 0:879cf546d390 591 {
Tezcorp 0:879cf546d390 592 buffer[index++] = PICC_CMD_CT;
Tezcorp 0:879cf546d390 593 }
Tezcorp 0:879cf546d390 594
Tezcorp 0:879cf546d390 595 uint8_t bytesToCopy = currentLevelKnownBits / 8 + (currentLevelKnownBits % 8 ? 1 : 0); // The number of bytes needed to represent the known bits for this level.
Tezcorp 0:879cf546d390 596 if (bytesToCopy)
Tezcorp 0:879cf546d390 597 {
Tezcorp 0:879cf546d390 598 // Max 4 bytes in each Cascade Level. Only 3 left if we use the Cascade Tag
Tezcorp 0:879cf546d390 599 uint8_t maxBytes = useCascadeTag ? 3 : 4;
Tezcorp 0:879cf546d390 600 if (bytesToCopy > maxBytes)
Tezcorp 0:879cf546d390 601 {
Tezcorp 0:879cf546d390 602 bytesToCopy = maxBytes;
Tezcorp 0:879cf546d390 603 }
Tezcorp 0:879cf546d390 604
Tezcorp 0:879cf546d390 605 for (count = 0; count < bytesToCopy; count++)
Tezcorp 0:879cf546d390 606 {
Tezcorp 0:879cf546d390 607 buffer[index++] = uid->uidByte[uidIndex + count];
Tezcorp 0:879cf546d390 608 }
Tezcorp 0:879cf546d390 609 }
Tezcorp 0:879cf546d390 610
Tezcorp 0:879cf546d390 611 // Now that the data has been copied we need to include the 8 bits in CT in currentLevelKnownBits
Tezcorp 0:879cf546d390 612 if (useCascadeTag)
Tezcorp 0:879cf546d390 613 {
Tezcorp 0:879cf546d390 614 currentLevelKnownBits += 8;
Tezcorp 0:879cf546d390 615 }
Tezcorp 0:879cf546d390 616
Tezcorp 0:879cf546d390 617 // Repeat anti collision loop until we can transmit all UID bits + BCC and receive a SAK - max 32 iterations.
Tezcorp 0:879cf546d390 618 selectDone = false;
Tezcorp 0:879cf546d390 619 while ( ! selectDone)
Tezcorp 0:879cf546d390 620 {
Tezcorp 0:879cf546d390 621 // Find out how many bits and bytes to send and receive.
Tezcorp 0:879cf546d390 622 if (currentLevelKnownBits >= 32)
Tezcorp 0:879cf546d390 623 { // All UID bits in this Cascade Level are known. This is a SELECT.
Tezcorp 0:879cf546d390 624 //Serial.print("SELECT: currentLevelKnownBits="); Serial.println(currentLevelKnownBits, DEC);
Tezcorp 0:879cf546d390 625 buffer[1] = 0x70; // NVB - Number of Valid Bits: Seven whole bytes
Tezcorp 0:879cf546d390 626
Tezcorp 0:879cf546d390 627 // Calulate BCC - Block Check Character
Tezcorp 0:879cf546d390 628 buffer[6] = buffer[2] ^ buffer[3] ^ buffer[4] ^ buffer[5];
Tezcorp 0:879cf546d390 629
Tezcorp 0:879cf546d390 630 // Calculate CRC_A
Tezcorp 0:879cf546d390 631 result = PCD_CalculateCRC(buffer, 7, &buffer[7]);
Tezcorp 0:879cf546d390 632 if (result != STATUS_OK)
Tezcorp 0:879cf546d390 633 {
Tezcorp 0:879cf546d390 634 return result;
Tezcorp 0:879cf546d390 635 }
Tezcorp 0:879cf546d390 636
Tezcorp 0:879cf546d390 637 txLastBits = 0; // 0 => All 8 bits are valid.
Tezcorp 0:879cf546d390 638 bufferUsed = 9;
Tezcorp 0:879cf546d390 639
Tezcorp 0:879cf546d390 640 // Store response in the last 3 bytes of buffer (BCC and CRC_A - not needed after tx)
Tezcorp 0:879cf546d390 641 responseBuffer = &buffer[6];
Tezcorp 0:879cf546d390 642 responseLength = 3;
Tezcorp 0:879cf546d390 643 }
Tezcorp 0:879cf546d390 644 else
Tezcorp 0:879cf546d390 645 { // This is an ANTICOLLISION.
Tezcorp 0:879cf546d390 646 //Serial.print("ANTICOLLISION: currentLevelKnownBits="); Serial.println(currentLevelKnownBits, DEC);
Tezcorp 0:879cf546d390 647 txLastBits = currentLevelKnownBits % 8;
Tezcorp 0:879cf546d390 648 count = currentLevelKnownBits / 8; // Number of whole bytes in the UID part.
Tezcorp 0:879cf546d390 649 index = 2 + count; // Number of whole bytes: SEL + NVB + UIDs
Tezcorp 0:879cf546d390 650 buffer[1] = (index << 4) + txLastBits; // NVB - Number of Valid Bits
Tezcorp 0:879cf546d390 651 bufferUsed = index + (txLastBits ? 1 : 0);
Tezcorp 0:879cf546d390 652
Tezcorp 0:879cf546d390 653 // Store response in the unused part of buffer
Tezcorp 0:879cf546d390 654 responseBuffer = &buffer[index];
Tezcorp 0:879cf546d390 655 responseLength = sizeof(buffer) - index;
Tezcorp 0:879cf546d390 656 }
Tezcorp 0:879cf546d390 657
Tezcorp 0:879cf546d390 658 // Set bit adjustments
Tezcorp 0:879cf546d390 659 rxAlign = txLastBits; // Having a seperate variable is overkill. But it makes the next line easier to read.
Tezcorp 0:879cf546d390 660 PCD_WriteRegister(BitFramingReg, (rxAlign << 4) + txLastBits); // RxAlign = BitFramingReg[6..4]. TxLastBits = BitFramingReg[2..0]
Tezcorp 0:879cf546d390 661
Tezcorp 0:879cf546d390 662 // Transmit the buffer and receive the response.
Tezcorp 0:879cf546d390 663 result = PCD_TransceiveData(buffer, bufferUsed, responseBuffer, &responseLength, &txLastBits, rxAlign);
Tezcorp 0:879cf546d390 664 if (result == STATUS_COLLISION)
Tezcorp 0:879cf546d390 665 { // More than one PICC in the field => collision.
Tezcorp 0:879cf546d390 666 result = PCD_ReadRegister(CollReg); // CollReg[7..0] bits are: ValuesAfterColl reserved CollPosNotValid CollPos[4:0]
Tezcorp 0:879cf546d390 667 if (result & 0x20)
Tezcorp 0:879cf546d390 668 { // CollPosNotValid
Tezcorp 0:879cf546d390 669 return STATUS_COLLISION; // Without a valid collision position we cannot continue
Tezcorp 0:879cf546d390 670 }
Tezcorp 0:879cf546d390 671
Tezcorp 0:879cf546d390 672 uint8_t collisionPos = result & 0x1F; // Values 0-31, 0 means bit 32.
Tezcorp 0:879cf546d390 673 if (collisionPos == 0)
Tezcorp 0:879cf546d390 674 {
Tezcorp 0:879cf546d390 675 collisionPos = 32;
Tezcorp 0:879cf546d390 676 }
Tezcorp 0:879cf546d390 677
Tezcorp 0:879cf546d390 678 if (collisionPos <= currentLevelKnownBits)
Tezcorp 0:879cf546d390 679 { // No progress - should not happen
Tezcorp 0:879cf546d390 680 return STATUS_INTERNAL_ERROR;
Tezcorp 0:879cf546d390 681 }
Tezcorp 0:879cf546d390 682
Tezcorp 0:879cf546d390 683 // Choose the PICC with the bit set.
Tezcorp 0:879cf546d390 684 currentLevelKnownBits = collisionPos;
Tezcorp 0:879cf546d390 685 count = (currentLevelKnownBits - 1) % 8; // The bit to modify
Tezcorp 0:879cf546d390 686 index = 1 + (currentLevelKnownBits / 8) + (count ? 1 : 0); // First byte is index 0.
Tezcorp 0:879cf546d390 687 buffer[index] |= (1 << count);
Tezcorp 0:879cf546d390 688 }
Tezcorp 0:879cf546d390 689 else if (result != STATUS_OK)
Tezcorp 0:879cf546d390 690 {
Tezcorp 0:879cf546d390 691 return result;
Tezcorp 0:879cf546d390 692 }
Tezcorp 0:879cf546d390 693 else
Tezcorp 0:879cf546d390 694 { // STATUS_OK
Tezcorp 0:879cf546d390 695 if (currentLevelKnownBits >= 32)
Tezcorp 0:879cf546d390 696 { // This was a SELECT.
Tezcorp 0:879cf546d390 697 selectDone = true; // No more anticollision
Tezcorp 0:879cf546d390 698 // We continue below outside the while.
Tezcorp 0:879cf546d390 699 }
Tezcorp 0:879cf546d390 700 else
Tezcorp 0:879cf546d390 701 { // This was an ANTICOLLISION.
Tezcorp 0:879cf546d390 702 // We now have all 32 bits of the UID in this Cascade Level
Tezcorp 0:879cf546d390 703 currentLevelKnownBits = 32;
Tezcorp 0:879cf546d390 704 // Run loop again to do the SELECT.
Tezcorp 0:879cf546d390 705 }
Tezcorp 0:879cf546d390 706 }
Tezcorp 0:879cf546d390 707 } // End of while ( ! selectDone)
Tezcorp 0:879cf546d390 708
Tezcorp 0:879cf546d390 709 // We do not check the CBB - it was constructed by us above.
Tezcorp 0:879cf546d390 710
Tezcorp 0:879cf546d390 711 // Copy the found UID bytes from buffer[] to uid->uidByte[]
Tezcorp 0:879cf546d390 712 index = (buffer[2] == PICC_CMD_CT) ? 3 : 2; // source index in buffer[]
Tezcorp 0:879cf546d390 713 bytesToCopy = (buffer[2] == PICC_CMD_CT) ? 3 : 4;
Tezcorp 0:879cf546d390 714 for (count = 0; count < bytesToCopy; count++)
Tezcorp 0:879cf546d390 715 {
Tezcorp 0:879cf546d390 716 uid->uidByte[uidIndex + count] = buffer[index++];
Tezcorp 0:879cf546d390 717 }
Tezcorp 0:879cf546d390 718
Tezcorp 0:879cf546d390 719 // Check response SAK (Select Acknowledge)
Tezcorp 0:879cf546d390 720 if (responseLength != 3 || txLastBits != 0)
Tezcorp 0:879cf546d390 721 { // SAK must be exactly 24 bits (1 byte + CRC_A).
Tezcorp 0:879cf546d390 722 return STATUS_ERROR;
Tezcorp 0:879cf546d390 723 }
Tezcorp 0:879cf546d390 724
Tezcorp 0:879cf546d390 725 // Verify CRC_A - do our own calculation and store the control in buffer[2..3] - those bytes are not needed anymore.
Tezcorp 0:879cf546d390 726 result = PCD_CalculateCRC(responseBuffer, 1, &buffer[2]);
Tezcorp 0:879cf546d390 727 if (result != STATUS_OK)
Tezcorp 0:879cf546d390 728 {
Tezcorp 0:879cf546d390 729 return result;
Tezcorp 0:879cf546d390 730 }
Tezcorp 0:879cf546d390 731
Tezcorp 0:879cf546d390 732 if ((buffer[2] != responseBuffer[1]) || (buffer[3] != responseBuffer[2]))
Tezcorp 0:879cf546d390 733 {
Tezcorp 0:879cf546d390 734 return STATUS_CRC_WRONG;
Tezcorp 0:879cf546d390 735 }
Tezcorp 0:879cf546d390 736
Tezcorp 0:879cf546d390 737 if (responseBuffer[0] & 0x04)
Tezcorp 0:879cf546d390 738 { // Cascade bit set - UID not complete yes
Tezcorp 0:879cf546d390 739 cascadeLevel++;
Tezcorp 0:879cf546d390 740 }
Tezcorp 0:879cf546d390 741 else
Tezcorp 0:879cf546d390 742 {
Tezcorp 0:879cf546d390 743 uidComplete = true;
Tezcorp 0:879cf546d390 744 uid->sak = responseBuffer[0];
Tezcorp 0:879cf546d390 745 }
Tezcorp 0:879cf546d390 746 } // End of while ( ! uidComplete)
Tezcorp 0:879cf546d390 747
Tezcorp 0:879cf546d390 748 // Set correct uid->size
Tezcorp 0:879cf546d390 749 uid->size = 3 * cascadeLevel + 1;
Tezcorp 0:879cf546d390 750
Tezcorp 0:879cf546d390 751 return STATUS_OK;
Tezcorp 0:879cf546d390 752 } // End PICC_Select()
Tezcorp 0:879cf546d390 753
Tezcorp 0:879cf546d390 754 /*
Tezcorp 0:879cf546d390 755 * Instructs a PICC in state ACTIVE(*) to go to state HALT.
Tezcorp 0:879cf546d390 756 */
Tezcorp 0:879cf546d390 757 uint8_t MFRC522::PICC_HaltA()
Tezcorp 0:879cf546d390 758 {
Tezcorp 0:879cf546d390 759 uint8_t result;
Tezcorp 0:879cf546d390 760 uint8_t buffer[4];
Tezcorp 0:879cf546d390 761
Tezcorp 0:879cf546d390 762 // Build command buffer
Tezcorp 0:879cf546d390 763 buffer[0] = PICC_CMD_HLTA;
Tezcorp 0:879cf546d390 764 buffer[1] = 0;
Tezcorp 0:879cf546d390 765
Tezcorp 0:879cf546d390 766 // Calculate CRC_A
Tezcorp 0:879cf546d390 767 result = PCD_CalculateCRC(buffer, 2, &buffer[2]);
Tezcorp 0:879cf546d390 768 if (result == STATUS_OK)
Tezcorp 0:879cf546d390 769 {
Tezcorp 0:879cf546d390 770 // Send the command.
Tezcorp 0:879cf546d390 771 // The standard says:
Tezcorp 0:879cf546d390 772 // If the PICC responds with any modulation during a period of 1 ms after the end of the frame containing the
Tezcorp 0:879cf546d390 773 // HLTA command, this response shall be interpreted as 'not acknowledge'.
Tezcorp 0:879cf546d390 774 // We interpret that this way: Only STATUS_TIMEOUT is an success.
Tezcorp 0:879cf546d390 775 result = PCD_TransceiveData(buffer, sizeof(buffer), NULL, 0);
Tezcorp 0:879cf546d390 776 if (result == STATUS_TIMEOUT)
Tezcorp 0:879cf546d390 777 {
Tezcorp 0:879cf546d390 778 result = STATUS_OK;
Tezcorp 0:879cf546d390 779 }
Tezcorp 0:879cf546d390 780 else if (result == STATUS_OK)
Tezcorp 0:879cf546d390 781 { // That is ironically NOT ok in this case ;-)
Tezcorp 0:879cf546d390 782 result = STATUS_ERROR;
Tezcorp 0:879cf546d390 783 }
Tezcorp 0:879cf546d390 784 }
Tezcorp 0:879cf546d390 785
Tezcorp 0:879cf546d390 786 return result;
Tezcorp 0:879cf546d390 787 } // End PICC_HaltA()
Tezcorp 0:879cf546d390 788
Tezcorp 0:879cf546d390 789
Tezcorp 0:879cf546d390 790 /////////////////////////////////////////////////////////////////////////////////////
Tezcorp 0:879cf546d390 791 // Functions for communicating with MIFARE PICCs
Tezcorp 0:879cf546d390 792 /////////////////////////////////////////////////////////////////////////////////////
Tezcorp 0:879cf546d390 793
Tezcorp 0:879cf546d390 794 /*
Tezcorp 0:879cf546d390 795 * Executes the MFRC522 MFAuthent command.
Tezcorp 0:879cf546d390 796 */
Tezcorp 0:879cf546d390 797 uint8_t MFRC522::PCD_Authenticate(uint8_t command, uint8_t blockAddr, MIFARE_Key *key, Uid *uid)
Tezcorp 0:879cf546d390 798 {
Tezcorp 0:879cf546d390 799 uint8_t i, waitIRq = 0x10; // IdleIRq
Tezcorp 0:879cf546d390 800
Tezcorp 0:879cf546d390 801 // Build command buffer
Tezcorp 0:879cf546d390 802 uint8_t sendData[12];
Tezcorp 0:879cf546d390 803 sendData[0] = command;
Tezcorp 0:879cf546d390 804 sendData[1] = blockAddr;
Tezcorp 0:879cf546d390 805
Tezcorp 0:879cf546d390 806 for (i = 0; i < MF_KEY_SIZE; i++)
Tezcorp 0:879cf546d390 807 { // 6 key bytes
Tezcorp 0:879cf546d390 808 sendData[2+i] = key->keyByte[i];
Tezcorp 0:879cf546d390 809 }
Tezcorp 0:879cf546d390 810
Tezcorp 0:879cf546d390 811 for (i = 0; i < 4; i++)
Tezcorp 0:879cf546d390 812 { // The first 4 bytes of the UID
Tezcorp 0:879cf546d390 813 sendData[8+i] = uid->uidByte[i];
Tezcorp 0:879cf546d390 814 }
Tezcorp 0:879cf546d390 815
Tezcorp 0:879cf546d390 816 // Start the authentication.
Tezcorp 0:879cf546d390 817 return PCD_CommunicateWithPICC(PCD_MFAuthent, waitIRq, &sendData[0], sizeof(sendData));
Tezcorp 0:879cf546d390 818 } // End PCD_Authenticate()
Tezcorp 0:879cf546d390 819
Tezcorp 0:879cf546d390 820 /*
Tezcorp 0:879cf546d390 821 * Used to exit the PCD from its authenticated state.
Tezcorp 0:879cf546d390 822 * Remember to call this function after communicating with an authenticated PICC - otherwise no new communications can start.
Tezcorp 0:879cf546d390 823 */
Tezcorp 0:879cf546d390 824 void MFRC522::PCD_StopCrypto1()
Tezcorp 0:879cf546d390 825 {
Tezcorp 0:879cf546d390 826 // Clear MFCrypto1On bit
Tezcorp 0:879cf546d390 827 PCD_ClrRegisterBits(Status2Reg, 0x08); // Status2Reg[7..0] bits are: TempSensClear I2CForceHS reserved reserved MFCrypto1On ModemState[2:0]
Tezcorp 0:879cf546d390 828 } // End PCD_StopCrypto1()
Tezcorp 0:879cf546d390 829
Tezcorp 0:879cf546d390 830 /*
Tezcorp 0:879cf546d390 831 * Reads 16 bytes (+ 2 bytes CRC_A) from the active PICC.
Tezcorp 0:879cf546d390 832 */
Tezcorp 0:879cf546d390 833 uint8_t MFRC522::MIFARE_Read(uint8_t blockAddr, uint8_t *buffer, uint8_t *bufferSize)
Tezcorp 0:879cf546d390 834 {
Tezcorp 0:879cf546d390 835 uint8_t result = STATUS_NO_ROOM;
Tezcorp 0:879cf546d390 836
Tezcorp 0:879cf546d390 837 // Sanity check
Tezcorp 0:879cf546d390 838 if ((buffer == NULL) || (*bufferSize < 18))
Tezcorp 0:879cf546d390 839 {
Tezcorp 0:879cf546d390 840 return result;
Tezcorp 0:879cf546d390 841 }
Tezcorp 0:879cf546d390 842
Tezcorp 0:879cf546d390 843 // Build command buffer
Tezcorp 0:879cf546d390 844 buffer[0] = PICC_CMD_MF_READ;
Tezcorp 0:879cf546d390 845 buffer[1] = blockAddr;
Tezcorp 0:879cf546d390 846
Tezcorp 0:879cf546d390 847 // Calculate CRC_A
Tezcorp 0:879cf546d390 848 result = PCD_CalculateCRC(buffer, 2, &buffer[2]);
Tezcorp 0:879cf546d390 849 if (result != STATUS_OK)
Tezcorp 0:879cf546d390 850 {
Tezcorp 0:879cf546d390 851 return result;
Tezcorp 0:879cf546d390 852 }
Tezcorp 0:879cf546d390 853
Tezcorp 0:879cf546d390 854 // Transmit the buffer and receive the response, validate CRC_A.
Tezcorp 0:879cf546d390 855 return PCD_TransceiveData(buffer, 4, buffer, bufferSize, NULL, 0, true);
Tezcorp 0:879cf546d390 856 } // End MIFARE_Read()
Tezcorp 0:879cf546d390 857
Tezcorp 0:879cf546d390 858 /*
Tezcorp 0:879cf546d390 859 * Writes 16 bytes to the active PICC.
Tezcorp 0:879cf546d390 860 */
Tezcorp 0:879cf546d390 861 uint8_t MFRC522::MIFARE_Write(uint8_t blockAddr, uint8_t *buffer, uint8_t bufferSize)
Tezcorp 0:879cf546d390 862 {
Tezcorp 0:879cf546d390 863 uint8_t result;
Tezcorp 0:879cf546d390 864
Tezcorp 0:879cf546d390 865 // Sanity check
Tezcorp 0:879cf546d390 866 if (buffer == NULL || bufferSize < 16)
Tezcorp 0:879cf546d390 867 {
Tezcorp 0:879cf546d390 868 return STATUS_INVALID;
Tezcorp 0:879cf546d390 869 }
Tezcorp 0:879cf546d390 870
Tezcorp 0:879cf546d390 871 // Mifare Classic protocol requires two communications to perform a write.
Tezcorp 0:879cf546d390 872 // Step 1: Tell the PICC we want to write to block blockAddr.
Tezcorp 0:879cf546d390 873 uint8_t cmdBuffer[2];
Tezcorp 0:879cf546d390 874 cmdBuffer[0] = PICC_CMD_MF_WRITE;
Tezcorp 0:879cf546d390 875 cmdBuffer[1] = blockAddr;
Tezcorp 0:879cf546d390 876 // Adds CRC_A and checks that the response is MF_ACK.
Tezcorp 0:879cf546d390 877 result = PCD_MIFARE_Transceive(cmdBuffer, 2);
Tezcorp 0:879cf546d390 878 if (result != STATUS_OK)
Tezcorp 0:879cf546d390 879 {
Tezcorp 0:879cf546d390 880 return result;
Tezcorp 0:879cf546d390 881 }
Tezcorp 0:879cf546d390 882
Tezcorp 0:879cf546d390 883 // Step 2: Transfer the data
Tezcorp 0:879cf546d390 884 // Adds CRC_A and checks that the response is MF_ACK.
Tezcorp 0:879cf546d390 885 result = PCD_MIFARE_Transceive(buffer, bufferSize);
Tezcorp 0:879cf546d390 886 if (result != STATUS_OK)
Tezcorp 0:879cf546d390 887 {
Tezcorp 0:879cf546d390 888 return result;
Tezcorp 0:879cf546d390 889 }
Tezcorp 0:879cf546d390 890
Tezcorp 0:879cf546d390 891 return STATUS_OK;
Tezcorp 0:879cf546d390 892 } // End MIFARE_Write()
Tezcorp 0:879cf546d390 893
Tezcorp 0:879cf546d390 894 /*
Tezcorp 0:879cf546d390 895 * Writes a 4 byte page to the active MIFARE Ultralight PICC.
Tezcorp 0:879cf546d390 896 */
Tezcorp 0:879cf546d390 897 uint8_t MFRC522::MIFARE_UltralightWrite(uint8_t page, uint8_t *buffer, uint8_t bufferSize)
Tezcorp 0:879cf546d390 898 {
Tezcorp 0:879cf546d390 899 uint8_t result;
Tezcorp 0:879cf546d390 900
Tezcorp 0:879cf546d390 901 // Sanity check
Tezcorp 0:879cf546d390 902 if (buffer == NULL || bufferSize < 4)
Tezcorp 0:879cf546d390 903 {
Tezcorp 0:879cf546d390 904 return STATUS_INVALID;
Tezcorp 0:879cf546d390 905 }
Tezcorp 0:879cf546d390 906
Tezcorp 0:879cf546d390 907 // Build commmand buffer
Tezcorp 0:879cf546d390 908 uint8_t cmdBuffer[6];
Tezcorp 0:879cf546d390 909 cmdBuffer[0] = PICC_CMD_UL_WRITE;
Tezcorp 0:879cf546d390 910 cmdBuffer[1] = page;
Tezcorp 0:879cf546d390 911 memcpy(&cmdBuffer[2], buffer, 4);
Tezcorp 0:879cf546d390 912
Tezcorp 0:879cf546d390 913 // Perform the write
Tezcorp 0:879cf546d390 914 result = PCD_MIFARE_Transceive(cmdBuffer, 6); // Adds CRC_A and checks that the response is MF_ACK.
Tezcorp 0:879cf546d390 915 if (result != STATUS_OK)
Tezcorp 0:879cf546d390 916 {
Tezcorp 0:879cf546d390 917 return result;
Tezcorp 0:879cf546d390 918 }
Tezcorp 0:879cf546d390 919
Tezcorp 0:879cf546d390 920 return STATUS_OK;
Tezcorp 0:879cf546d390 921 } // End MIFARE_Ultralight_Write()
Tezcorp 0:879cf546d390 922
Tezcorp 0:879cf546d390 923 /*
Tezcorp 0:879cf546d390 924 * MIFARE Decrement subtracts the delta from the value of the addressed block, and stores the result in a volatile memory.
Tezcorp 0:879cf546d390 925 */
Tezcorp 0:879cf546d390 926 uint8_t MFRC522::MIFARE_Decrement(uint8_t blockAddr, uint32_t delta)
Tezcorp 0:879cf546d390 927 {
Tezcorp 0:879cf546d390 928 return MIFARE_TwoStepHelper(PICC_CMD_MF_DECREMENT, blockAddr, delta);
Tezcorp 0:879cf546d390 929 } // End MIFARE_Decrement()
Tezcorp 0:879cf546d390 930
Tezcorp 0:879cf546d390 931 /*
Tezcorp 0:879cf546d390 932 * MIFARE Increment adds the delta to the value of the addressed block, and stores the result in a volatile memory.
Tezcorp 0:879cf546d390 933 */
Tezcorp 0:879cf546d390 934 uint8_t MFRC522::MIFARE_Increment(uint8_t blockAddr, uint32_t delta)
Tezcorp 0:879cf546d390 935 {
Tezcorp 0:879cf546d390 936 return MIFARE_TwoStepHelper(PICC_CMD_MF_INCREMENT, blockAddr, delta);
Tezcorp 0:879cf546d390 937 } // End MIFARE_Increment()
Tezcorp 0:879cf546d390 938
Tezcorp 0:879cf546d390 939 /**
Tezcorp 0:879cf546d390 940 * MIFARE Restore copies the value of the addressed block into a volatile memory.
Tezcorp 0:879cf546d390 941 */
Tezcorp 0:879cf546d390 942 uint8_t MFRC522::MIFARE_Restore(uint8_t blockAddr)
Tezcorp 0:879cf546d390 943 {
Tezcorp 0:879cf546d390 944 // The datasheet describes Restore as a two step operation, but does not explain what data to transfer in step 2.
Tezcorp 0:879cf546d390 945 // Doing only a single step does not work, so I chose to transfer 0L in step two.
Tezcorp 0:879cf546d390 946 return MIFARE_TwoStepHelper(PICC_CMD_MF_RESTORE, blockAddr, 0L);
Tezcorp 0:879cf546d390 947 } // End MIFARE_Restore()
Tezcorp 0:879cf546d390 948
Tezcorp 0:879cf546d390 949 /*
Tezcorp 0:879cf546d390 950 * Helper function for the two-step MIFARE Classic protocol operations Decrement, Increment and Restore.
Tezcorp 0:879cf546d390 951 */
Tezcorp 0:879cf546d390 952 uint8_t MFRC522::MIFARE_TwoStepHelper(uint8_t command, uint8_t blockAddr, uint32_t data)
Tezcorp 0:879cf546d390 953 {
Tezcorp 0:879cf546d390 954 uint8_t result;
Tezcorp 0:879cf546d390 955 uint8_t cmdBuffer[2]; // We only need room for 2 bytes.
Tezcorp 0:879cf546d390 956
Tezcorp 0:879cf546d390 957 // Step 1: Tell the PICC the command and block address
Tezcorp 0:879cf546d390 958 cmdBuffer[0] = command;
Tezcorp 0:879cf546d390 959 cmdBuffer[1] = blockAddr;
Tezcorp 0:879cf546d390 960
Tezcorp 0:879cf546d390 961 // Adds CRC_A and checks that the response is MF_ACK.
Tezcorp 0:879cf546d390 962 result = PCD_MIFARE_Transceive(cmdBuffer, 2);
Tezcorp 0:879cf546d390 963 if (result != STATUS_OK)
Tezcorp 0:879cf546d390 964 {
Tezcorp 0:879cf546d390 965 return result;
Tezcorp 0:879cf546d390 966 }
Tezcorp 0:879cf546d390 967
Tezcorp 0:879cf546d390 968 // Step 2: Transfer the data
Tezcorp 0:879cf546d390 969 // Adds CRC_A and accept timeout as success.
Tezcorp 0:879cf546d390 970 result = PCD_MIFARE_Transceive((uint8_t *) &data, 4, true);
Tezcorp 0:879cf546d390 971 if (result != STATUS_OK)
Tezcorp 0:879cf546d390 972 {
Tezcorp 0:879cf546d390 973 return result;
Tezcorp 0:879cf546d390 974 }
Tezcorp 0:879cf546d390 975
Tezcorp 0:879cf546d390 976 return STATUS_OK;
Tezcorp 0:879cf546d390 977 } // End MIFARE_TwoStepHelper()
Tezcorp 0:879cf546d390 978
Tezcorp 0:879cf546d390 979 /*
Tezcorp 0:879cf546d390 980 * MIFARE Transfer writes the value stored in the volatile memory into one MIFARE Classic block.
Tezcorp 0:879cf546d390 981 */
Tezcorp 0:879cf546d390 982 uint8_t MFRC522::MIFARE_Transfer(uint8_t blockAddr)
Tezcorp 0:879cf546d390 983 {
Tezcorp 0:879cf546d390 984 uint8_t cmdBuffer[2]; // We only need room for 2 bytes.
Tezcorp 0:879cf546d390 985
Tezcorp 0:879cf546d390 986 // Tell the PICC we want to transfer the result into block blockAddr.
Tezcorp 0:879cf546d390 987 cmdBuffer[0] = PICC_CMD_MF_TRANSFER;
Tezcorp 0:879cf546d390 988 cmdBuffer[1] = blockAddr;
Tezcorp 0:879cf546d390 989
Tezcorp 0:879cf546d390 990 // Adds CRC_A and checks that the response is MF_ACK.
Tezcorp 0:879cf546d390 991 return PCD_MIFARE_Transceive(cmdBuffer, 2);
Tezcorp 0:879cf546d390 992 } // End MIFARE_Transfer()
Tezcorp 0:879cf546d390 993
Tezcorp 0:879cf546d390 994
Tezcorp 0:879cf546d390 995 /////////////////////////////////////////////////////////////////////////////////////
Tezcorp 0:879cf546d390 996 // Support functions
Tezcorp 0:879cf546d390 997 /////////////////////////////////////////////////////////////////////////////////////
Tezcorp 0:879cf546d390 998
Tezcorp 0:879cf546d390 999 /*
Tezcorp 0:879cf546d390 1000 * Wrapper for MIFARE protocol communication.
Tezcorp 0:879cf546d390 1001 * Adds CRC_A, executes the Transceive command and checks that the response is MF_ACK or a timeout.
Tezcorp 0:879cf546d390 1002 */
Tezcorp 0:879cf546d390 1003 uint8_t MFRC522::PCD_MIFARE_Transceive(uint8_t *sendData, uint8_t sendLen, bool acceptTimeout)
Tezcorp 0:879cf546d390 1004 {
Tezcorp 0:879cf546d390 1005 uint8_t result;
Tezcorp 0:879cf546d390 1006 uint8_t cmdBuffer[18]; // We need room for 16 bytes data and 2 bytes CRC_A.
Tezcorp 0:879cf546d390 1007
Tezcorp 0:879cf546d390 1008 // Sanity check
Tezcorp 0:879cf546d390 1009 if (sendData == NULL || sendLen > 16)
Tezcorp 0:879cf546d390 1010 {
Tezcorp 0:879cf546d390 1011 return STATUS_INVALID;
Tezcorp 0:879cf546d390 1012 }
Tezcorp 0:879cf546d390 1013
Tezcorp 0:879cf546d390 1014 // Copy sendData[] to cmdBuffer[] and add CRC_A
Tezcorp 0:879cf546d390 1015 memcpy(cmdBuffer, sendData, sendLen);
Tezcorp 0:879cf546d390 1016 result = PCD_CalculateCRC(cmdBuffer, sendLen, &cmdBuffer[sendLen]);
Tezcorp 0:879cf546d390 1017 if (result != STATUS_OK)
Tezcorp 0:879cf546d390 1018 {
Tezcorp 0:879cf546d390 1019 return result;
Tezcorp 0:879cf546d390 1020 }
Tezcorp 0:879cf546d390 1021
Tezcorp 0:879cf546d390 1022 sendLen += 2;
Tezcorp 0:879cf546d390 1023
Tezcorp 0:879cf546d390 1024 // Transceive the data, store the reply in cmdBuffer[]
Tezcorp 0:879cf546d390 1025 uint8_t waitIRq = 0x30; // RxIRq and IdleIRq
Tezcorp 0:879cf546d390 1026 uint8_t cmdBufferSize = sizeof(cmdBuffer);
Tezcorp 0:879cf546d390 1027 uint8_t validBits = 0;
Tezcorp 0:879cf546d390 1028 result = PCD_CommunicateWithPICC(PCD_Transceive, waitIRq, cmdBuffer, sendLen, cmdBuffer, &cmdBufferSize, &validBits);
Tezcorp 0:879cf546d390 1029 if (acceptTimeout && result == STATUS_TIMEOUT)
Tezcorp 0:879cf546d390 1030 {
Tezcorp 0:879cf546d390 1031 return STATUS_OK;
Tezcorp 0:879cf546d390 1032 }
Tezcorp 0:879cf546d390 1033
Tezcorp 0:879cf546d390 1034 if (result != STATUS_OK)
Tezcorp 0:879cf546d390 1035 {
Tezcorp 0:879cf546d390 1036 return result;
Tezcorp 0:879cf546d390 1037 }
Tezcorp 0:879cf546d390 1038
Tezcorp 0:879cf546d390 1039 // The PICC must reply with a 4 bit ACK
Tezcorp 0:879cf546d390 1040 if (cmdBufferSize != 1 || validBits != 4)
Tezcorp 0:879cf546d390 1041 {
Tezcorp 0:879cf546d390 1042 return STATUS_ERROR;
Tezcorp 0:879cf546d390 1043 }
Tezcorp 0:879cf546d390 1044
Tezcorp 0:879cf546d390 1045 if (cmdBuffer[0] != MF_ACK)
Tezcorp 0:879cf546d390 1046 {
Tezcorp 0:879cf546d390 1047 return STATUS_MIFARE_NACK;
Tezcorp 0:879cf546d390 1048 }
Tezcorp 0:879cf546d390 1049
Tezcorp 0:879cf546d390 1050 return STATUS_OK;
Tezcorp 0:879cf546d390 1051 } // End PCD_MIFARE_Transceive()
Tezcorp 0:879cf546d390 1052
Tezcorp 0:879cf546d390 1053
Tezcorp 0:879cf546d390 1054 /*
Tezcorp 0:879cf546d390 1055 * Translates the SAK (Select Acknowledge) to a PICC type.
Tezcorp 0:879cf546d390 1056 */
Tezcorp 0:879cf546d390 1057 uint8_t MFRC522::PICC_GetType(uint8_t sak)
Tezcorp 0:879cf546d390 1058 {
Tezcorp 0:879cf546d390 1059 uint8_t retType = PICC_TYPE_UNKNOWN;
Tezcorp 0:879cf546d390 1060
Tezcorp 0:879cf546d390 1061 if (sak & 0x04)
Tezcorp 0:879cf546d390 1062 { // UID not complete
Tezcorp 0:879cf546d390 1063 retType = PICC_TYPE_NOT_COMPLETE;
Tezcorp 0:879cf546d390 1064 }
Tezcorp 0:879cf546d390 1065 else
Tezcorp 0:879cf546d390 1066 {
Tezcorp 0:879cf546d390 1067 switch (sak)
Tezcorp 0:879cf546d390 1068 {
Tezcorp 0:879cf546d390 1069 case 0x09: retType = PICC_TYPE_MIFARE_MINI; break;
Tezcorp 0:879cf546d390 1070 case 0x08: retType = PICC_TYPE_MIFARE_1K; break;
Tezcorp 0:879cf546d390 1071 case 0x18: retType = PICC_TYPE_MIFARE_4K; break;
Tezcorp 0:879cf546d390 1072 case 0x00: retType = PICC_TYPE_MIFARE_UL; break;
Tezcorp 0:879cf546d390 1073 case 0x10:
Tezcorp 0:879cf546d390 1074 case 0x11: retType = PICC_TYPE_MIFARE_PLUS; break;
Tezcorp 0:879cf546d390 1075 case 0x01: retType = PICC_TYPE_TNP3XXX; break;
Tezcorp 0:879cf546d390 1076 default:
Tezcorp 0:879cf546d390 1077 if (sak & 0x20)
Tezcorp 0:879cf546d390 1078 {
Tezcorp 0:879cf546d390 1079 retType = PICC_TYPE_ISO_14443_4;
Tezcorp 0:879cf546d390 1080 }
Tezcorp 0:879cf546d390 1081 else if (sak & 0x40)
Tezcorp 0:879cf546d390 1082 {
Tezcorp 0:879cf546d390 1083 retType = PICC_TYPE_ISO_18092;
Tezcorp 0:879cf546d390 1084 }
Tezcorp 0:879cf546d390 1085 break;
Tezcorp 0:879cf546d390 1086 }
Tezcorp 0:879cf546d390 1087 }
Tezcorp 0:879cf546d390 1088
Tezcorp 0:879cf546d390 1089 return (retType);
Tezcorp 0:879cf546d390 1090 } // End PICC_GetType()
Tezcorp 0:879cf546d390 1091
Tezcorp 0:879cf546d390 1092 /*
Tezcorp 0:879cf546d390 1093 * Returns a string pointer to the PICC type name.
Tezcorp 0:879cf546d390 1094 */
Tezcorp 0:879cf546d390 1095 char* MFRC522::PICC_GetTypeName(uint8_t piccType)
Tezcorp 0:879cf546d390 1096 {
Tezcorp 0:879cf546d390 1097 if(piccType == PICC_TYPE_NOT_COMPLETE)
Tezcorp 0:879cf546d390 1098 {
Tezcorp 0:879cf546d390 1099 piccType = MFRC522_MaxPICCs - 1;
Tezcorp 0:879cf546d390 1100 }
Tezcorp 0:879cf546d390 1101
Tezcorp 0:879cf546d390 1102 return((char *) _TypeNamePICC[piccType]);
Tezcorp 0:879cf546d390 1103 } // End PICC_GetTypeName()
Tezcorp 0:879cf546d390 1104
Tezcorp 0:879cf546d390 1105 /*
Tezcorp 0:879cf546d390 1106 * Returns a string pointer to a status code name.
Tezcorp 0:879cf546d390 1107 */
Tezcorp 0:879cf546d390 1108 char* MFRC522::GetStatusCodeName(uint8_t code)
Tezcorp 0:879cf546d390 1109 {
Tezcorp 0:879cf546d390 1110 return((char *) _ErrorMessage[code]);
Tezcorp 0:879cf546d390 1111 } // End GetStatusCodeName()
Tezcorp 0:879cf546d390 1112
Tezcorp 0:879cf546d390 1113 /*
Tezcorp 0:879cf546d390 1114 * Calculates the bit pattern needed for the specified access bits. In the [C1 C2 C3] tupples C1 is MSB (=4) and C3 is LSB (=1).
Tezcorp 0:879cf546d390 1115 */
Tezcorp 0:879cf546d390 1116 void MFRC522::MIFARE_SetAccessBits(uint8_t *accessBitBuffer,
Tezcorp 0:879cf546d390 1117 uint8_t g0,
Tezcorp 0:879cf546d390 1118 uint8_t g1,
Tezcorp 0:879cf546d390 1119 uint8_t g2,
Tezcorp 0:879cf546d390 1120 uint8_t g3)
Tezcorp 0:879cf546d390 1121 {
Tezcorp 0:879cf546d390 1122 uint8_t c1 = ((g3 & 4) << 1) | ((g2 & 4) << 0) | ((g1 & 4) >> 1) | ((g0 & 4) >> 2);
Tezcorp 0:879cf546d390 1123 uint8_t c2 = ((g3 & 2) << 2) | ((g2 & 2) << 1) | ((g1 & 2) << 0) | ((g0 & 2) >> 1);
Tezcorp 0:879cf546d390 1124 uint8_t c3 = ((g3 & 1) << 3) | ((g2 & 1) << 2) | ((g1 & 1) << 1) | ((g0 & 1) << 0);
Tezcorp 0:879cf546d390 1125
Tezcorp 0:879cf546d390 1126 accessBitBuffer[0] = (~c2 & 0xF) << 4 | (~c1 & 0xF);
Tezcorp 0:879cf546d390 1127 accessBitBuffer[1] = c1 << 4 | (~c3 & 0xF);
Tezcorp 0:879cf546d390 1128 accessBitBuffer[2] = c3 << 4 | c2;
Tezcorp 0:879cf546d390 1129 } // End MIFARE_SetAccessBits()
Tezcorp 0:879cf546d390 1130
Tezcorp 0:879cf546d390 1131 /////////////////////////////////////////////////////////////////////////////////////
Tezcorp 0:879cf546d390 1132 // Convenience functions - does not add extra functionality
Tezcorp 0:879cf546d390 1133 /////////////////////////////////////////////////////////////////////////////////////
Tezcorp 0:879cf546d390 1134
Tezcorp 0:879cf546d390 1135 /*
Tezcorp 0:879cf546d390 1136 * Returns true if a PICC responds to PICC_CMD_REQA.
Tezcorp 0:879cf546d390 1137 * Only "new" cards in state IDLE are invited. Sleeping cards in state HALT are ignored.
Tezcorp 0:879cf546d390 1138 */
Tezcorp 0:879cf546d390 1139 bool MFRC522::PICC_IsNewCardPresent(void)
Tezcorp 0:879cf546d390 1140 {
Tezcorp 0:879cf546d390 1141 uint8_t bufferATQA[2];
Tezcorp 0:879cf546d390 1142 uint8_t bufferSize = sizeof(bufferATQA);
Tezcorp 0:879cf546d390 1143 uint8_t result = PICC_RequestA(bufferATQA, &bufferSize);
Tezcorp 0:879cf546d390 1144 return ((result == STATUS_OK) || (result == STATUS_COLLISION));
Tezcorp 0:879cf546d390 1145 } // End PICC_IsNewCardPresent()
Tezcorp 0:879cf546d390 1146
Tezcorp 0:879cf546d390 1147 /*
Tezcorp 0:879cf546d390 1148 * Simple wrapper around PICC_Select.
Tezcorp 0:879cf546d390 1149 */
Tezcorp 0:879cf546d390 1150 bool MFRC522::PICC_ReadCardSerial(void)
Tezcorp 0:879cf546d390 1151 {
Tezcorp 0:879cf546d390 1152 uint8_t result = PICC_Select(&uid);
Tezcorp 0:879cf546d390 1153 return (result == STATUS_OK);
Tezcorp 0:879cf546d390 1154 } // End PICC_ReadCardSerial()