This is a class which contains function to interface with the MLX75320

Dependents:   MLX75320_API

Committer:
TNU
Date:
Thu Feb 25 08:02:11 2016 +0000
Revision:
0:dfe498e03679
MLX75320 class

Who changed what in which revision?

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TNU 0:dfe498e03679 1 // ****************************************************************************
TNU 0:dfe498e03679 2 /*!
TNU 0:dfe498e03679 3 Module: Melexis Base SPI
TNU 0:dfe498e03679 4
TNU 0:dfe498e03679 5 Platform: Win32 - Win64 - embedded
TNU 0:dfe498e03679 6
TNU 0:dfe498e03679 7 \file MLX_BaseSPI.h
TNU 0:dfe498e03679 8
TNU 0:dfe498e03679 9 \brief Base control module the ASIC SPI, Melexis protocol.
TNU 0:dfe498e03679 10
TNU 0:dfe498e03679 11 \author Jean-F. Bernier
TNU 0:dfe498e03679 12
TNU 0:dfe498e03679 13 \since 2015-04-23
TNU 0:dfe498e03679 14 */
TNU 0:dfe498e03679 15 // ***************************************************************************
TNU 0:dfe498e03679 16
TNU 0:dfe498e03679 17 #ifndef _MLX_BASESPI_H_
TNU 0:dfe498e03679 18 #define _MLX_BASESPI_H_
TNU 0:dfe498e03679 19
TNU 0:dfe498e03679 20 #ifdef __cplusplus
TNU 0:dfe498e03679 21 extern "C" {
TNU 0:dfe498e03679 22 #endif
TNU 0:dfe498e03679 23
TNU 0:dfe498e03679 24 //*****************************************************************************
TNU 0:dfe498e03679 25 //*************** Header includes *********************************************
TNU 0:dfe498e03679 26 //*****************************************************************************
TNU 0:dfe498e03679 27 #include "typeDef.h"
TNU 0:dfe498e03679 28
TNU 0:dfe498e03679 29 //*****************************************************************************
TNU 0:dfe498e03679 30 //*************** Constants and Macros ****************************************
TNU 0:dfe498e03679 31 //*****************************************************************************
TNU 0:dfe498e03679 32 #define MLX_CRC_SZ 2 /// Bytes in SPI CRC field
TNU 0:dfe498e03679 33 #define MLX_SHORT_SZ 8 /// Bytes in short SPI packet
TNU 0:dfe498e03679 34 #define MLX_LONG1_SZ 300 /// Bytes in long SPI packet; BSI spec raw_data packet size
TNU 0:dfe498e03679 35 #define MLX_HDR_SZ 2 /// Bytes in SPI header field
TNU 0:dfe498e03679 36 #define MLX_LONG2_SZ 260 /// Bytes in ECHO packet
TNU 0:dfe498e03679 37
TNU 0:dfe498e03679 38 // Bytes in payload field
TNU 0:dfe498e03679 39 #define MLX_SHORT_DATA_SZ (MLX_SHORT_SZ - MLX_HDR_SZ - MLX_CRC_SZ)
TNU 0:dfe498e03679 40 #define MLX_LONG1_DATA_SZ (MLX_LONG1_SZ - MLX_HDR_SZ - MLX_CRC_SZ)
TNU 0:dfe498e03679 41 #define MLX_LONG2_DATA_SZ (MLX_LONG2_SZ - MLX_HDR_SZ - MLX_CRC_SZ)
TNU 0:dfe498e03679 42
TNU 0:dfe498e03679 43 #if defined(WIN32) || defined(_WIN64)
TNU 0:dfe498e03679 44 #ifdef SPI_EXPORTS
TNU 0:dfe498e03679 45 #define SPI_DLL __declspec(dllexport)
TNU 0:dfe498e03679 46 #else
TNU 0:dfe498e03679 47 #define SPI_DLL __declspec(dllimport)
TNU 0:dfe498e03679 48 #endif
TNU 0:dfe498e03679 49 #else
TNU 0:dfe498e03679 50 #define SPI_DLL
TNU 0:dfe498e03679 51 #endif
TNU 0:dfe498e03679 52
TNU 0:dfe498e03679 53
TNU 0:dfe498e03679 54
TNU 0:dfe498e03679 55 // Basic computation of the number of elements of a STATIC array
TNU 0:dfe498e03679 56 #define ARRAY_SZ(a) (sizeof(a)/sizeof(a[0]))
TNU 0:dfe498e03679 57
TNU 0:dfe498e03679 58 #ifndef BIT
TNU 0:dfe498e03679 59 // Constructs a mask of a single bit value. "OR" to make a mask: mask = BIT(3) | BIT(6) | BIT(12)
TNU 0:dfe498e03679 60 #define BIT(x) ( 1<<(x) )
TNU 0:dfe498e03679 61 #endif
TNU 0:dfe498e03679 62
TNU 0:dfe498e03679 63 // Set to 1, clear to 0, obtain value or flip a single bit in variable
TNU 0:dfe498e03679 64 #ifndef BIT_SET
TNU 0:dfe498e03679 65 #define BIT_SET(var, bit) ( (var) |= BIT(bit) )
TNU 0:dfe498e03679 66 #endif
TNU 0:dfe498e03679 67
TNU 0:dfe498e03679 68 #ifndef BIT_CLR
TNU 0:dfe498e03679 69 #define BIT_CLR(var, bit) ( (var) &= ~BIT(bit) )
TNU 0:dfe498e03679 70 #endif
TNU 0:dfe498e03679 71
TNU 0:dfe498e03679 72 #ifndef BIT_GET
TNU 0:dfe498e03679 73 #define BIT_GET(var, bit) ( (var) & BIT(bit) )
TNU 0:dfe498e03679 74 #endif
TNU 0:dfe498e03679 75
TNU 0:dfe498e03679 76 #ifndef BIT_FLIP
TNU 0:dfe498e03679 77 #define BIT_FLIP(var, bit) ( (var) ^= BIT(bit) )
TNU 0:dfe498e03679 78 #endif
TNU 0:dfe498e03679 79
TNU 0:dfe498e03679 80 // Set to 1, clear to 0, obtain value or flip a variable at specified bit MASK positions
TNU 0:dfe498e03679 81 #ifndef MASK_SET
TNU 0:dfe498e03679 82 #define MASK_SET(var, mask) ( (var) |= (mask) )
TNU 0:dfe498e03679 83 #endif
TNU 0:dfe498e03679 84
TNU 0:dfe498e03679 85 #ifndef MASK_CLR
TNU 0:dfe498e03679 86 #define MASK_CLR(var, mask) ( (var) &= ~(mask) )
TNU 0:dfe498e03679 87 #endif
TNU 0:dfe498e03679 88
TNU 0:dfe498e03679 89 #ifndef MASK_GET
TNU 0:dfe498e03679 90 #define MASK_GET(var, mask) ( (var) & (mask) )
TNU 0:dfe498e03679 91 #endif
TNU 0:dfe498e03679 92
TNU 0:dfe498e03679 93 #ifndef MASK_FLIP
TNU 0:dfe498e03679 94 #define MASK_FLIP(var, mask) ( (var) ^= (mask) )
TNU 0:dfe498e03679 95 #endif
TNU 0:dfe498e03679 96 //*****************************************************************************
TNU 0:dfe498e03679 97 //*************** Data Type Definitions ***************************************
TNU 0:dfe498e03679 98 //*****************************************************************************
TNU 0:dfe498e03679 99
TNU 0:dfe498e03679 100 /// \enum FirmType
TNU 0:dfe498e03679 101 /// \brief Lists all firmware access types.
TNU 0:dfe498e03679 102 typedef enum
TNU 0:dfe498e03679 103 {
TNU 0:dfe498e03679 104 FW_OTP = 0,
TNU 0:dfe498e03679 105 FW_PROCESSED,
TNU 0:dfe498e03679 106 FW_RAW,
TNU 0:dfe498e03679 107 FW_PATCH,
TNU 0:dfe498e03679 108 FW_PRELOAD,
TNU 0:dfe498e03679 109 FW_TEST,
TNU 0:dfe498e03679 110 } FirmType;
TNU 0:dfe498e03679 111
TNU 0:dfe498e03679 112
TNU 0:dfe498e03679 113 /// \union PACK_SHORT
TNU 0:dfe498e03679 114 /// \brief Defines a short packet.
TNU 0:dfe498e03679 115 typedef union
TNU 0:dfe498e03679 116 {
TNU 0:dfe498e03679 117 // Main data buffer
TNU 0:dfe498e03679 118 uint8 buf[MLX_SHORT_SZ];
TNU 0:dfe498e03679 119
TNU 0:dfe498e03679 120 // Structured data: header, payload and CRC
TNU 0:dfe498e03679 121 struct
TNU 0:dfe498e03679 122 {
TNU 0:dfe498e03679 123 uint16 hdr;
TNU 0:dfe498e03679 124 uint8 data[MLX_SHORT_DATA_SZ];
TNU 0:dfe498e03679 125 uint16 crc;
TNU 0:dfe498e03679 126 };
TNU 0:dfe498e03679 127 } PACK_SHORT;
TNU 0:dfe498e03679 128
TNU 0:dfe498e03679 129
TNU 0:dfe498e03679 130 ///
TNU 0:dfe498e03679 131 /// MLXSPI uses 2 sized "long packets":
TNU 0:dfe498e03679 132 /// Trace data is trasmitted in 148 word long packets (LONG1)
TNU 0:dfe498e03679 133 /// Echo data and patch data are transmitted in 128 word packets (LONG2)
TNU 0:dfe498e03679 134 //
TNU 0:dfe498e03679 135 /// \union PACK_LONG1
TNU 0:dfe498e03679 136 /// \brief Defines a long packet.
TNU 0:dfe498e03679 137 typedef union
TNU 0:dfe498e03679 138 {
TNU 0:dfe498e03679 139 // Main data buffer
TNU 0:dfe498e03679 140 uint8 buf[MLX_LONG1_SZ];
TNU 0:dfe498e03679 141
TNU 0:dfe498e03679 142 // Structured data: header, payload and CRC
TNU 0:dfe498e03679 143 struct
TNU 0:dfe498e03679 144 {
TNU 0:dfe498e03679 145 uint16 hdr;
TNU 0:dfe498e03679 146 uint8 data[MLX_LONG1_DATA_SZ];
TNU 0:dfe498e03679 147 uint16 crc;
TNU 0:dfe498e03679 148 };
TNU 0:dfe498e03679 149 } PACK_LONG1;
TNU 0:dfe498e03679 150
TNU 0:dfe498e03679 151 /// \union PACK_LONG2
TNU 0:dfe498e03679 152 /// \brief Defines a long packet.
TNU 0:dfe498e03679 153 typedef union
TNU 0:dfe498e03679 154 {
TNU 0:dfe498e03679 155 // Main data buffer
TNU 0:dfe498e03679 156 uint8 buf[MLX_LONG2_SZ];
TNU 0:dfe498e03679 157
TNU 0:dfe498e03679 158 // Structured data: header, payload and CRC
TNU 0:dfe498e03679 159 struct
TNU 0:dfe498e03679 160 {
TNU 0:dfe498e03679 161 uint16 hdr;
TNU 0:dfe498e03679 162 uint8 data[MLX_LONG2_DATA_SZ];
TNU 0:dfe498e03679 163 uint16 crc;
TNU 0:dfe498e03679 164 };
TNU 0:dfe498e03679 165 } PACK_LONG2;
TNU 0:dfe498e03679 166
TNU 0:dfe498e03679 167
TNU 0:dfe498e03679 168 /// \enum PackType
TNU 0:dfe498e03679 169 /// \brief Lists all packet types.
TNU 0:dfe498e03679 170 typedef enum
TNU 0:dfe498e03679 171 {
TNU 0:dfe498e03679 172 PACK_RREG = 0, ///< Read register request
TNU 0:dfe498e03679 173 PACK_WREG, ///< Write register request
TNU 0:dfe498e03679 174 PACK_RFIRM, ///< Read firmware request
TNU 0:dfe498e03679 175 PACK_WFIRM, ///< Write firmware request
TNU 0:dfe498e03679 176 PACK_STATUS_S, ///< Status short
TNU 0:dfe498e03679 177 PACK_STATUS_L, ///< Status long
TNU 0:dfe498e03679 178 PACK_RDATA_RESP_S, ///< Read data response short
TNU 0:dfe498e03679 179 PACK_RDATA_RESP_L, ///< Read data response long
TNU 0:dfe498e03679 180 PACK_WDATA_L, ///< Write data long
TNU 0:dfe498e03679 181 } PackType;
TNU 0:dfe498e03679 182
TNU 0:dfe498e03679 183
TNU 0:dfe498e03679 184 /// \enum StatusType
TNU 0:dfe498e03679 185 /// \brief Lists all error statuses.
TNU 0:dfe498e03679 186 typedef enum
TNU 0:dfe498e03679 187 {
TNU 0:dfe498e03679 188 STAT_OK = 0,
TNU 0:dfe498e03679 189 STAT_BUSY,
TNU 0:dfe498e03679 190 STAT_CRC,
TNU 0:dfe498e03679 191 STAT_INVALID_REQ,
TNU 0:dfe498e03679 192 STAT_SEQ_NB,
TNU 0:dfe498e03679 193 STAT_TIMEOUT,
TNU 0:dfe498e03679 194 } StatusType;
TNU 0:dfe498e03679 195
TNU 0:dfe498e03679 196 /// \struct MLX_PackNfo
TNU 0:dfe498e03679 197 /// \brief Structure holding various data for packet encoding / decoding.
TNU 0:dfe498e03679 198 typedef struct
TNU 0:dfe498e03679 199 {
TNU 0:dfe498e03679 200 PackType pktype; ///< Packet type
TNU 0:dfe498e03679 201 uint8 size; ///< Size field
TNU 0:dfe498e03679 202 uint8 seq; ///< Sequence number
TNU 0:dfe498e03679 203 FirmType fwtype; ///< Firmware access type
TNU 0:dfe498e03679 204 uint16 addr; ///< Address field (register or firmware block)
TNU 0:dfe498e03679 205 uint32 data; ///< Useful data (register or firmware value)
TNU 0:dfe498e03679 206 const uint8 *dataP; ///< Data pointer for long packets (firmware write)
TNU 0:dfe498e03679 207 uint8 iserr; ///< Is error state for status packet
TNU 0:dfe498e03679 208 uint16 error; ///< Error qualifier for status packet
TNU 0:dfe498e03679 209 } MLX_PackNfo;
TNU 0:dfe498e03679 210
TNU 0:dfe498e03679 211 //*****************************************************************************
TNU 0:dfe498e03679 212 //*************** Public Function Declarations ********************************
TNU 0:dfe498e03679 213 //*****************************************************************************
TNU 0:dfe498e03679 214
TNU 0:dfe498e03679 215 // *********************
TNU 0:dfe498e03679 216 // *** Master functions
TNU 0:dfe498e03679 217 // *********************
TNU 0:dfe498e03679 218 int MLX_DecodeResS ( const PACK_SHORT *pack, uint32 *val);
TNU 0:dfe498e03679 219 int MLX_DecodeResL1 ( const PACK_LONG1 *pack);
TNU 0:dfe498e03679 220 int MLX_DecodeResL2 ( const PACK_LONG2 *pack);
TNU 0:dfe498e03679 221
TNU 0:dfe498e03679 222
TNU 0:dfe498e03679 223 int MLX_ReqReadReg ( PACK_SHORT *pack, uint16 reg);
TNU 0:dfe498e03679 224 int MLX_ReqWriteReg( PACK_SHORT *pack, uint16 reg, uint16 val);
TNU 0:dfe498e03679 225 int MLX_ReqReadTrc ( PACK_SHORT *pack);
TNU 0:dfe498e03679 226 int MLX_ReqReadEch ( PACK_SHORT *pack);
TNU 0:dfe498e03679 227 int MLX_ReqWriteFW ( PACK_SHORT *pack, uint size, uint16 data);
TNU 0:dfe498e03679 228
TNU 0:dfe498e03679 229 int MLX_WriteDataL2 ( PACK_LONG2 *pack, uint size, uint seq, const uint8 *data);
TNU 0:dfe498e03679 230
TNU 0:dfe498e03679 231 // *********************
TNU 0:dfe498e03679 232 // *** Slave functions
TNU 0:dfe498e03679 233 // *********************
TNU 0:dfe498e03679 234 int MLX_DecodeReqS ( const PACK_SHORT *pack, MLX_PackNfo *nfo);
TNU 0:dfe498e03679 235 int MLX_ResReadReg ( PACK_SHORT *pack, uint16 val);
TNU 0:dfe498e03679 236 int MLX_ResReadDataL1( PACK_LONG1 *pack, uint size, uint seq, const uint8 *data);
TNU 0:dfe498e03679 237 int MLX_ResReadDataL2( PACK_LONG2 *pack, uint size, uint seq, const uint8 *data);
TNU 0:dfe498e03679 238
TNU 0:dfe498e03679 239 // *********************
TNU 0:dfe498e03679 240 // *** Generic functions
TNU 0:dfe498e03679 241 // *********************
TNU 0:dfe498e03679 242 int MLX_EncodeStatusS( PACK_SHORT *pack, uint8 iserr, uint16 err);
TNU 0:dfe498e03679 243 int MLX_DecodeStatusS( const PACK_SHORT *pack, uint8 *iserr, uint16 *err);
TNU 0:dfe498e03679 244 int MLX_EncodeStatusL1( PACK_LONG1 *pack, uint8 iserr, uint16 err);
TNU 0:dfe498e03679 245 int MLX_DecodeStatusL1( const PACK_LONG1 *pack, uint8 *iserr, uint16 *err);
TNU 0:dfe498e03679 246 int MLX_EncodeStatusL2( PACK_LONG2 *pack, uint8 iserr, uint16 err);
TNU 0:dfe498e03679 247 int MLX_DecodeStatusL2( const PACK_LONG2 *pack, uint8 *iserr, uint16 *err);
TNU 0:dfe498e03679 248
TNU 0:dfe498e03679 249 SPI_DLL int SetBitVector( uint8 *buf, uint32 off, uchar wid, uint32 val, uchar inv);
TNU 0:dfe498e03679 250 SPI_DLL int GetBitVector( const uint8 *buf, uint32 off, uchar wid, uint32 *val, uchar inv);
TNU 0:dfe498e03679 251 SPI_DLL uint32 ReverseBits ( uint32 bits, char nb);
TNU 0:dfe498e03679 252
TNU 0:dfe498e03679 253 #ifdef __cplusplus
TNU 0:dfe498e03679 254 }
TNU 0:dfe498e03679 255 #endif
TNU 0:dfe498e03679 256
TNU 0:dfe498e03679 257 #endif // _MLX_BASESPI_H_
TNU 0:dfe498e03679 258