RX

Dependencies:   mbed BufferedSerial SX1276GenericLib X_NUCLEO_IKS01A2

Committer:
TMRL123
Date:
Wed Jun 05 00:25:53 2019 +0000
Revision:
0:fb7bf6d81e5f
RX

Who changed what in which revision?

UserRevisionLine numberNew contents of line
TMRL123 0:fb7bf6d81e5f 1 /*
TMRL123 0:fb7bf6d81e5f 2 * Copyright (c) 2017 Helmut Tschemernjak
TMRL123 0:fb7bf6d81e5f 3 * 30826 Garbsen (Hannover) Germany
TMRL123 0:fb7bf6d81e5f 4 * Licensed under the Apache License, Version 2.0);
TMRL123 0:fb7bf6d81e5f 5 */
TMRL123 0:fb7bf6d81e5f 6
TMRL123 0:fb7bf6d81e5f 7
TMRL123 0:fb7bf6d81e5f 8
TMRL123 0:fb7bf6d81e5f 9 #ifdef TARGET_NUCLEO_L476RG
TMRL123 0:fb7bf6d81e5f 10 #define FEATURE_LORA 1
TMRL123 0:fb7bf6d81e5f 11 #elif TARGET_DISCO_L072CZ_LRWAN1
TMRL123 0:fb7bf6d81e5f 12 #define FEATURE_LORA 1
TMRL123 0:fb7bf6d81e5f 13 #endif
TMRL123 0:fb7bf6d81e5f 14
TMRL123 0:fb7bf6d81e5f 15
TMRL123 0:fb7bf6d81e5f 16
TMRL123 0:fb7bf6d81e5f 17 #if defined(TARGET_DISCO_L072CZ_LRWAN1)
TMRL123 0:fb7bf6d81e5f 18
TMRL123 0:fb7bf6d81e5f 19 #define LORA_SPI_MOSI PA_7
TMRL123 0:fb7bf6d81e5f 20 #define LORA_SPI_MISO PA_6
TMRL123 0:fb7bf6d81e5f 21 #define LORA_SPI_SCLK PB_3
TMRL123 0:fb7bf6d81e5f 22 #define LORA_CS PA_15
TMRL123 0:fb7bf6d81e5f 23 #define LORA_RESET PC_0
TMRL123 0:fb7bf6d81e5f 24 #define LORA_DIO0 PB_4
TMRL123 0:fb7bf6d81e5f 25 #define LORA_DIO1 PB_1
TMRL123 0:fb7bf6d81e5f 26 #define LORA_DIO2 PB_0
TMRL123 0:fb7bf6d81e5f 27 #define LORA_DIO3 PC_13
TMRL123 0:fb7bf6d81e5f 28 #define LORA_DIO4 PA_5
TMRL123 0:fb7bf6d81e5f 29 #define LORA_DIO5 PA_4
TMRL123 0:fb7bf6d81e5f 30 #define LORA_ANT_RX PA_1
TMRL123 0:fb7bf6d81e5f 31 #define LORA_ANT_TX PC_2
TMRL123 0:fb7bf6d81e5f 32 #define LORA_ANT_BOOST PC_1
TMRL123 0:fb7bf6d81e5f 33 #define LORA_TCXO PA_12 // 32 MHz
TMRL123 0:fb7bf6d81e5f 34
TMRL123 0:fb7bf6d81e5f 35
TMRL123 0:fb7bf6d81e5f 36
TMRL123 0:fb7bf6d81e5f 37 #elif defined(TARGET_NUCLEO_L476RG) // using the RFM95 board
TMRL123 0:fb7bf6d81e5f 38
TMRL123 0:fb7bf6d81e5f 39 #define LORA_SPI_MOSI PC_12
TMRL123 0:fb7bf6d81e5f 40 #define LORA_SPI_MISO PC_11
TMRL123 0:fb7bf6d81e5f 41 #define LORA_SPI_SCLK PC_10
TMRL123 0:fb7bf6d81e5f 42 #define LORA_CS PA_0
TMRL123 0:fb7bf6d81e5f 43 #define LORA_RESET PA_1
TMRL123 0:fb7bf6d81e5f 44 #define LORA_DIO0 PD_2 // DIO0=TxDone/RXDone
TMRL123 0:fb7bf6d81e5f 45 #define LORA_DIO1 PB_7 //
TMRL123 0:fb7bf6d81e5f 46 #define LORA_DIO2 PC_14 // DIO2=FhssChangeChannel
TMRL123 0:fb7bf6d81e5f 47 #define LORA_DIO3 PC_15 // DIO3=CADDone
TMRL123 0:fb7bf6d81e5f 48 #define LORA_DIO4 PH_0 // ????
TMRL123 0:fb7bf6d81e5f 49 #define LORA_DIO5 NC // unused?
TMRL123 0:fb7bf6d81e5f 50
TMRL123 0:fb7bf6d81e5f 51 #endif