Steve Kim
mbed library sources(for async_print)
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targets/hal/TARGET_NXP/TARGET_LPC13XX/sleep.c@14:096882eb0961, 2013-08-05 (annotated)
- Committer:
- emilmont
- Date:
- Mon Aug 05 14:54:27 2013 +0000
- Revision:
- 14:096882eb0961
- Parent:
- 13:0645d8841f51
The LPC1347 board does not have an interface chip
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| emilmont | 10:3bc89ef62ce7 | 1 | /* mbed Microcontroller Library |
| emilmont | 10:3bc89ef62ce7 | 2 | * Copyright (c) 2006-2013 ARM Limited |
| emilmont | 10:3bc89ef62ce7 | 3 | * |
| emilmont | 10:3bc89ef62ce7 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| emilmont | 10:3bc89ef62ce7 | 5 | * you may not use this file except in compliance with the License. |
| emilmont | 10:3bc89ef62ce7 | 6 | * You may obtain a copy of the License at |
| emilmont | 10:3bc89ef62ce7 | 7 | * |
| emilmont | 10:3bc89ef62ce7 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| emilmont | 10:3bc89ef62ce7 | 9 | * |
| emilmont | 10:3bc89ef62ce7 | 10 | * Unless required by applicable law or agreed to in writing, software |
| emilmont | 10:3bc89ef62ce7 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| emilmont | 10:3bc89ef62ce7 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| emilmont | 10:3bc89ef62ce7 | 13 | * See the License for the specific language governing permissions and |
| emilmont | 10:3bc89ef62ce7 | 14 | * limitations under the License. |
| emilmont | 10:3bc89ef62ce7 | 15 | */ |
| emilmont | 10:3bc89ef62ce7 | 16 | #include "sleep_api.h" |
| emilmont | 10:3bc89ef62ce7 | 17 | #include "cmsis.h" |
| emilmont | 10:3bc89ef62ce7 | 18 | #include "mbed_interface.h" |
| emilmont | 10:3bc89ef62ce7 | 19 | |
| emilmont | 10:3bc89ef62ce7 | 20 | void sleep(void) { |
| emilmont | 10:3bc89ef62ce7 | 21 | // PCON[PD] set to sleep |
| emilmont | 10:3bc89ef62ce7 | 22 | LPC_PMU->PCON = 0x0; |
| emilmont | 10:3bc89ef62ce7 | 23 | |
| emilmont | 10:3bc89ef62ce7 | 24 | // SRC[SLEEPDEEP] set to 0 = sleep |
| emilmont | 10:3bc89ef62ce7 | 25 | SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk; |
| emilmont | 10:3bc89ef62ce7 | 26 | |
| emilmont | 10:3bc89ef62ce7 | 27 | // wait for interrupt |
| emilmont | 10:3bc89ef62ce7 | 28 | __WFI(); |
| emilmont | 10:3bc89ef62ce7 | 29 | } |
| emilmont | 10:3bc89ef62ce7 | 30 | |
| emilmont | 10:3bc89ef62ce7 | 31 | void deepsleep(void) { |
| emilmont | 10:3bc89ef62ce7 | 32 | // PCON[PD] set to deepsleep |
| emilmont | 10:3bc89ef62ce7 | 33 | LPC_PMU->PCON = 0x1; |
| emilmont | 10:3bc89ef62ce7 | 34 | |
| emilmont | 10:3bc89ef62ce7 | 35 | // SRC[SLEEPDEEP] set to 1 = deep sleep |
| emilmont | 10:3bc89ef62ce7 | 36 | SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; |
| emilmont | 10:3bc89ef62ce7 | 37 | |
| emilmont | 10:3bc89ef62ce7 | 38 | // Power up everything after powerdown |
| emilmont | 10:3bc89ef62ce7 | 39 | LPC_SYSCON->PDAWAKECFG &= 0xFFFFF800; |
| emilmont | 10:3bc89ef62ce7 | 40 | |
| emilmont | 10:3bc89ef62ce7 | 41 | // wait for interrupt |
| emilmont | 10:3bc89ef62ce7 | 42 | __WFI(); |
| emilmont | 10:3bc89ef62ce7 | 43 | } |