Bob Seque / mbed-dev

mbed library sources. Supersedes mbed-src.

Fork of mbed-dev by mbed official

targets/cmsis/core_cmSimd.h@57:dd901dec6bd0, 2016-01-30 (annotated)

Committer:
Splith
Date:
Sat Jan 30 16:48:54 2016 +0000
Revision:
57:dd901dec6bd0
Parent:
0:9b334a45a8ff 
Add USART3 pin mapping to Seeed arch max

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**************************************************************************//**
bogdanm 0:9b334a45a8ff 2 * @file core_cmSimd.h
bogdanm 0:9b334a45a8ff 3 * @brief CMSIS Cortex-M SIMD Header File
bogdanm 0:9b334a45a8ff 4 * @version V4.10
bogdanm 0:9b334a45a8ff 5 * @date 18. March 2015
bogdanm 0:9b334a45a8ff 6 *
bogdanm 0:9b334a45a8ff 7 * @note
bogdanm 0:9b334a45a8ff 8 *
bogdanm 0:9b334a45a8ff 9 ******************************************************************************/
bogdanm 0:9b334a45a8ff 10 /* Copyright (c) 2009 - 2014 ARM LIMITED
bogdanm 0:9b334a45a8ff 11
bogdanm 0:9b334a45a8ff 12 All rights reserved.
bogdanm 0:9b334a45a8ff 13 Redistribution and use in source and binary forms, with or without
bogdanm 0:9b334a45a8ff 14 modification, are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 - Redistributions of source code must retain the above copyright
bogdanm 0:9b334a45a8ff 16 notice, this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 0:9b334a45a8ff 18 notice, this list of conditions and the following disclaimer in the
bogdanm 0:9b334a45a8ff 19 documentation and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 0:9b334a45a8ff 21 to endorse or promote products derived from this software without
bogdanm 0:9b334a45a8ff 22 specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 0:9b334a45a8ff 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 0:9b334a45a8ff 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 0:9b334a45a8ff 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 0:9b334a45a8ff 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 0:9b334a45a8ff 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 0:9b334a45a8ff 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 0:9b334a45a8ff 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 0:9b334a45a8ff 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 35 ---------------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 #if defined ( __ICCARM__ )
bogdanm 0:9b334a45a8ff 39 #pragma system_include /* treat file as system include file for MISRA check */
bogdanm 0:9b334a45a8ff 40 #endif
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 #ifndef __CORE_CMSIMD_H
bogdanm 0:9b334a45a8ff 43 #define __CORE_CMSIMD_H
bogdanm 0:9b334a45a8ff 44
bogdanm 0:9b334a45a8ff 45 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 46 extern "C" {
bogdanm 0:9b334a45a8ff 47 #endif
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49
bogdanm 0:9b334a45a8ff 50 /*******************************************************************************
bogdanm 0:9b334a45a8ff 51 * Hardware Abstraction Layer
bogdanm 0:9b334a45a8ff 52 ******************************************************************************/
bogdanm 0:9b334a45a8ff 53
bogdanm 0:9b334a45a8ff 54
bogdanm 0:9b334a45a8ff 55 /* ################### Compiler specific Intrinsics ########################### */
bogdanm 0:9b334a45a8ff 56 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
bogdanm 0:9b334a45a8ff 57 Access to dedicated SIMD instructions
bogdanm 0:9b334a45a8ff 58 @{
bogdanm 0:9b334a45a8ff 59 */
bogdanm 0:9b334a45a8ff 60
bogdanm 0:9b334a45a8ff 61 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 0:9b334a45a8ff 62 /* ARM armcc specific functions */
bogdanm 0:9b334a45a8ff 63 #define __SADD8 __sadd8
bogdanm 0:9b334a45a8ff 64 #define __QADD8 __qadd8
bogdanm 0:9b334a45a8ff 65 #define __SHADD8 __shadd8
bogdanm 0:9b334a45a8ff 66 #define __UADD8 __uadd8
bogdanm 0:9b334a45a8ff 67 #define __UQADD8 __uqadd8
bogdanm 0:9b334a45a8ff 68 #define __UHADD8 __uhadd8
bogdanm 0:9b334a45a8ff 69 #define __SSUB8 __ssub8
bogdanm 0:9b334a45a8ff 70 #define __QSUB8 __qsub8
bogdanm 0:9b334a45a8ff 71 #define __SHSUB8 __shsub8
bogdanm 0:9b334a45a8ff 72 #define __USUB8 __usub8
bogdanm 0:9b334a45a8ff 73 #define __UQSUB8 __uqsub8
bogdanm 0:9b334a45a8ff 74 #define __UHSUB8 __uhsub8
bogdanm 0:9b334a45a8ff 75 #define __SADD16 __sadd16
bogdanm 0:9b334a45a8ff 76 #define __QADD16 __qadd16
bogdanm 0:9b334a45a8ff 77 #define __SHADD16 __shadd16
bogdanm 0:9b334a45a8ff 78 #define __UADD16 __uadd16
bogdanm 0:9b334a45a8ff 79 #define __UQADD16 __uqadd16
bogdanm 0:9b334a45a8ff 80 #define __UHADD16 __uhadd16
bogdanm 0:9b334a45a8ff 81 #define __SSUB16 __ssub16
bogdanm 0:9b334a45a8ff 82 #define __QSUB16 __qsub16
bogdanm 0:9b334a45a8ff 83 #define __SHSUB16 __shsub16
bogdanm 0:9b334a45a8ff 84 #define __USUB16 __usub16
bogdanm 0:9b334a45a8ff 85 #define __UQSUB16 __uqsub16
bogdanm 0:9b334a45a8ff 86 #define __UHSUB16 __uhsub16
bogdanm 0:9b334a45a8ff 87 #define __SASX __sasx
bogdanm 0:9b334a45a8ff 88 #define __QASX __qasx
bogdanm 0:9b334a45a8ff 89 #define __SHASX __shasx
bogdanm 0:9b334a45a8ff 90 #define __UASX __uasx
bogdanm 0:9b334a45a8ff 91 #define __UQASX __uqasx
bogdanm 0:9b334a45a8ff 92 #define __UHASX __uhasx
bogdanm 0:9b334a45a8ff 93 #define __SSAX __ssax
bogdanm 0:9b334a45a8ff 94 #define __QSAX __qsax
bogdanm 0:9b334a45a8ff 95 #define __SHSAX __shsax
bogdanm 0:9b334a45a8ff 96 #define __USAX __usax
bogdanm 0:9b334a45a8ff 97 #define __UQSAX __uqsax
bogdanm 0:9b334a45a8ff 98 #define __UHSAX __uhsax
bogdanm 0:9b334a45a8ff 99 #define __USAD8 __usad8
bogdanm 0:9b334a45a8ff 100 #define __USADA8 __usada8
bogdanm 0:9b334a45a8ff 101 #define __SSAT16 __ssat16
bogdanm 0:9b334a45a8ff 102 #define __USAT16 __usat16
bogdanm 0:9b334a45a8ff 103 #define __UXTB16 __uxtb16
bogdanm 0:9b334a45a8ff 104 #define __UXTAB16 __uxtab16
bogdanm 0:9b334a45a8ff 105 #define __SXTB16 __sxtb16
bogdanm 0:9b334a45a8ff 106 #define __SXTAB16 __sxtab16
bogdanm 0:9b334a45a8ff 107 #define __SMUAD __smuad
bogdanm 0:9b334a45a8ff 108 #define __SMUADX __smuadx
bogdanm 0:9b334a45a8ff 109 #define __SMLAD __smlad
bogdanm 0:9b334a45a8ff 110 #define __SMLADX __smladx
bogdanm 0:9b334a45a8ff 111 #define __SMLALD __smlald
bogdanm 0:9b334a45a8ff 112 #define __SMLALDX __smlaldx
bogdanm 0:9b334a45a8ff 113 #define __SMUSD __smusd
bogdanm 0:9b334a45a8ff 114 #define __SMUSDX __smusdx
bogdanm 0:9b334a45a8ff 115 #define __SMLSD __smlsd
bogdanm 0:9b334a45a8ff 116 #define __SMLSDX __smlsdx
bogdanm 0:9b334a45a8ff 117 #define __SMLSLD __smlsld
bogdanm 0:9b334a45a8ff 118 #define __SMLSLDX __smlsldx
bogdanm 0:9b334a45a8ff 119 #define __SEL __sel
bogdanm 0:9b334a45a8ff 120 #define __QADD __qadd
bogdanm 0:9b334a45a8ff 121 #define __QSUB __qsub
bogdanm 0:9b334a45a8ff 122
bogdanm 0:9b334a45a8ff 123 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
bogdanm 0:9b334a45a8ff 124 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
bogdanm 0:9b334a45a8ff 125
bogdanm 0:9b334a45a8ff 126 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
bogdanm 0:9b334a45a8ff 127 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
bogdanm 0:9b334a45a8ff 128
bogdanm 0:9b334a45a8ff 129 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
bogdanm 0:9b334a45a8ff 130 ((int64_t)(ARG3) << 32) ) >> 32))
bogdanm 0:9b334a45a8ff 131
bogdanm 0:9b334a45a8ff 132
bogdanm 0:9b334a45a8ff 133 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 0:9b334a45a8ff 134 /* GNU gcc specific functions */
bogdanm 0:9b334a45a8ff 135 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 136 {
bogdanm 0:9b334a45a8ff 137 uint32_t result;
bogdanm 0:9b334a45a8ff 138
bogdanm 0:9b334a45a8ff 139 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 140 return(result);
bogdanm 0:9b334a45a8ff 141 }
bogdanm 0:9b334a45a8ff 142
bogdanm 0:9b334a45a8ff 143 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 144 {
bogdanm 0:9b334a45a8ff 145 uint32_t result;
bogdanm 0:9b334a45a8ff 146
bogdanm 0:9b334a45a8ff 147 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 148 return(result);
bogdanm 0:9b334a45a8ff 149 }
bogdanm 0:9b334a45a8ff 150
bogdanm 0:9b334a45a8ff 151 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 152 {
bogdanm 0:9b334a45a8ff 153 uint32_t result;
bogdanm 0:9b334a45a8ff 154
bogdanm 0:9b334a45a8ff 155 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 156 return(result);
bogdanm 0:9b334a45a8ff 157 }
bogdanm 0:9b334a45a8ff 158
bogdanm 0:9b334a45a8ff 159 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 160 {
bogdanm 0:9b334a45a8ff 161 uint32_t result;
bogdanm 0:9b334a45a8ff 162
bogdanm 0:9b334a45a8ff 163 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 164 return(result);
bogdanm 0:9b334a45a8ff 165 }
bogdanm 0:9b334a45a8ff 166
bogdanm 0:9b334a45a8ff 167 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 168 {
bogdanm 0:9b334a45a8ff 169 uint32_t result;
bogdanm 0:9b334a45a8ff 170
bogdanm 0:9b334a45a8ff 171 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 172 return(result);
bogdanm 0:9b334a45a8ff 173 }
bogdanm 0:9b334a45a8ff 174
bogdanm 0:9b334a45a8ff 175 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 176 {
bogdanm 0:9b334a45a8ff 177 uint32_t result;
bogdanm 0:9b334a45a8ff 178
bogdanm 0:9b334a45a8ff 179 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 180 return(result);
bogdanm 0:9b334a45a8ff 181 }
bogdanm 0:9b334a45a8ff 182
bogdanm 0:9b334a45a8ff 183
bogdanm 0:9b334a45a8ff 184 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 185 {
bogdanm 0:9b334a45a8ff 186 uint32_t result;
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 189 return(result);
bogdanm 0:9b334a45a8ff 190 }
bogdanm 0:9b334a45a8ff 191
bogdanm 0:9b334a45a8ff 192 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 193 {
bogdanm 0:9b334a45a8ff 194 uint32_t result;
bogdanm 0:9b334a45a8ff 195
bogdanm 0:9b334a45a8ff 196 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 197 return(result);
bogdanm 0:9b334a45a8ff 198 }
bogdanm 0:9b334a45a8ff 199
bogdanm 0:9b334a45a8ff 200 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 201 {
bogdanm 0:9b334a45a8ff 202 uint32_t result;
bogdanm 0:9b334a45a8ff 203
bogdanm 0:9b334a45a8ff 204 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 205 return(result);
bogdanm 0:9b334a45a8ff 206 }
bogdanm 0:9b334a45a8ff 207
bogdanm 0:9b334a45a8ff 208 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 209 {
bogdanm 0:9b334a45a8ff 210 uint32_t result;
bogdanm 0:9b334a45a8ff 211
bogdanm 0:9b334a45a8ff 212 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 213 return(result);
bogdanm 0:9b334a45a8ff 214 }
bogdanm 0:9b334a45a8ff 215
bogdanm 0:9b334a45a8ff 216 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 217 {
bogdanm 0:9b334a45a8ff 218 uint32_t result;
bogdanm 0:9b334a45a8ff 219
bogdanm 0:9b334a45a8ff 220 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 221 return(result);
bogdanm 0:9b334a45a8ff 222 }
bogdanm 0:9b334a45a8ff 223
bogdanm 0:9b334a45a8ff 224 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 225 {
bogdanm 0:9b334a45a8ff 226 uint32_t result;
bogdanm 0:9b334a45a8ff 227
bogdanm 0:9b334a45a8ff 228 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 229 return(result);
bogdanm 0:9b334a45a8ff 230 }
bogdanm 0:9b334a45a8ff 231
bogdanm 0:9b334a45a8ff 232
bogdanm 0:9b334a45a8ff 233 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 234 {
bogdanm 0:9b334a45a8ff 235 uint32_t result;
bogdanm 0:9b334a45a8ff 236
bogdanm 0:9b334a45a8ff 237 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 238 return(result);
bogdanm 0:9b334a45a8ff 239 }
bogdanm 0:9b334a45a8ff 240
bogdanm 0:9b334a45a8ff 241 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 242 {
bogdanm 0:9b334a45a8ff 243 uint32_t result;
bogdanm 0:9b334a45a8ff 244
bogdanm 0:9b334a45a8ff 245 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 246 return(result);
bogdanm 0:9b334a45a8ff 247 }
bogdanm 0:9b334a45a8ff 248
bogdanm 0:9b334a45a8ff 249 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 250 {
bogdanm 0:9b334a45a8ff 251 uint32_t result;
bogdanm 0:9b334a45a8ff 252
bogdanm 0:9b334a45a8ff 253 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 254 return(result);
bogdanm 0:9b334a45a8ff 255 }
bogdanm 0:9b334a45a8ff 256
bogdanm 0:9b334a45a8ff 257 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 258 {
bogdanm 0:9b334a45a8ff 259 uint32_t result;
bogdanm 0:9b334a45a8ff 260
bogdanm 0:9b334a45a8ff 261 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 262 return(result);
bogdanm 0:9b334a45a8ff 263 }
bogdanm 0:9b334a45a8ff 264
bogdanm 0:9b334a45a8ff 265 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 266 {
bogdanm 0:9b334a45a8ff 267 uint32_t result;
bogdanm 0:9b334a45a8ff 268
bogdanm 0:9b334a45a8ff 269 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 270 return(result);
bogdanm 0:9b334a45a8ff 271 }
bogdanm 0:9b334a45a8ff 272
bogdanm 0:9b334a45a8ff 273 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 274 {
bogdanm 0:9b334a45a8ff 275 uint32_t result;
bogdanm 0:9b334a45a8ff 276
bogdanm 0:9b334a45a8ff 277 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 278 return(result);
bogdanm 0:9b334a45a8ff 279 }
bogdanm 0:9b334a45a8ff 280
bogdanm 0:9b334a45a8ff 281 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 282 {
bogdanm 0:9b334a45a8ff 283 uint32_t result;
bogdanm 0:9b334a45a8ff 284
bogdanm 0:9b334a45a8ff 285 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 286 return(result);
bogdanm 0:9b334a45a8ff 287 }
bogdanm 0:9b334a45a8ff 288
bogdanm 0:9b334a45a8ff 289 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 290 {
bogdanm 0:9b334a45a8ff 291 uint32_t result;
bogdanm 0:9b334a45a8ff 292
bogdanm 0:9b334a45a8ff 293 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 294 return(result);
bogdanm 0:9b334a45a8ff 295 }
bogdanm 0:9b334a45a8ff 296
bogdanm 0:9b334a45a8ff 297 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 298 {
bogdanm 0:9b334a45a8ff 299 uint32_t result;
bogdanm 0:9b334a45a8ff 300
bogdanm 0:9b334a45a8ff 301 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 302 return(result);
bogdanm 0:9b334a45a8ff 303 }
bogdanm 0:9b334a45a8ff 304
bogdanm 0:9b334a45a8ff 305 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 306 {
bogdanm 0:9b334a45a8ff 307 uint32_t result;
bogdanm 0:9b334a45a8ff 308
bogdanm 0:9b334a45a8ff 309 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 310 return(result);
bogdanm 0:9b334a45a8ff 311 }
bogdanm 0:9b334a45a8ff 312
bogdanm 0:9b334a45a8ff 313 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 314 {
bogdanm 0:9b334a45a8ff 315 uint32_t result;
bogdanm 0:9b334a45a8ff 316
bogdanm 0:9b334a45a8ff 317 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 318 return(result);
bogdanm 0:9b334a45a8ff 319 }
bogdanm 0:9b334a45a8ff 320
bogdanm 0:9b334a45a8ff 321 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 322 {
bogdanm 0:9b334a45a8ff 323 uint32_t result;
bogdanm 0:9b334a45a8ff 324
bogdanm 0:9b334a45a8ff 325 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 326 return(result);
bogdanm 0:9b334a45a8ff 327 }
bogdanm 0:9b334a45a8ff 328
bogdanm 0:9b334a45a8ff 329 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 330 {
bogdanm 0:9b334a45a8ff 331 uint32_t result;
bogdanm 0:9b334a45a8ff 332
bogdanm 0:9b334a45a8ff 333 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 334 return(result);
bogdanm 0:9b334a45a8ff 335 }
bogdanm 0:9b334a45a8ff 336
bogdanm 0:9b334a45a8ff 337 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 338 {
bogdanm 0:9b334a45a8ff 339 uint32_t result;
bogdanm 0:9b334a45a8ff 340
bogdanm 0:9b334a45a8ff 341 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 342 return(result);
bogdanm 0:9b334a45a8ff 343 }
bogdanm 0:9b334a45a8ff 344
bogdanm 0:9b334a45a8ff 345 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 346 {
bogdanm 0:9b334a45a8ff 347 uint32_t result;
bogdanm 0:9b334a45a8ff 348
bogdanm 0:9b334a45a8ff 349 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 350 return(result);
bogdanm 0:9b334a45a8ff 351 }
bogdanm 0:9b334a45a8ff 352
bogdanm 0:9b334a45a8ff 353 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 354 {
bogdanm 0:9b334a45a8ff 355 uint32_t result;
bogdanm 0:9b334a45a8ff 356
bogdanm 0:9b334a45a8ff 357 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 358 return(result);
bogdanm 0:9b334a45a8ff 359 }
bogdanm 0:9b334a45a8ff 360
bogdanm 0:9b334a45a8ff 361 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 362 {
bogdanm 0:9b334a45a8ff 363 uint32_t result;
bogdanm 0:9b334a45a8ff 364
bogdanm 0:9b334a45a8ff 365 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 366 return(result);
bogdanm 0:9b334a45a8ff 367 }
bogdanm 0:9b334a45a8ff 368
bogdanm 0:9b334a45a8ff 369 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 370 {
bogdanm 0:9b334a45a8ff 371 uint32_t result;
bogdanm 0:9b334a45a8ff 372
bogdanm 0:9b334a45a8ff 373 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 374 return(result);
bogdanm 0:9b334a45a8ff 375 }
bogdanm 0:9b334a45a8ff 376
bogdanm 0:9b334a45a8ff 377 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 378 {
bogdanm 0:9b334a45a8ff 379 uint32_t result;
bogdanm 0:9b334a45a8ff 380
bogdanm 0:9b334a45a8ff 381 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 382 return(result);
bogdanm 0:9b334a45a8ff 383 }
bogdanm 0:9b334a45a8ff 384
bogdanm 0:9b334a45a8ff 385 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 386 {
bogdanm 0:9b334a45a8ff 387 uint32_t result;
bogdanm 0:9b334a45a8ff 388
bogdanm 0:9b334a45a8ff 389 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 390 return(result);
bogdanm 0:9b334a45a8ff 391 }
bogdanm 0:9b334a45a8ff 392
bogdanm 0:9b334a45a8ff 393 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 394 {
bogdanm 0:9b334a45a8ff 395 uint32_t result;
bogdanm 0:9b334a45a8ff 396
bogdanm 0:9b334a45a8ff 397 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 398 return(result);
bogdanm 0:9b334a45a8ff 399 }
bogdanm 0:9b334a45a8ff 400
bogdanm 0:9b334a45a8ff 401 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 402 {
bogdanm 0:9b334a45a8ff 403 uint32_t result;
bogdanm 0:9b334a45a8ff 404
bogdanm 0:9b334a45a8ff 405 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 406 return(result);
bogdanm 0:9b334a45a8ff 407 }
bogdanm 0:9b334a45a8ff 408
bogdanm 0:9b334a45a8ff 409 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 410 {
bogdanm 0:9b334a45a8ff 411 uint32_t result;
bogdanm 0:9b334a45a8ff 412
bogdanm 0:9b334a45a8ff 413 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 414 return(result);
bogdanm 0:9b334a45a8ff 415 }
bogdanm 0:9b334a45a8ff 416
bogdanm 0:9b334a45a8ff 417 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 418 {
bogdanm 0:9b334a45a8ff 419 uint32_t result;
bogdanm 0:9b334a45a8ff 420
bogdanm 0:9b334a45a8ff 421 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 422 return(result);
bogdanm 0:9b334a45a8ff 423 }
bogdanm 0:9b334a45a8ff 424
bogdanm 0:9b334a45a8ff 425 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 426 {
bogdanm 0:9b334a45a8ff 427 uint32_t result;
bogdanm 0:9b334a45a8ff 428
bogdanm 0:9b334a45a8ff 429 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 430 return(result);
bogdanm 0:9b334a45a8ff 431 }
bogdanm 0:9b334a45a8ff 432
bogdanm 0:9b334a45a8ff 433 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 0:9b334a45a8ff 434 {
bogdanm 0:9b334a45a8ff 435 uint32_t result;
bogdanm 0:9b334a45a8ff 436
bogdanm 0:9b334a45a8ff 437 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 0:9b334a45a8ff 438 return(result);
bogdanm 0:9b334a45a8ff 439 }
bogdanm 0:9b334a45a8ff 440
bogdanm 0:9b334a45a8ff 441 #define __SSAT16(ARG1,ARG2) \
bogdanm 0:9b334a45a8ff 442 ({ \
bogdanm 0:9b334a45a8ff 443 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 0:9b334a45a8ff 444 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 0:9b334a45a8ff 445 __RES; \
bogdanm 0:9b334a45a8ff 446 })
bogdanm 0:9b334a45a8ff 447
bogdanm 0:9b334a45a8ff 448 #define __USAT16(ARG1,ARG2) \
bogdanm 0:9b334a45a8ff 449 ({ \
bogdanm 0:9b334a45a8ff 450 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 0:9b334a45a8ff 451 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 0:9b334a45a8ff 452 __RES; \
bogdanm 0:9b334a45a8ff 453 })
bogdanm 0:9b334a45a8ff 454
bogdanm 0:9b334a45a8ff 455 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
bogdanm 0:9b334a45a8ff 456 {
bogdanm 0:9b334a45a8ff 457 uint32_t result;
bogdanm 0:9b334a45a8ff 458
bogdanm 0:9b334a45a8ff 459 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
bogdanm 0:9b334a45a8ff 460 return(result);
bogdanm 0:9b334a45a8ff 461 }
bogdanm 0:9b334a45a8ff 462
bogdanm 0:9b334a45a8ff 463 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 464 {
bogdanm 0:9b334a45a8ff 465 uint32_t result;
bogdanm 0:9b334a45a8ff 466
bogdanm 0:9b334a45a8ff 467 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 468 return(result);
bogdanm 0:9b334a45a8ff 469 }
bogdanm 0:9b334a45a8ff 470
bogdanm 0:9b334a45a8ff 471 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
bogdanm 0:9b334a45a8ff 472 {
bogdanm 0:9b334a45a8ff 473 uint32_t result;
bogdanm 0:9b334a45a8ff 474
bogdanm 0:9b334a45a8ff 475 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
bogdanm 0:9b334a45a8ff 476 return(result);
bogdanm 0:9b334a45a8ff 477 }
bogdanm 0:9b334a45a8ff 478
bogdanm 0:9b334a45a8ff 479 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 480 {
bogdanm 0:9b334a45a8ff 481 uint32_t result;
bogdanm 0:9b334a45a8ff 482
bogdanm 0:9b334a45a8ff 483 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 484 return(result);
bogdanm 0:9b334a45a8ff 485 }
bogdanm 0:9b334a45a8ff 486
bogdanm 0:9b334a45a8ff 487 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 488 {
bogdanm 0:9b334a45a8ff 489 uint32_t result;
bogdanm 0:9b334a45a8ff 490
bogdanm 0:9b334a45a8ff 491 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 492 return(result);
bogdanm 0:9b334a45a8ff 493 }
bogdanm 0:9b334a45a8ff 494
bogdanm 0:9b334a45a8ff 495 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 496 {
bogdanm 0:9b334a45a8ff 497 uint32_t result;
bogdanm 0:9b334a45a8ff 498
bogdanm 0:9b334a45a8ff 499 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 500 return(result);
bogdanm 0:9b334a45a8ff 501 }
bogdanm 0:9b334a45a8ff 502
bogdanm 0:9b334a45a8ff 503 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 0:9b334a45a8ff 504 {
bogdanm 0:9b334a45a8ff 505 uint32_t result;
bogdanm 0:9b334a45a8ff 506
bogdanm 0:9b334a45a8ff 507 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 0:9b334a45a8ff 508 return(result);
bogdanm 0:9b334a45a8ff 509 }
bogdanm 0:9b334a45a8ff 510
bogdanm 0:9b334a45a8ff 511 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 0:9b334a45a8ff 512 {
bogdanm 0:9b334a45a8ff 513 uint32_t result;
bogdanm 0:9b334a45a8ff 514
bogdanm 0:9b334a45a8ff 515 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 0:9b334a45a8ff 516 return(result);
bogdanm 0:9b334a45a8ff 517 }
bogdanm 0:9b334a45a8ff 518
bogdanm 0:9b334a45a8ff 519 __attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
bogdanm 0:9b334a45a8ff 520 {
bogdanm 0:9b334a45a8ff 521 union llreg_u{
bogdanm 0:9b334a45a8ff 522 uint32_t w32[2];
bogdanm 0:9b334a45a8ff 523 uint64_t w64;
bogdanm 0:9b334a45a8ff 524 } llr;
bogdanm 0:9b334a45a8ff 525 llr.w64 = acc;
bogdanm 0:9b334a45a8ff 526
bogdanm 0:9b334a45a8ff 527 #ifndef __ARMEB__ // Little endian
bogdanm 0:9b334a45a8ff 528 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
bogdanm 0:9b334a45a8ff 529 #else // Big endian
bogdanm 0:9b334a45a8ff 530 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
bogdanm 0:9b334a45a8ff 531 #endif
bogdanm 0:9b334a45a8ff 532
bogdanm 0:9b334a45a8ff 533 return(llr.w64);
bogdanm 0:9b334a45a8ff 534 }
bogdanm 0:9b334a45a8ff 535
bogdanm 0:9b334a45a8ff 536 __attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
bogdanm 0:9b334a45a8ff 537 {
bogdanm 0:9b334a45a8ff 538 union llreg_u{
bogdanm 0:9b334a45a8ff 539 uint32_t w32[2];
bogdanm 0:9b334a45a8ff 540 uint64_t w64;
bogdanm 0:9b334a45a8ff 541 } llr;
bogdanm 0:9b334a45a8ff 542 llr.w64 = acc;
bogdanm 0:9b334a45a8ff 543
bogdanm 0:9b334a45a8ff 544 #ifndef __ARMEB__ // Little endian
bogdanm 0:9b334a45a8ff 545 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
bogdanm 0:9b334a45a8ff 546 #else // Big endian
bogdanm 0:9b334a45a8ff 547 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
bogdanm 0:9b334a45a8ff 548 #endif
bogdanm 0:9b334a45a8ff 549
bogdanm 0:9b334a45a8ff 550 return(llr.w64);
bogdanm 0:9b334a45a8ff 551 }
bogdanm 0:9b334a45a8ff 552
bogdanm 0:9b334a45a8ff 553 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 554 {
bogdanm 0:9b334a45a8ff 555 uint32_t result;
bogdanm 0:9b334a45a8ff 556
bogdanm 0:9b334a45a8ff 557 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 558 return(result);
bogdanm 0:9b334a45a8ff 559 }
bogdanm 0:9b334a45a8ff 560
bogdanm 0:9b334a45a8ff 561 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 562 {
bogdanm 0:9b334a45a8ff 563 uint32_t result;
bogdanm 0:9b334a45a8ff 564
bogdanm 0:9b334a45a8ff 565 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 566 return(result);
bogdanm 0:9b334a45a8ff 567 }
bogdanm 0:9b334a45a8ff 568
bogdanm 0:9b334a45a8ff 569 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 0:9b334a45a8ff 570 {
bogdanm 0:9b334a45a8ff 571 uint32_t result;
bogdanm 0:9b334a45a8ff 572
bogdanm 0:9b334a45a8ff 573 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 0:9b334a45a8ff 574 return(result);
bogdanm 0:9b334a45a8ff 575 }
bogdanm 0:9b334a45a8ff 576
bogdanm 0:9b334a45a8ff 577 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 0:9b334a45a8ff 578 {
bogdanm 0:9b334a45a8ff 579 uint32_t result;
bogdanm 0:9b334a45a8ff 580
bogdanm 0:9b334a45a8ff 581 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 0:9b334a45a8ff 582 return(result);
bogdanm 0:9b334a45a8ff 583 }
bogdanm 0:9b334a45a8ff 584
bogdanm 0:9b334a45a8ff 585 __attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
bogdanm 0:9b334a45a8ff 586 {
bogdanm 0:9b334a45a8ff 587 union llreg_u{
bogdanm 0:9b334a45a8ff 588 uint32_t w32[2];
bogdanm 0:9b334a45a8ff 589 uint64_t w64;
bogdanm 0:9b334a45a8ff 590 } llr;
bogdanm 0:9b334a45a8ff 591 llr.w64 = acc;
bogdanm 0:9b334a45a8ff 592
bogdanm 0:9b334a45a8ff 593 #ifndef __ARMEB__ // Little endian
bogdanm 0:9b334a45a8ff 594 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
bogdanm 0:9b334a45a8ff 595 #else // Big endian
bogdanm 0:9b334a45a8ff 596 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
bogdanm 0:9b334a45a8ff 597 #endif
bogdanm 0:9b334a45a8ff 598
bogdanm 0:9b334a45a8ff 599 return(llr.w64);
bogdanm 0:9b334a45a8ff 600 }
bogdanm 0:9b334a45a8ff 601
bogdanm 0:9b334a45a8ff 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
bogdanm 0:9b334a45a8ff 603 {
bogdanm 0:9b334a45a8ff 604 union llreg_u{
bogdanm 0:9b334a45a8ff 605 uint32_t w32[2];
bogdanm 0:9b334a45a8ff 606 uint64_t w64;
bogdanm 0:9b334a45a8ff 607 } llr;
bogdanm 0:9b334a45a8ff 608 llr.w64 = acc;
bogdanm 0:9b334a45a8ff 609
bogdanm 0:9b334a45a8ff 610 #ifndef __ARMEB__ // Little endian
bogdanm 0:9b334a45a8ff 611 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
bogdanm 0:9b334a45a8ff 612 #else // Big endian
bogdanm 0:9b334a45a8ff 613 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
bogdanm 0:9b334a45a8ff 614 #endif
bogdanm 0:9b334a45a8ff 615
bogdanm 0:9b334a45a8ff 616 return(llr.w64);
bogdanm 0:9b334a45a8ff 617 }
bogdanm 0:9b334a45a8ff 618
bogdanm 0:9b334a45a8ff 619 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 620 {
bogdanm 0:9b334a45a8ff 621 uint32_t result;
bogdanm 0:9b334a45a8ff 622
bogdanm 0:9b334a45a8ff 623 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 624 return(result);
bogdanm 0:9b334a45a8ff 625 }
bogdanm 0:9b334a45a8ff 626
bogdanm 0:9b334a45a8ff 627 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 628 {
bogdanm 0:9b334a45a8ff 629 uint32_t result;
bogdanm 0:9b334a45a8ff 630
bogdanm 0:9b334a45a8ff 631 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 632 return(result);
bogdanm 0:9b334a45a8ff 633 }
bogdanm 0:9b334a45a8ff 634
bogdanm 0:9b334a45a8ff 635 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 636 {
bogdanm 0:9b334a45a8ff 637 uint32_t result;
bogdanm 0:9b334a45a8ff 638
bogdanm 0:9b334a45a8ff 639 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 640 return(result);
bogdanm 0:9b334a45a8ff 641 }
bogdanm 0:9b334a45a8ff 642
bogdanm 0:9b334a45a8ff 643 #define __PKHBT(ARG1,ARG2,ARG3) \
bogdanm 0:9b334a45a8ff 644 ({ \
bogdanm 0:9b334a45a8ff 645 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
bogdanm 0:9b334a45a8ff 646 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
bogdanm 0:9b334a45a8ff 647 __RES; \
bogdanm 0:9b334a45a8ff 648 })
bogdanm 0:9b334a45a8ff 649
bogdanm 0:9b334a45a8ff 650 #define __PKHTB(ARG1,ARG2,ARG3) \
bogdanm 0:9b334a45a8ff 651 ({ \
bogdanm 0:9b334a45a8ff 652 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
bogdanm 0:9b334a45a8ff 653 if (ARG3 == 0) \
bogdanm 0:9b334a45a8ff 654 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
bogdanm 0:9b334a45a8ff 655 else \
bogdanm 0:9b334a45a8ff 656 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
bogdanm 0:9b334a45a8ff 657 __RES; \
bogdanm 0:9b334a45a8ff 658 })
bogdanm 0:9b334a45a8ff 659
bogdanm 0:9b334a45a8ff 660 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
bogdanm 0:9b334a45a8ff 661 {
bogdanm 0:9b334a45a8ff 662 int32_t result;
bogdanm 0:9b334a45a8ff 663
bogdanm 0:9b334a45a8ff 664 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
bogdanm 0:9b334a45a8ff 665 return(result);
bogdanm 0:9b334a45a8ff 666 }
bogdanm 0:9b334a45a8ff 667
bogdanm 0:9b334a45a8ff 668
bogdanm 0:9b334a45a8ff 669 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
bogdanm 0:9b334a45a8ff 670 /* IAR iccarm specific functions */
bogdanm 0:9b334a45a8ff 671 #include <cmsis_iar.h>
bogdanm 0:9b334a45a8ff 672
bogdanm 0:9b334a45a8ff 673
bogdanm 0:9b334a45a8ff 674 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
bogdanm 0:9b334a45a8ff 675 /* TI CCS specific functions */
bogdanm 0:9b334a45a8ff 676 #include <cmsis_ccs.h>
bogdanm 0:9b334a45a8ff 677
bogdanm 0:9b334a45a8ff 678
bogdanm 0:9b334a45a8ff 679 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 0:9b334a45a8ff 680 /* TASKING carm specific functions */
bogdanm 0:9b334a45a8ff 681 /* not yet supported */
bogdanm 0:9b334a45a8ff 682
bogdanm 0:9b334a45a8ff 683
bogdanm 0:9b334a45a8ff 684 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
bogdanm 0:9b334a45a8ff 685 /* Cosmic specific functions */
bogdanm 0:9b334a45a8ff 686 #include <cmsis_csm.h>
bogdanm 0:9b334a45a8ff 687
bogdanm 0:9b334a45a8ff 688 #endif
bogdanm 0:9b334a45a8ff 689
bogdanm 0:9b334a45a8ff 690 /*@} end of group CMSIS_SIMD_intrinsics */
bogdanm 0:9b334a45a8ff 691
bogdanm 0:9b334a45a8ff 692
bogdanm 0:9b334a45a8ff 693 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 694 }
bogdanm 0:9b334a45a8ff 695 #endif
bogdanm 0:9b334a45a8ff 696
bogdanm 0:9b334a45a8ff 697 #endif /* __CORE_CMSIMD_H */