MODSERIAL_NUCLEO_F746ZG.h

00001 #if defined(TARGET_NUCLEO_F746ZG)
00002 
00003 
00004 #define MODSERIAL_IRQ_REG ((USART_TypeDef*)_base)->CR1  //found in mbed-dev\targets\TARGET_STM\TARGET_STM32F7\TARGET_STM32F746xG\device\stm32f746xx.h
00005 #define DISABLE_TX_IRQ MODSERIAL_IRQ_REG &= ~USART_CR1_TXEIE
00006 #define DISABLE_RX_IRQ MODSERIAL_IRQ_REG &= ~USART_CR1_RXNEIE
00007 #define ENABLE_TX_IRQ MODSERIAL_IRQ_REG |= USART_CR1_TXEIE
00008 #define ENABLE_RX_IRQ MODSERIAL_IRQ_REG |= USART_CR1_RXNEIE
00009 
00010 #define MODSERIAL_READ_REG ((USART_TypeDef*)_base)->RDR
00011 #define MODSERIAL_WRITE_REG ((USART_TypeDef*)_base)->TDR
00012 #define MODSERIAL_READABLE ((((USART_TypeDef*)_base)->ISR & USART_ISR_RXNE) != 0)
00013 #define MODSERIAL_WRITABLE ((((USART_TypeDef*)_base)->ISR & USART_ISR_TXE) != 0)
00014 
00015 #define RESET_TX_FIFO while(0 == 1)
00016 #define RESET_RX_FIFO while(MODSERIAL_READABLE) char dummy = MODSERIAL_READ_REG
00017 
00018 #define RX_IRQ_ENABLED ((MODSERIAL_IRQ_REG & USART_CR1_RXNEIE) != 0)
00019 #define TX_IRQ_ENABLED ((MODSERIAL_IRQ_REG & USART_CR1_TXEIE) != 0)
00020 #endif