I'm trying to port GRBL 1.1 to the STM32F746 chip. Tell me the solution, thanks.
usb/usb_istr.c@0:9dcf85d9b2f3, 2017-09-04 (annotated)
- Committer:
- Sergunb
- Date:
- Mon Sep 04 12:05:05 2017 +0000
- Revision:
- 0:9dcf85d9b2f3
Initial commit
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Sergunb | 0:9dcf85d9b2f3 | 1 | /******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** |
Sergunb | 0:9dcf85d9b2f3 | 2 | * File Name : usb_istr.c |
Sergunb | 0:9dcf85d9b2f3 | 3 | * Author : MCD Application Team |
Sergunb | 0:9dcf85d9b2f3 | 4 | * Version : V3.3.0 |
Sergunb | 0:9dcf85d9b2f3 | 5 | * Date : 21-March-2011 |
Sergunb | 0:9dcf85d9b2f3 | 6 | * Description : ISTR events interrupt service routines |
Sergunb | 0:9dcf85d9b2f3 | 7 | ******************************************************************************** |
Sergunb | 0:9dcf85d9b2f3 | 8 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
Sergunb | 0:9dcf85d9b2f3 | 9 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. |
Sergunb | 0:9dcf85d9b2f3 | 10 | * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, |
Sergunb | 0:9dcf85d9b2f3 | 11 | * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE |
Sergunb | 0:9dcf85d9b2f3 | 12 | * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING |
Sergunb | 0:9dcf85d9b2f3 | 13 | * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
Sergunb | 0:9dcf85d9b2f3 | 14 | *******************************************************************************/ |
Sergunb | 0:9dcf85d9b2f3 | 15 | |
Sergunb | 0:9dcf85d9b2f3 | 16 | /* Includes ------------------------------------------------------------------*/ |
Sergunb | 0:9dcf85d9b2f3 | 17 | #include "usb_lib.h" |
Sergunb | 0:9dcf85d9b2f3 | 18 | #include "usb_prop.h" |
Sergunb | 0:9dcf85d9b2f3 | 19 | #include "usb_pwr.h" |
Sergunb | 0:9dcf85d9b2f3 | 20 | #include "usb_istr.h" |
Sergunb | 0:9dcf85d9b2f3 | 21 | |
Sergunb | 0:9dcf85d9b2f3 | 22 | /* Private typedef -----------------------------------------------------------*/ |
Sergunb | 0:9dcf85d9b2f3 | 23 | /* Private define ------------------------------------------------------------*/ |
Sergunb | 0:9dcf85d9b2f3 | 24 | /* Private macro -------------------------------------------------------------*/ |
Sergunb | 0:9dcf85d9b2f3 | 25 | /* Private variables ---------------------------------------------------------*/ |
Sergunb | 0:9dcf85d9b2f3 | 26 | __IO uint16_t wIstr; /* ISTR register last read value */ |
Sergunb | 0:9dcf85d9b2f3 | 27 | __IO uint8_t bIntPackSOF = 0; /* SOFs received between 2 consecutive packets */ |
Sergunb | 0:9dcf85d9b2f3 | 28 | |
Sergunb | 0:9dcf85d9b2f3 | 29 | /* Extern variables ----------------------------------------------------------*/ |
Sergunb | 0:9dcf85d9b2f3 | 30 | /* Private function prototypes -----------------------------------------------*/ |
Sergunb | 0:9dcf85d9b2f3 | 31 | /* Private functions ---------------------------------------------------------*/ |
Sergunb | 0:9dcf85d9b2f3 | 32 | /* function pointers to non-control endpoints service routines */ |
Sergunb | 0:9dcf85d9b2f3 | 33 | void (*pEpInt_IN[7])(void) = |
Sergunb | 0:9dcf85d9b2f3 | 34 | { |
Sergunb | 0:9dcf85d9b2f3 | 35 | EP1_IN_Callback, |
Sergunb | 0:9dcf85d9b2f3 | 36 | EP2_IN_Callback, |
Sergunb | 0:9dcf85d9b2f3 | 37 | EP3_IN_Callback, |
Sergunb | 0:9dcf85d9b2f3 | 38 | EP4_IN_Callback, |
Sergunb | 0:9dcf85d9b2f3 | 39 | EP5_IN_Callback, |
Sergunb | 0:9dcf85d9b2f3 | 40 | EP6_IN_Callback, |
Sergunb | 0:9dcf85d9b2f3 | 41 | EP7_IN_Callback, |
Sergunb | 0:9dcf85d9b2f3 | 42 | }; |
Sergunb | 0:9dcf85d9b2f3 | 43 | |
Sergunb | 0:9dcf85d9b2f3 | 44 | void (*pEpInt_OUT[7])(void) = |
Sergunb | 0:9dcf85d9b2f3 | 45 | { |
Sergunb | 0:9dcf85d9b2f3 | 46 | EP1_OUT_Callback, |
Sergunb | 0:9dcf85d9b2f3 | 47 | EP2_OUT_Callback, |
Sergunb | 0:9dcf85d9b2f3 | 48 | EP3_OUT_Callback, |
Sergunb | 0:9dcf85d9b2f3 | 49 | EP4_OUT_Callback, |
Sergunb | 0:9dcf85d9b2f3 | 50 | EP5_OUT_Callback, |
Sergunb | 0:9dcf85d9b2f3 | 51 | EP6_OUT_Callback, |
Sergunb | 0:9dcf85d9b2f3 | 52 | EP7_OUT_Callback, |
Sergunb | 0:9dcf85d9b2f3 | 53 | }; |
Sergunb | 0:9dcf85d9b2f3 | 54 | |
Sergunb | 0:9dcf85d9b2f3 | 55 | #ifndef STM32F10X_CL |
Sergunb | 0:9dcf85d9b2f3 | 56 | |
Sergunb | 0:9dcf85d9b2f3 | 57 | /******************************************************************************* |
Sergunb | 0:9dcf85d9b2f3 | 58 | * Function Name : USB_Istr |
Sergunb | 0:9dcf85d9b2f3 | 59 | * Description : STR events interrupt service routine |
Sergunb | 0:9dcf85d9b2f3 | 60 | * Input : |
Sergunb | 0:9dcf85d9b2f3 | 61 | * Output : |
Sergunb | 0:9dcf85d9b2f3 | 62 | * Return : |
Sergunb | 0:9dcf85d9b2f3 | 63 | *******************************************************************************/ |
Sergunb | 0:9dcf85d9b2f3 | 64 | void USB_Istr(void) |
Sergunb | 0:9dcf85d9b2f3 | 65 | { |
Sergunb | 0:9dcf85d9b2f3 | 66 | |
Sergunb | 0:9dcf85d9b2f3 | 67 | wIstr = _GetISTR(); |
Sergunb | 0:9dcf85d9b2f3 | 68 | |
Sergunb | 0:9dcf85d9b2f3 | 69 | #if (IMR_MSK & ISTR_SOF) |
Sergunb | 0:9dcf85d9b2f3 | 70 | if (wIstr & ISTR_SOF & wInterrupt_Mask) |
Sergunb | 0:9dcf85d9b2f3 | 71 | { |
Sergunb | 0:9dcf85d9b2f3 | 72 | _SetISTR((uint16_t)CLR_SOF); |
Sergunb | 0:9dcf85d9b2f3 | 73 | bIntPackSOF++; |
Sergunb | 0:9dcf85d9b2f3 | 74 | |
Sergunb | 0:9dcf85d9b2f3 | 75 | #ifdef SOF_CALLBACK |
Sergunb | 0:9dcf85d9b2f3 | 76 | SOF_Callback(); |
Sergunb | 0:9dcf85d9b2f3 | 77 | #endif |
Sergunb | 0:9dcf85d9b2f3 | 78 | } |
Sergunb | 0:9dcf85d9b2f3 | 79 | #endif |
Sergunb | 0:9dcf85d9b2f3 | 80 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 81 | |
Sergunb | 0:9dcf85d9b2f3 | 82 | #if (IMR_MSK & ISTR_CTR) |
Sergunb | 0:9dcf85d9b2f3 | 83 | if (wIstr & ISTR_CTR & wInterrupt_Mask) |
Sergunb | 0:9dcf85d9b2f3 | 84 | { |
Sergunb | 0:9dcf85d9b2f3 | 85 | /* servicing of the endpoint correct transfer interrupt */ |
Sergunb | 0:9dcf85d9b2f3 | 86 | /* clear of the CTR flag into the sub */ |
Sergunb | 0:9dcf85d9b2f3 | 87 | CTR_LP(); |
Sergunb | 0:9dcf85d9b2f3 | 88 | #ifdef CTR_CALLBACK |
Sergunb | 0:9dcf85d9b2f3 | 89 | CTR_Callback(); |
Sergunb | 0:9dcf85d9b2f3 | 90 | #endif |
Sergunb | 0:9dcf85d9b2f3 | 91 | } |
Sergunb | 0:9dcf85d9b2f3 | 92 | #endif |
Sergunb | 0:9dcf85d9b2f3 | 93 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 94 | #if (IMR_MSK & ISTR_RESET) |
Sergunb | 0:9dcf85d9b2f3 | 95 | if (wIstr & ISTR_RESET & wInterrupt_Mask) |
Sergunb | 0:9dcf85d9b2f3 | 96 | { |
Sergunb | 0:9dcf85d9b2f3 | 97 | _SetISTR((uint16_t)CLR_RESET); |
Sergunb | 0:9dcf85d9b2f3 | 98 | Device_Property.Reset(); |
Sergunb | 0:9dcf85d9b2f3 | 99 | #ifdef RESET_CALLBACK |
Sergunb | 0:9dcf85d9b2f3 | 100 | RESET_Callback(); |
Sergunb | 0:9dcf85d9b2f3 | 101 | #endif |
Sergunb | 0:9dcf85d9b2f3 | 102 | } |
Sergunb | 0:9dcf85d9b2f3 | 103 | #endif |
Sergunb | 0:9dcf85d9b2f3 | 104 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 105 | #if (IMR_MSK & ISTR_DOVR) |
Sergunb | 0:9dcf85d9b2f3 | 106 | if (wIstr & ISTR_DOVR & wInterrupt_Mask) |
Sergunb | 0:9dcf85d9b2f3 | 107 | { |
Sergunb | 0:9dcf85d9b2f3 | 108 | _SetISTR((uint16_t)CLR_DOVR); |
Sergunb | 0:9dcf85d9b2f3 | 109 | #ifdef DOVR_CALLBACK |
Sergunb | 0:9dcf85d9b2f3 | 110 | DOVR_Callback(); |
Sergunb | 0:9dcf85d9b2f3 | 111 | #endif |
Sergunb | 0:9dcf85d9b2f3 | 112 | } |
Sergunb | 0:9dcf85d9b2f3 | 113 | #endif |
Sergunb | 0:9dcf85d9b2f3 | 114 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 115 | #if (IMR_MSK & ISTR_ERR) |
Sergunb | 0:9dcf85d9b2f3 | 116 | if (wIstr & ISTR_ERR & wInterrupt_Mask) |
Sergunb | 0:9dcf85d9b2f3 | 117 | { |
Sergunb | 0:9dcf85d9b2f3 | 118 | _SetISTR((uint16_t)CLR_ERR); |
Sergunb | 0:9dcf85d9b2f3 | 119 | #ifdef ERR_CALLBACK |
Sergunb | 0:9dcf85d9b2f3 | 120 | ERR_Callback(); |
Sergunb | 0:9dcf85d9b2f3 | 121 | #endif |
Sergunb | 0:9dcf85d9b2f3 | 122 | } |
Sergunb | 0:9dcf85d9b2f3 | 123 | #endif |
Sergunb | 0:9dcf85d9b2f3 | 124 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 125 | #if (IMR_MSK & ISTR_WKUP) |
Sergunb | 0:9dcf85d9b2f3 | 126 | if (wIstr & ISTR_WKUP & wInterrupt_Mask) |
Sergunb | 0:9dcf85d9b2f3 | 127 | { |
Sergunb | 0:9dcf85d9b2f3 | 128 | _SetISTR((uint16_t)CLR_WKUP); |
Sergunb | 0:9dcf85d9b2f3 | 129 | Resume(RESUME_EXTERNAL); |
Sergunb | 0:9dcf85d9b2f3 | 130 | #ifdef WKUP_CALLBACK |
Sergunb | 0:9dcf85d9b2f3 | 131 | WKUP_Callback(); |
Sergunb | 0:9dcf85d9b2f3 | 132 | #endif |
Sergunb | 0:9dcf85d9b2f3 | 133 | } |
Sergunb | 0:9dcf85d9b2f3 | 134 | #endif |
Sergunb | 0:9dcf85d9b2f3 | 135 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 136 | #if (IMR_MSK & ISTR_SUSP) |
Sergunb | 0:9dcf85d9b2f3 | 137 | if (wIstr & ISTR_SUSP & wInterrupt_Mask) |
Sergunb | 0:9dcf85d9b2f3 | 138 | { |
Sergunb | 0:9dcf85d9b2f3 | 139 | |
Sergunb | 0:9dcf85d9b2f3 | 140 | /* check if SUSPEND is possible */ |
Sergunb | 0:9dcf85d9b2f3 | 141 | if (fSuspendEnabled) |
Sergunb | 0:9dcf85d9b2f3 | 142 | { |
Sergunb | 0:9dcf85d9b2f3 | 143 | Suspend(); |
Sergunb | 0:9dcf85d9b2f3 | 144 | } |
Sergunb | 0:9dcf85d9b2f3 | 145 | else |
Sergunb | 0:9dcf85d9b2f3 | 146 | { |
Sergunb | 0:9dcf85d9b2f3 | 147 | /* if not possible then resume after xx ms */ |
Sergunb | 0:9dcf85d9b2f3 | 148 | Resume(RESUME_LATER); |
Sergunb | 0:9dcf85d9b2f3 | 149 | } |
Sergunb | 0:9dcf85d9b2f3 | 150 | /* clear of the ISTR bit must be done after setting of CNTR_FSUSP */ |
Sergunb | 0:9dcf85d9b2f3 | 151 | _SetISTR((uint16_t)CLR_SUSP); |
Sergunb | 0:9dcf85d9b2f3 | 152 | #ifdef SUSP_CALLBACK |
Sergunb | 0:9dcf85d9b2f3 | 153 | SUSP_Callback(); |
Sergunb | 0:9dcf85d9b2f3 | 154 | #endif |
Sergunb | 0:9dcf85d9b2f3 | 155 | } |
Sergunb | 0:9dcf85d9b2f3 | 156 | #endif |
Sergunb | 0:9dcf85d9b2f3 | 157 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 158 | |
Sergunb | 0:9dcf85d9b2f3 | 159 | #if (IMR_MSK & ISTR_ESOF) |
Sergunb | 0:9dcf85d9b2f3 | 160 | if (wIstr & ISTR_ESOF & wInterrupt_Mask) |
Sergunb | 0:9dcf85d9b2f3 | 161 | { |
Sergunb | 0:9dcf85d9b2f3 | 162 | _SetISTR((uint16_t)CLR_ESOF); |
Sergunb | 0:9dcf85d9b2f3 | 163 | /* resume handling timing is made with ESOFs */ |
Sergunb | 0:9dcf85d9b2f3 | 164 | Resume(RESUME_ESOF); /* request without change of the machine state */ |
Sergunb | 0:9dcf85d9b2f3 | 165 | |
Sergunb | 0:9dcf85d9b2f3 | 166 | #ifdef ESOF_CALLBACK |
Sergunb | 0:9dcf85d9b2f3 | 167 | ESOF_Callback(); |
Sergunb | 0:9dcf85d9b2f3 | 168 | #endif |
Sergunb | 0:9dcf85d9b2f3 | 169 | } |
Sergunb | 0:9dcf85d9b2f3 | 170 | #endif |
Sergunb | 0:9dcf85d9b2f3 | 171 | } /* USB_Istr */ |
Sergunb | 0:9dcf85d9b2f3 | 172 | |
Sergunb | 0:9dcf85d9b2f3 | 173 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 174 | #else /* STM32F10X_CL */ |
Sergunb | 0:9dcf85d9b2f3 | 175 | |
Sergunb | 0:9dcf85d9b2f3 | 176 | |
Sergunb | 0:9dcf85d9b2f3 | 177 | /******************************************************************************* |
Sergunb | 0:9dcf85d9b2f3 | 178 | * Function Name : STM32_PCD_OTG_ISR_Handler |
Sergunb | 0:9dcf85d9b2f3 | 179 | * Description : Handles all USB Device Interrupts |
Sergunb | 0:9dcf85d9b2f3 | 180 | * Input : None |
Sergunb | 0:9dcf85d9b2f3 | 181 | * Output : None |
Sergunb | 0:9dcf85d9b2f3 | 182 | * Return : status |
Sergunb | 0:9dcf85d9b2f3 | 183 | *******************************************************************************/ |
Sergunb | 0:9dcf85d9b2f3 | 184 | u32 STM32_PCD_OTG_ISR_Handler (void) |
Sergunb | 0:9dcf85d9b2f3 | 185 | { |
Sergunb | 0:9dcf85d9b2f3 | 186 | USB_OTG_GINTSTS_TypeDef gintr_status; |
Sergunb | 0:9dcf85d9b2f3 | 187 | u32 retval = 0; |
Sergunb | 0:9dcf85d9b2f3 | 188 | |
Sergunb | 0:9dcf85d9b2f3 | 189 | if (USBD_FS_IsDeviceMode()) /* ensure that we are in device mode */ |
Sergunb | 0:9dcf85d9b2f3 | 190 | { |
Sergunb | 0:9dcf85d9b2f3 | 191 | gintr_status.d32 = OTGD_FS_ReadCoreItr(); |
Sergunb | 0:9dcf85d9b2f3 | 192 | |
Sergunb | 0:9dcf85d9b2f3 | 193 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 194 | |
Sergunb | 0:9dcf85d9b2f3 | 195 | /* If there is no interrupt pending exit the interrupt routine */ |
Sergunb | 0:9dcf85d9b2f3 | 196 | if (!gintr_status.d32) |
Sergunb | 0:9dcf85d9b2f3 | 197 | { |
Sergunb | 0:9dcf85d9b2f3 | 198 | return 0; |
Sergunb | 0:9dcf85d9b2f3 | 199 | } |
Sergunb | 0:9dcf85d9b2f3 | 200 | |
Sergunb | 0:9dcf85d9b2f3 | 201 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 202 | /* Early Suspend interrupt */ |
Sergunb | 0:9dcf85d9b2f3 | 203 | #ifdef INTR_ERLYSUSPEND |
Sergunb | 0:9dcf85d9b2f3 | 204 | if (gintr_status.b.erlysuspend) |
Sergunb | 0:9dcf85d9b2f3 | 205 | { |
Sergunb | 0:9dcf85d9b2f3 | 206 | retval |= OTGD_FS_Handle_EarlySuspend_ISR(); |
Sergunb | 0:9dcf85d9b2f3 | 207 | } |
Sergunb | 0:9dcf85d9b2f3 | 208 | #endif /* INTR_ERLYSUSPEND */ |
Sergunb | 0:9dcf85d9b2f3 | 209 | |
Sergunb | 0:9dcf85d9b2f3 | 210 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 211 | /* End of Periodic Frame interrupt */ |
Sergunb | 0:9dcf85d9b2f3 | 212 | #ifdef INTR_EOPFRAME |
Sergunb | 0:9dcf85d9b2f3 | 213 | if (gintr_status.b.eopframe) |
Sergunb | 0:9dcf85d9b2f3 | 214 | { |
Sergunb | 0:9dcf85d9b2f3 | 215 | retval |= OTGD_FS_Handle_EOPF_ISR(); |
Sergunb | 0:9dcf85d9b2f3 | 216 | } |
Sergunb | 0:9dcf85d9b2f3 | 217 | #endif /* INTR_EOPFRAME */ |
Sergunb | 0:9dcf85d9b2f3 | 218 | |
Sergunb | 0:9dcf85d9b2f3 | 219 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 220 | /* Non Periodic Tx FIFO Empty interrupt */ |
Sergunb | 0:9dcf85d9b2f3 | 221 | #ifdef INTR_NPTXFEMPTY |
Sergunb | 0:9dcf85d9b2f3 | 222 | if (gintr_status.b.nptxfempty) |
Sergunb | 0:9dcf85d9b2f3 | 223 | { |
Sergunb | 0:9dcf85d9b2f3 | 224 | retval |= OTGD_FS_Handle_NPTxFE_ISR(); |
Sergunb | 0:9dcf85d9b2f3 | 225 | } |
Sergunb | 0:9dcf85d9b2f3 | 226 | #endif /* INTR_NPTXFEMPTY */ |
Sergunb | 0:9dcf85d9b2f3 | 227 | |
Sergunb | 0:9dcf85d9b2f3 | 228 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 229 | /* Wakeup or RemoteWakeup interrupt */ |
Sergunb | 0:9dcf85d9b2f3 | 230 | #ifdef INTR_WKUPINTR |
Sergunb | 0:9dcf85d9b2f3 | 231 | if (gintr_status.b.wkupintr) |
Sergunb | 0:9dcf85d9b2f3 | 232 | { |
Sergunb | 0:9dcf85d9b2f3 | 233 | retval |= OTGD_FS_Handle_Wakeup_ISR(); |
Sergunb | 0:9dcf85d9b2f3 | 234 | } |
Sergunb | 0:9dcf85d9b2f3 | 235 | #endif /* INTR_WKUPINTR */ |
Sergunb | 0:9dcf85d9b2f3 | 236 | |
Sergunb | 0:9dcf85d9b2f3 | 237 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 238 | /* Suspend interrupt */ |
Sergunb | 0:9dcf85d9b2f3 | 239 | #ifdef INTR_USBSUSPEND |
Sergunb | 0:9dcf85d9b2f3 | 240 | if (gintr_status.b.usbsuspend) |
Sergunb | 0:9dcf85d9b2f3 | 241 | { |
Sergunb | 0:9dcf85d9b2f3 | 242 | /* check if SUSPEND is possible */ |
Sergunb | 0:9dcf85d9b2f3 | 243 | if (fSuspendEnabled) |
Sergunb | 0:9dcf85d9b2f3 | 244 | { |
Sergunb | 0:9dcf85d9b2f3 | 245 | Suspend(); |
Sergunb | 0:9dcf85d9b2f3 | 246 | } |
Sergunb | 0:9dcf85d9b2f3 | 247 | else |
Sergunb | 0:9dcf85d9b2f3 | 248 | { |
Sergunb | 0:9dcf85d9b2f3 | 249 | /* if not possible then resume after xx ms */ |
Sergunb | 0:9dcf85d9b2f3 | 250 | Resume(RESUME_LATER); /* This case shouldn't happen in OTG Device mode because |
Sergunb | 0:9dcf85d9b2f3 | 251 | there's no ESOF interrupt to increment the ResumeS.bESOFcnt in the Resume state machine */ |
Sergunb | 0:9dcf85d9b2f3 | 252 | } |
Sergunb | 0:9dcf85d9b2f3 | 253 | |
Sergunb | 0:9dcf85d9b2f3 | 254 | retval |= OTGD_FS_Handle_USBSuspend_ISR(); |
Sergunb | 0:9dcf85d9b2f3 | 255 | } |
Sergunb | 0:9dcf85d9b2f3 | 256 | #endif /* INTR_USBSUSPEND */ |
Sergunb | 0:9dcf85d9b2f3 | 257 | |
Sergunb | 0:9dcf85d9b2f3 | 258 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 259 | /* Start of Frame interrupt */ |
Sergunb | 0:9dcf85d9b2f3 | 260 | #ifdef INTR_SOFINTR |
Sergunb | 0:9dcf85d9b2f3 | 261 | if (gintr_status.b.sofintr) |
Sergunb | 0:9dcf85d9b2f3 | 262 | { |
Sergunb | 0:9dcf85d9b2f3 | 263 | /* Update the frame number variable */ |
Sergunb | 0:9dcf85d9b2f3 | 264 | bIntPackSOF++; |
Sergunb | 0:9dcf85d9b2f3 | 265 | |
Sergunb | 0:9dcf85d9b2f3 | 266 | retval |= OTGD_FS_Handle_Sof_ISR(); |
Sergunb | 0:9dcf85d9b2f3 | 267 | } |
Sergunb | 0:9dcf85d9b2f3 | 268 | #endif /* INTR_SOFINTR */ |
Sergunb | 0:9dcf85d9b2f3 | 269 | |
Sergunb | 0:9dcf85d9b2f3 | 270 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 271 | /* Receive FIFO Queue Status Level interrupt */ |
Sergunb | 0:9dcf85d9b2f3 | 272 | #ifdef INTR_RXSTSQLVL |
Sergunb | 0:9dcf85d9b2f3 | 273 | if (gintr_status.b.rxstsqlvl) |
Sergunb | 0:9dcf85d9b2f3 | 274 | { |
Sergunb | 0:9dcf85d9b2f3 | 275 | retval |= OTGD_FS_Handle_RxStatusQueueLevel_ISR(); |
Sergunb | 0:9dcf85d9b2f3 | 276 | } |
Sergunb | 0:9dcf85d9b2f3 | 277 | #endif /* INTR_RXSTSQLVL */ |
Sergunb | 0:9dcf85d9b2f3 | 278 | |
Sergunb | 0:9dcf85d9b2f3 | 279 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 280 | /* Enumeration Done interrupt */ |
Sergunb | 0:9dcf85d9b2f3 | 281 | #ifdef INTR_ENUMDONE |
Sergunb | 0:9dcf85d9b2f3 | 282 | if (gintr_status.b.enumdone) |
Sergunb | 0:9dcf85d9b2f3 | 283 | { |
Sergunb | 0:9dcf85d9b2f3 | 284 | retval |= OTGD_FS_Handle_EnumDone_ISR(); |
Sergunb | 0:9dcf85d9b2f3 | 285 | } |
Sergunb | 0:9dcf85d9b2f3 | 286 | #endif /* INTR_ENUMDONE */ |
Sergunb | 0:9dcf85d9b2f3 | 287 | |
Sergunb | 0:9dcf85d9b2f3 | 288 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 289 | /* Reset interrupt */ |
Sergunb | 0:9dcf85d9b2f3 | 290 | #ifdef INTR_USBRESET |
Sergunb | 0:9dcf85d9b2f3 | 291 | if (gintr_status.b.usbreset) |
Sergunb | 0:9dcf85d9b2f3 | 292 | { |
Sergunb | 0:9dcf85d9b2f3 | 293 | retval |= OTGD_FS_Handle_UsbReset_ISR(); |
Sergunb | 0:9dcf85d9b2f3 | 294 | } |
Sergunb | 0:9dcf85d9b2f3 | 295 | #endif /* INTR_USBRESET */ |
Sergunb | 0:9dcf85d9b2f3 | 296 | |
Sergunb | 0:9dcf85d9b2f3 | 297 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 298 | /* IN Endpoint interrupt */ |
Sergunb | 0:9dcf85d9b2f3 | 299 | #ifdef INTR_INEPINTR |
Sergunb | 0:9dcf85d9b2f3 | 300 | if (gintr_status.b.inepint) |
Sergunb | 0:9dcf85d9b2f3 | 301 | { |
Sergunb | 0:9dcf85d9b2f3 | 302 | retval |= OTGD_FS_Handle_InEP_ISR(); |
Sergunb | 0:9dcf85d9b2f3 | 303 | } |
Sergunb | 0:9dcf85d9b2f3 | 304 | #endif /* INTR_INEPINTR */ |
Sergunb | 0:9dcf85d9b2f3 | 305 | |
Sergunb | 0:9dcf85d9b2f3 | 306 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 307 | /* OUT Endpoint interrupt */ |
Sergunb | 0:9dcf85d9b2f3 | 308 | #ifdef INTR_OUTEPINTR |
Sergunb | 0:9dcf85d9b2f3 | 309 | if (gintr_status.b.outepintr) |
Sergunb | 0:9dcf85d9b2f3 | 310 | { |
Sergunb | 0:9dcf85d9b2f3 | 311 | retval |= OTGD_FS_Handle_OutEP_ISR(); |
Sergunb | 0:9dcf85d9b2f3 | 312 | } |
Sergunb | 0:9dcf85d9b2f3 | 313 | #endif /* INTR_OUTEPINTR */ |
Sergunb | 0:9dcf85d9b2f3 | 314 | |
Sergunb | 0:9dcf85d9b2f3 | 315 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 316 | /* Mode Mismatch interrupt */ |
Sergunb | 0:9dcf85d9b2f3 | 317 | #ifdef INTR_MODEMISMATCH |
Sergunb | 0:9dcf85d9b2f3 | 318 | if (gintr_status.b.modemismatch) |
Sergunb | 0:9dcf85d9b2f3 | 319 | { |
Sergunb | 0:9dcf85d9b2f3 | 320 | retval |= OTGD_FS_Handle_ModeMismatch_ISR(); |
Sergunb | 0:9dcf85d9b2f3 | 321 | } |
Sergunb | 0:9dcf85d9b2f3 | 322 | #endif /* INTR_MODEMISMATCH */ |
Sergunb | 0:9dcf85d9b2f3 | 323 | |
Sergunb | 0:9dcf85d9b2f3 | 324 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 325 | /* Global IN Endpoints NAK Effective interrupt */ |
Sergunb | 0:9dcf85d9b2f3 | 326 | #ifdef INTR_GINNAKEFF |
Sergunb | 0:9dcf85d9b2f3 | 327 | if (gintr_status.b.ginnakeff) |
Sergunb | 0:9dcf85d9b2f3 | 328 | { |
Sergunb | 0:9dcf85d9b2f3 | 329 | retval |= OTGD_FS_Handle_GInNakEff_ISR(); |
Sergunb | 0:9dcf85d9b2f3 | 330 | } |
Sergunb | 0:9dcf85d9b2f3 | 331 | #endif /* INTR_GINNAKEFF */ |
Sergunb | 0:9dcf85d9b2f3 | 332 | |
Sergunb | 0:9dcf85d9b2f3 | 333 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 334 | /* Global OUT Endpoints NAK effective interrupt */ |
Sergunb | 0:9dcf85d9b2f3 | 335 | #ifdef INTR_GOUTNAKEFF |
Sergunb | 0:9dcf85d9b2f3 | 336 | if (gintr_status.b.goutnakeff) |
Sergunb | 0:9dcf85d9b2f3 | 337 | { |
Sergunb | 0:9dcf85d9b2f3 | 338 | retval |= OTGD_FS_Handle_GOutNakEff_ISR(); |
Sergunb | 0:9dcf85d9b2f3 | 339 | } |
Sergunb | 0:9dcf85d9b2f3 | 340 | #endif /* INTR_GOUTNAKEFF */ |
Sergunb | 0:9dcf85d9b2f3 | 341 | |
Sergunb | 0:9dcf85d9b2f3 | 342 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 343 | /* Isochronous Out packet Dropped interrupt */ |
Sergunb | 0:9dcf85d9b2f3 | 344 | #ifdef INTR_ISOOUTDROP |
Sergunb | 0:9dcf85d9b2f3 | 345 | if (gintr_status.b.isooutdrop) |
Sergunb | 0:9dcf85d9b2f3 | 346 | { |
Sergunb | 0:9dcf85d9b2f3 | 347 | retval |= OTGD_FS_Handle_IsoOutDrop_ISR(); |
Sergunb | 0:9dcf85d9b2f3 | 348 | } |
Sergunb | 0:9dcf85d9b2f3 | 349 | #endif /* INTR_ISOOUTDROP */ |
Sergunb | 0:9dcf85d9b2f3 | 350 | |
Sergunb | 0:9dcf85d9b2f3 | 351 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 352 | /* Endpoint Mismatch error interrupt */ |
Sergunb | 0:9dcf85d9b2f3 | 353 | #ifdef INTR_EPMISMATCH |
Sergunb | 0:9dcf85d9b2f3 | 354 | if (gintr_status.b.epmismatch) |
Sergunb | 0:9dcf85d9b2f3 | 355 | { |
Sergunb | 0:9dcf85d9b2f3 | 356 | retval |= OTGD_FS_Handle_EPMismatch_ISR(); |
Sergunb | 0:9dcf85d9b2f3 | 357 | } |
Sergunb | 0:9dcf85d9b2f3 | 358 | #endif /* INTR_EPMISMATCH */ |
Sergunb | 0:9dcf85d9b2f3 | 359 | |
Sergunb | 0:9dcf85d9b2f3 | 360 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 361 | /* Incomplete Isochronous IN transfer error interrupt */ |
Sergunb | 0:9dcf85d9b2f3 | 362 | #ifdef INTR_INCOMPLISOIN |
Sergunb | 0:9dcf85d9b2f3 | 363 | if (gintr_status.b.incomplisoin) |
Sergunb | 0:9dcf85d9b2f3 | 364 | { |
Sergunb | 0:9dcf85d9b2f3 | 365 | retval |= OTGD_FS_Handle_IncomplIsoIn_ISR(); |
Sergunb | 0:9dcf85d9b2f3 | 366 | } |
Sergunb | 0:9dcf85d9b2f3 | 367 | #endif /* INTR_INCOMPLISOIN */ |
Sergunb | 0:9dcf85d9b2f3 | 368 | |
Sergunb | 0:9dcf85d9b2f3 | 369 | /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ |
Sergunb | 0:9dcf85d9b2f3 | 370 | /* Incomplete Isochronous OUT transfer error interrupt */ |
Sergunb | 0:9dcf85d9b2f3 | 371 | #ifdef INTR_INCOMPLISOOUT |
Sergunb | 0:9dcf85d9b2f3 | 372 | if (gintr_status.b.outepintr) |
Sergunb | 0:9dcf85d9b2f3 | 373 | { |
Sergunb | 0:9dcf85d9b2f3 | 374 | retval |= OTGD_FS_Handle_IncomplIsoOut_ISR(); |
Sergunb | 0:9dcf85d9b2f3 | 375 | } |
Sergunb | 0:9dcf85d9b2f3 | 376 | #endif /* INTR_INCOMPLISOOUT */ |
Sergunb | 0:9dcf85d9b2f3 | 377 | |
Sergunb | 0:9dcf85d9b2f3 | 378 | } |
Sergunb | 0:9dcf85d9b2f3 | 379 | return retval; |
Sergunb | 0:9dcf85d9b2f3 | 380 | } |
Sergunb | 0:9dcf85d9b2f3 | 381 | |
Sergunb | 0:9dcf85d9b2f3 | 382 | #endif /* STM32F10X_CL */ |
Sergunb | 0:9dcf85d9b2f3 | 383 | |
Sergunb | 0:9dcf85d9b2f3 | 384 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |