I'm trying to port GRBL 1.1 to the STM32F746 chip. Tell me the solution, thanks.
usb/usb_pwr.c@0:9dcf85d9b2f3, 2017-09-04 (annotated)
- Committer:
- Sergunb
- Date:
- Mon Sep 04 12:05:05 2017 +0000
- Revision:
- 0:9dcf85d9b2f3
Initial commit
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Sergunb | 0:9dcf85d9b2f3 | 1 | /******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** |
Sergunb | 0:9dcf85d9b2f3 | 2 | * File Name : usb_pwr.c |
Sergunb | 0:9dcf85d9b2f3 | 3 | * Author : MCD Application Team |
Sergunb | 0:9dcf85d9b2f3 | 4 | * Version : V3.3.0 |
Sergunb | 0:9dcf85d9b2f3 | 5 | * Date : 21-March-2011 |
Sergunb | 0:9dcf85d9b2f3 | 6 | * Description : Connection/disconnection & power management |
Sergunb | 0:9dcf85d9b2f3 | 7 | ******************************************************************************** |
Sergunb | 0:9dcf85d9b2f3 | 8 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
Sergunb | 0:9dcf85d9b2f3 | 9 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. |
Sergunb | 0:9dcf85d9b2f3 | 10 | * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, |
Sergunb | 0:9dcf85d9b2f3 | 11 | * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE |
Sergunb | 0:9dcf85d9b2f3 | 12 | * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING |
Sergunb | 0:9dcf85d9b2f3 | 13 | * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
Sergunb | 0:9dcf85d9b2f3 | 14 | *******************************************************************************/ |
Sergunb | 0:9dcf85d9b2f3 | 15 | |
Sergunb | 0:9dcf85d9b2f3 | 16 | /* Includes ------------------------------------------------------------------*/ |
Sergunb | 0:9dcf85d9b2f3 | 17 | #ifdef STM32L1XX_MD |
Sergunb | 0:9dcf85d9b2f3 | 18 | #include "stm32l1xx.h" |
Sergunb | 0:9dcf85d9b2f3 | 19 | #else |
Sergunb | 0:9dcf85d9b2f3 | 20 | #include "stm32f10x.h" |
Sergunb | 0:9dcf85d9b2f3 | 21 | #endif /* STM32L1XX_MD */ |
Sergunb | 0:9dcf85d9b2f3 | 22 | |
Sergunb | 0:9dcf85d9b2f3 | 23 | #include "usb_lib.h" |
Sergunb | 0:9dcf85d9b2f3 | 24 | #include "usb_conf.h" |
Sergunb | 0:9dcf85d9b2f3 | 25 | #include "usb_pwr.h" |
Sergunb | 0:9dcf85d9b2f3 | 26 | #include "hw_config.h" |
Sergunb | 0:9dcf85d9b2f3 | 27 | |
Sergunb | 0:9dcf85d9b2f3 | 28 | /* Private typedef -----------------------------------------------------------*/ |
Sergunb | 0:9dcf85d9b2f3 | 29 | /* Private define ------------------------------------------------------------*/ |
Sergunb | 0:9dcf85d9b2f3 | 30 | /* Private macro -------------------------------------------------------------*/ |
Sergunb | 0:9dcf85d9b2f3 | 31 | /* Private variables ---------------------------------------------------------*/ |
Sergunb | 0:9dcf85d9b2f3 | 32 | __IO uint32_t bDeviceState = UNCONNECTED; /* USB device status */ |
Sergunb | 0:9dcf85d9b2f3 | 33 | __IO bool fSuspendEnabled = TRUE; /* true when suspend is possible */ |
Sergunb | 0:9dcf85d9b2f3 | 34 | |
Sergunb | 0:9dcf85d9b2f3 | 35 | struct |
Sergunb | 0:9dcf85d9b2f3 | 36 | { |
Sergunb | 0:9dcf85d9b2f3 | 37 | __IO RESUME_STATE eState; |
Sergunb | 0:9dcf85d9b2f3 | 38 | __IO uint8_t bESOFcnt; |
Sergunb | 0:9dcf85d9b2f3 | 39 | }ResumeS; |
Sergunb | 0:9dcf85d9b2f3 | 40 | |
Sergunb | 0:9dcf85d9b2f3 | 41 | /* Extern variables ----------------------------------------------------------*/ |
Sergunb | 0:9dcf85d9b2f3 | 42 | /* Private function prototypes -----------------------------------------------*/ |
Sergunb | 0:9dcf85d9b2f3 | 43 | /* Extern function prototypes ------------------------------------------------*/ |
Sergunb | 0:9dcf85d9b2f3 | 44 | /* Private functions ---------------------------------------------------------*/ |
Sergunb | 0:9dcf85d9b2f3 | 45 | |
Sergunb | 0:9dcf85d9b2f3 | 46 | /******************************************************************************* |
Sergunb | 0:9dcf85d9b2f3 | 47 | * Function Name : PowerOn |
Sergunb | 0:9dcf85d9b2f3 | 48 | * Description : |
Sergunb | 0:9dcf85d9b2f3 | 49 | * Input : None. |
Sergunb | 0:9dcf85d9b2f3 | 50 | * Output : None. |
Sergunb | 0:9dcf85d9b2f3 | 51 | * Return : USB_SUCCESS. |
Sergunb | 0:9dcf85d9b2f3 | 52 | *******************************************************************************/ |
Sergunb | 0:9dcf85d9b2f3 | 53 | RESULT PowerOn(void) |
Sergunb | 0:9dcf85d9b2f3 | 54 | { |
Sergunb | 0:9dcf85d9b2f3 | 55 | #ifndef STM32F10X_CL |
Sergunb | 0:9dcf85d9b2f3 | 56 | uint16_t wRegVal; |
Sergunb | 0:9dcf85d9b2f3 | 57 | |
Sergunb | 0:9dcf85d9b2f3 | 58 | /*** cable plugged-in ? ***/ |
Sergunb | 0:9dcf85d9b2f3 | 59 | USB_Cable_Config(ENABLE); |
Sergunb | 0:9dcf85d9b2f3 | 60 | |
Sergunb | 0:9dcf85d9b2f3 | 61 | /*** CNTR_PWDN = 0 ***/ |
Sergunb | 0:9dcf85d9b2f3 | 62 | wRegVal = CNTR_FRES; |
Sergunb | 0:9dcf85d9b2f3 | 63 | _SetCNTR(wRegVal); |
Sergunb | 0:9dcf85d9b2f3 | 64 | |
Sergunb | 0:9dcf85d9b2f3 | 65 | /*** CNTR_FRES = 0 ***/ |
Sergunb | 0:9dcf85d9b2f3 | 66 | wInterrupt_Mask = 0; |
Sergunb | 0:9dcf85d9b2f3 | 67 | _SetCNTR(wInterrupt_Mask); |
Sergunb | 0:9dcf85d9b2f3 | 68 | /*** Clear pending interrupts ***/ |
Sergunb | 0:9dcf85d9b2f3 | 69 | _SetISTR(0); |
Sergunb | 0:9dcf85d9b2f3 | 70 | /*** Set interrupt mask ***/ |
Sergunb | 0:9dcf85d9b2f3 | 71 | wInterrupt_Mask = CNTR_RESETM | CNTR_SUSPM | CNTR_WKUPM; |
Sergunb | 0:9dcf85d9b2f3 | 72 | _SetCNTR(wInterrupt_Mask); |
Sergunb | 0:9dcf85d9b2f3 | 73 | #endif /* STM32F10X_CL */ |
Sergunb | 0:9dcf85d9b2f3 | 74 | |
Sergunb | 0:9dcf85d9b2f3 | 75 | return USB_SUCCESS; |
Sergunb | 0:9dcf85d9b2f3 | 76 | } |
Sergunb | 0:9dcf85d9b2f3 | 77 | |
Sergunb | 0:9dcf85d9b2f3 | 78 | /******************************************************************************* |
Sergunb | 0:9dcf85d9b2f3 | 79 | * Function Name : PowerOff |
Sergunb | 0:9dcf85d9b2f3 | 80 | * Description : handles switch-off conditions |
Sergunb | 0:9dcf85d9b2f3 | 81 | * Input : None. |
Sergunb | 0:9dcf85d9b2f3 | 82 | * Output : None. |
Sergunb | 0:9dcf85d9b2f3 | 83 | * Return : USB_SUCCESS. |
Sergunb | 0:9dcf85d9b2f3 | 84 | *******************************************************************************/ |
Sergunb | 0:9dcf85d9b2f3 | 85 | RESULT PowerOff() |
Sergunb | 0:9dcf85d9b2f3 | 86 | { |
Sergunb | 0:9dcf85d9b2f3 | 87 | #ifndef STM32F10X_CL |
Sergunb | 0:9dcf85d9b2f3 | 88 | /* disable all interrupts and force USB reset */ |
Sergunb | 0:9dcf85d9b2f3 | 89 | _SetCNTR(CNTR_FRES); |
Sergunb | 0:9dcf85d9b2f3 | 90 | /* clear interrupt status register */ |
Sergunb | 0:9dcf85d9b2f3 | 91 | _SetISTR(0); |
Sergunb | 0:9dcf85d9b2f3 | 92 | /* Disable the Pull-Up*/ |
Sergunb | 0:9dcf85d9b2f3 | 93 | USB_Cable_Config(DISABLE); |
Sergunb | 0:9dcf85d9b2f3 | 94 | /* switch-off device */ |
Sergunb | 0:9dcf85d9b2f3 | 95 | _SetCNTR(CNTR_FRES + CNTR_PDWN); |
Sergunb | 0:9dcf85d9b2f3 | 96 | #endif /* STM32F10X_CL */ |
Sergunb | 0:9dcf85d9b2f3 | 97 | |
Sergunb | 0:9dcf85d9b2f3 | 98 | /* sw variables reset */ |
Sergunb | 0:9dcf85d9b2f3 | 99 | /* ... */ |
Sergunb | 0:9dcf85d9b2f3 | 100 | |
Sergunb | 0:9dcf85d9b2f3 | 101 | return USB_SUCCESS; |
Sergunb | 0:9dcf85d9b2f3 | 102 | } |
Sergunb | 0:9dcf85d9b2f3 | 103 | |
Sergunb | 0:9dcf85d9b2f3 | 104 | /******************************************************************************* |
Sergunb | 0:9dcf85d9b2f3 | 105 | * Function Name : Suspend |
Sergunb | 0:9dcf85d9b2f3 | 106 | * Description : sets suspend mode operating conditions |
Sergunb | 0:9dcf85d9b2f3 | 107 | * Input : None. |
Sergunb | 0:9dcf85d9b2f3 | 108 | * Output : None. |
Sergunb | 0:9dcf85d9b2f3 | 109 | * Return : USB_SUCCESS. |
Sergunb | 0:9dcf85d9b2f3 | 110 | *******************************************************************************/ |
Sergunb | 0:9dcf85d9b2f3 | 111 | void Suspend(void) |
Sergunb | 0:9dcf85d9b2f3 | 112 | { |
Sergunb | 0:9dcf85d9b2f3 | 113 | #ifndef STM32F10X_CL |
Sergunb | 0:9dcf85d9b2f3 | 114 | uint16_t wCNTR; |
Sergunb | 0:9dcf85d9b2f3 | 115 | /* suspend preparation */ |
Sergunb | 0:9dcf85d9b2f3 | 116 | /* ... */ |
Sergunb | 0:9dcf85d9b2f3 | 117 | |
Sergunb | 0:9dcf85d9b2f3 | 118 | /* macrocell enters suspend mode */ |
Sergunb | 0:9dcf85d9b2f3 | 119 | wCNTR = _GetCNTR(); |
Sergunb | 0:9dcf85d9b2f3 | 120 | wCNTR |= CNTR_FSUSP; |
Sergunb | 0:9dcf85d9b2f3 | 121 | _SetCNTR(wCNTR); |
Sergunb | 0:9dcf85d9b2f3 | 122 | #endif /* STM32F10X_CL */ |
Sergunb | 0:9dcf85d9b2f3 | 123 | |
Sergunb | 0:9dcf85d9b2f3 | 124 | /* ------------------ ONLY WITH BUS-POWERED DEVICES ---------------------- */ |
Sergunb | 0:9dcf85d9b2f3 | 125 | /* power reduction */ |
Sergunb | 0:9dcf85d9b2f3 | 126 | /* ... on connected devices */ |
Sergunb | 0:9dcf85d9b2f3 | 127 | |
Sergunb | 0:9dcf85d9b2f3 | 128 | #ifndef STM32F10X_CL |
Sergunb | 0:9dcf85d9b2f3 | 129 | /* force low-power mode in the macrocell */ |
Sergunb | 0:9dcf85d9b2f3 | 130 | wCNTR = _GetCNTR(); |
Sergunb | 0:9dcf85d9b2f3 | 131 | wCNTR |= CNTR_LPMODE; |
Sergunb | 0:9dcf85d9b2f3 | 132 | _SetCNTR(wCNTR); |
Sergunb | 0:9dcf85d9b2f3 | 133 | #endif /* STM32F10X_CL */ |
Sergunb | 0:9dcf85d9b2f3 | 134 | |
Sergunb | 0:9dcf85d9b2f3 | 135 | /* switch-off the clocks */ |
Sergunb | 0:9dcf85d9b2f3 | 136 | /* ... */ |
Sergunb | 0:9dcf85d9b2f3 | 137 | Enter_LowPowerMode(); |
Sergunb | 0:9dcf85d9b2f3 | 138 | |
Sergunb | 0:9dcf85d9b2f3 | 139 | } |
Sergunb | 0:9dcf85d9b2f3 | 140 | |
Sergunb | 0:9dcf85d9b2f3 | 141 | /******************************************************************************* |
Sergunb | 0:9dcf85d9b2f3 | 142 | * Function Name : Resume_Init |
Sergunb | 0:9dcf85d9b2f3 | 143 | * Description : Handles wake-up restoring normal operations |
Sergunb | 0:9dcf85d9b2f3 | 144 | * Input : None. |
Sergunb | 0:9dcf85d9b2f3 | 145 | * Output : None. |
Sergunb | 0:9dcf85d9b2f3 | 146 | * Return : USB_SUCCESS. |
Sergunb | 0:9dcf85d9b2f3 | 147 | *******************************************************************************/ |
Sergunb | 0:9dcf85d9b2f3 | 148 | void Resume_Init(void) |
Sergunb | 0:9dcf85d9b2f3 | 149 | { |
Sergunb | 0:9dcf85d9b2f3 | 150 | #ifndef STM32F10X_CL |
Sergunb | 0:9dcf85d9b2f3 | 151 | uint16_t wCNTR; |
Sergunb | 0:9dcf85d9b2f3 | 152 | #endif /* STM32F10X_CL */ |
Sergunb | 0:9dcf85d9b2f3 | 153 | |
Sergunb | 0:9dcf85d9b2f3 | 154 | /* ------------------ ONLY WITH BUS-POWERED DEVICES ---------------------- */ |
Sergunb | 0:9dcf85d9b2f3 | 155 | /* restart the clocks */ |
Sergunb | 0:9dcf85d9b2f3 | 156 | /* ... */ |
Sergunb | 0:9dcf85d9b2f3 | 157 | |
Sergunb | 0:9dcf85d9b2f3 | 158 | #ifndef STM32F10X_CL |
Sergunb | 0:9dcf85d9b2f3 | 159 | /* CNTR_LPMODE = 0 */ |
Sergunb | 0:9dcf85d9b2f3 | 160 | wCNTR = _GetCNTR(); |
Sergunb | 0:9dcf85d9b2f3 | 161 | wCNTR &= (~CNTR_LPMODE); |
Sergunb | 0:9dcf85d9b2f3 | 162 | _SetCNTR(wCNTR); |
Sergunb | 0:9dcf85d9b2f3 | 163 | #endif /* STM32F10X_CL */ |
Sergunb | 0:9dcf85d9b2f3 | 164 | |
Sergunb | 0:9dcf85d9b2f3 | 165 | /* restore full power */ |
Sergunb | 0:9dcf85d9b2f3 | 166 | /* ... on connected devices */ |
Sergunb | 0:9dcf85d9b2f3 | 167 | Leave_LowPowerMode(); |
Sergunb | 0:9dcf85d9b2f3 | 168 | |
Sergunb | 0:9dcf85d9b2f3 | 169 | #ifndef STM32F10X_CL |
Sergunb | 0:9dcf85d9b2f3 | 170 | /* reset FSUSP bit */ |
Sergunb | 0:9dcf85d9b2f3 | 171 | _SetCNTR(IMR_MSK); |
Sergunb | 0:9dcf85d9b2f3 | 172 | #endif /* STM32F10X_CL */ |
Sergunb | 0:9dcf85d9b2f3 | 173 | |
Sergunb | 0:9dcf85d9b2f3 | 174 | /* reverse suspend preparation */ |
Sergunb | 0:9dcf85d9b2f3 | 175 | /* ... */ |
Sergunb | 0:9dcf85d9b2f3 | 176 | |
Sergunb | 0:9dcf85d9b2f3 | 177 | } |
Sergunb | 0:9dcf85d9b2f3 | 178 | |
Sergunb | 0:9dcf85d9b2f3 | 179 | /******************************************************************************* |
Sergunb | 0:9dcf85d9b2f3 | 180 | * Function Name : Resume |
Sergunb | 0:9dcf85d9b2f3 | 181 | * Description : This is the state machine handling resume operations and |
Sergunb | 0:9dcf85d9b2f3 | 182 | * timing sequence. The control is based on the Resume structure |
Sergunb | 0:9dcf85d9b2f3 | 183 | * variables and on the ESOF interrupt calling this subroutine |
Sergunb | 0:9dcf85d9b2f3 | 184 | * without changing machine state. |
Sergunb | 0:9dcf85d9b2f3 | 185 | * Input : a state machine value (RESUME_STATE) |
Sergunb | 0:9dcf85d9b2f3 | 186 | * RESUME_ESOF doesn't change ResumeS.eState allowing |
Sergunb | 0:9dcf85d9b2f3 | 187 | * decrementing of the ESOF counter in different states. |
Sergunb | 0:9dcf85d9b2f3 | 188 | * Output : None. |
Sergunb | 0:9dcf85d9b2f3 | 189 | * Return : None. |
Sergunb | 0:9dcf85d9b2f3 | 190 | *******************************************************************************/ |
Sergunb | 0:9dcf85d9b2f3 | 191 | void Resume(RESUME_STATE eResumeSetVal) |
Sergunb | 0:9dcf85d9b2f3 | 192 | { |
Sergunb | 0:9dcf85d9b2f3 | 193 | #ifndef STM32F10X_CL |
Sergunb | 0:9dcf85d9b2f3 | 194 | uint16_t wCNTR; |
Sergunb | 0:9dcf85d9b2f3 | 195 | #endif /* STM32F10X_CL */ |
Sergunb | 0:9dcf85d9b2f3 | 196 | |
Sergunb | 0:9dcf85d9b2f3 | 197 | if (eResumeSetVal != RESUME_ESOF) |
Sergunb | 0:9dcf85d9b2f3 | 198 | ResumeS.eState = eResumeSetVal; |
Sergunb | 0:9dcf85d9b2f3 | 199 | |
Sergunb | 0:9dcf85d9b2f3 | 200 | switch (ResumeS.eState) |
Sergunb | 0:9dcf85d9b2f3 | 201 | { |
Sergunb | 0:9dcf85d9b2f3 | 202 | case RESUME_EXTERNAL: |
Sergunb | 0:9dcf85d9b2f3 | 203 | Resume_Init(); |
Sergunb | 0:9dcf85d9b2f3 | 204 | ResumeS.eState = RESUME_OFF; |
Sergunb | 0:9dcf85d9b2f3 | 205 | break; |
Sergunb | 0:9dcf85d9b2f3 | 206 | case RESUME_INTERNAL: |
Sergunb | 0:9dcf85d9b2f3 | 207 | Resume_Init(); |
Sergunb | 0:9dcf85d9b2f3 | 208 | ResumeS.eState = RESUME_START; |
Sergunb | 0:9dcf85d9b2f3 | 209 | break; |
Sergunb | 0:9dcf85d9b2f3 | 210 | case RESUME_LATER: |
Sergunb | 0:9dcf85d9b2f3 | 211 | ResumeS.bESOFcnt = 2; |
Sergunb | 0:9dcf85d9b2f3 | 212 | ResumeS.eState = RESUME_WAIT; |
Sergunb | 0:9dcf85d9b2f3 | 213 | break; |
Sergunb | 0:9dcf85d9b2f3 | 214 | case RESUME_WAIT: |
Sergunb | 0:9dcf85d9b2f3 | 215 | ResumeS.bESOFcnt--; |
Sergunb | 0:9dcf85d9b2f3 | 216 | if (ResumeS.bESOFcnt == 0) |
Sergunb | 0:9dcf85d9b2f3 | 217 | ResumeS.eState = RESUME_START; |
Sergunb | 0:9dcf85d9b2f3 | 218 | break; |
Sergunb | 0:9dcf85d9b2f3 | 219 | case RESUME_START: |
Sergunb | 0:9dcf85d9b2f3 | 220 | #ifdef STM32F10X_CL |
Sergunb | 0:9dcf85d9b2f3 | 221 | OTGD_FS_SetRemoteWakeup(); |
Sergunb | 0:9dcf85d9b2f3 | 222 | #else |
Sergunb | 0:9dcf85d9b2f3 | 223 | wCNTR = _GetCNTR(); |
Sergunb | 0:9dcf85d9b2f3 | 224 | wCNTR |= CNTR_RESUME; |
Sergunb | 0:9dcf85d9b2f3 | 225 | _SetCNTR(wCNTR); |
Sergunb | 0:9dcf85d9b2f3 | 226 | #endif /* STM32F10X_CL */ |
Sergunb | 0:9dcf85d9b2f3 | 227 | ResumeS.eState = RESUME_ON; |
Sergunb | 0:9dcf85d9b2f3 | 228 | ResumeS.bESOFcnt = 10; |
Sergunb | 0:9dcf85d9b2f3 | 229 | break; |
Sergunb | 0:9dcf85d9b2f3 | 230 | case RESUME_ON: |
Sergunb | 0:9dcf85d9b2f3 | 231 | #ifndef STM32F10X_CL |
Sergunb | 0:9dcf85d9b2f3 | 232 | ResumeS.bESOFcnt--; |
Sergunb | 0:9dcf85d9b2f3 | 233 | if (ResumeS.bESOFcnt == 0) |
Sergunb | 0:9dcf85d9b2f3 | 234 | { |
Sergunb | 0:9dcf85d9b2f3 | 235 | #endif /* STM32F10X_CL */ |
Sergunb | 0:9dcf85d9b2f3 | 236 | #ifdef STM32F10X_CL |
Sergunb | 0:9dcf85d9b2f3 | 237 | OTGD_FS_ResetRemoteWakeup(); |
Sergunb | 0:9dcf85d9b2f3 | 238 | #else |
Sergunb | 0:9dcf85d9b2f3 | 239 | wCNTR = _GetCNTR(); |
Sergunb | 0:9dcf85d9b2f3 | 240 | wCNTR &= (~CNTR_RESUME); |
Sergunb | 0:9dcf85d9b2f3 | 241 | _SetCNTR(wCNTR); |
Sergunb | 0:9dcf85d9b2f3 | 242 | #endif /* STM32F10X_CL */ |
Sergunb | 0:9dcf85d9b2f3 | 243 | ResumeS.eState = RESUME_OFF; |
Sergunb | 0:9dcf85d9b2f3 | 244 | #ifndef STM32F10X_CL |
Sergunb | 0:9dcf85d9b2f3 | 245 | } |
Sergunb | 0:9dcf85d9b2f3 | 246 | #endif /* STM32F10X_CL */ |
Sergunb | 0:9dcf85d9b2f3 | 247 | break; |
Sergunb | 0:9dcf85d9b2f3 | 248 | case RESUME_OFF: |
Sergunb | 0:9dcf85d9b2f3 | 249 | case RESUME_ESOF: |
Sergunb | 0:9dcf85d9b2f3 | 250 | default: |
Sergunb | 0:9dcf85d9b2f3 | 251 | ResumeS.eState = RESUME_OFF; |
Sergunb | 0:9dcf85d9b2f3 | 252 | break; |
Sergunb | 0:9dcf85d9b2f3 | 253 | } |
Sergunb | 0:9dcf85d9b2f3 | 254 | } |
Sergunb | 0:9dcf85d9b2f3 | 255 | |
Sergunb | 0:9dcf85d9b2f3 | 256 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |