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stm32f10x_gpio.c
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f10x_gpio.c 00004 * @author MCD Application Team 00005 * @version V3.5.0 00006 * @date 11-March-2011 00007 * @brief This file provides all the GPIO firmware functions. 00008 ****************************************************************************** 00009 * @attention 00010 * 00011 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 00012 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 00013 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 00014 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 00015 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 00016 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 00017 * 00018 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> 00019 ****************************************************************************** 00020 */ 00021 00022 /* Includes ------------------------------------------------------------------*/ 00023 #include "stm32f10x_gpio.h" 00024 #include "stm32f10x_rcc.h" 00025 00026 /** @addtogroup STM32F10x_StdPeriph_Driver 00027 * @{ 00028 */ 00029 00030 /** @defgroup GPIO 00031 * @brief GPIO driver modules 00032 * @{ 00033 */ 00034 00035 /** @defgroup GPIO_Private_TypesDefinitions 00036 * @{ 00037 */ 00038 00039 /** 00040 * @} 00041 */ 00042 00043 /** @defgroup GPIO_Private_Defines 00044 * @{ 00045 */ 00046 00047 /* ------------ RCC registers bit address in the alias region ----------------*/ 00048 #define AFIO_OFFSET (AFIO_BASE - PERIPH_BASE) 00049 00050 /* --- EVENTCR Register -----*/ 00051 00052 /* Alias word address of EVOE bit */ 00053 #define EVCR_OFFSET (AFIO_OFFSET + 0x00) 00054 #define EVOE_BitNumber ((uint8_t)0x07) 00055 #define EVCR_EVOE_BB (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4)) 00056 00057 00058 /* --- MAPR Register ---*/ 00059 /* Alias word address of MII_RMII_SEL bit */ 00060 #define MAPR_OFFSET (AFIO_OFFSET + 0x04) 00061 #define MII_RMII_SEL_BitNumber ((u8)0x17) 00062 #define MAPR_MII_RMII_SEL_BB (PERIPH_BB_BASE + (MAPR_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4)) 00063 00064 00065 #define EVCR_PORTPINCONFIG_MASK ((uint16_t)0xFF80) 00066 #define LSB_MASK ((uint16_t)0xFFFF) 00067 #define DBGAFR_POSITION_MASK ((uint32_t)0x000F0000) 00068 #define DBGAFR_SWJCFG_MASK ((uint32_t)0xF0FFFFFF) 00069 #define DBGAFR_LOCATION_MASK ((uint32_t)0x00200000) 00070 #define DBGAFR_NUMBITS_MASK ((uint32_t)0x00100000) 00071 /** 00072 * @} 00073 */ 00074 00075 /** @defgroup GPIO_Private_Macros 00076 * @{ 00077 */ 00078 00079 /** 00080 * @} 00081 */ 00082 00083 /** @defgroup GPIO_Private_Variables 00084 * @{ 00085 */ 00086 00087 /** 00088 * @} 00089 */ 00090 00091 /** @defgroup GPIO_Private_FunctionPrototypes 00092 * @{ 00093 */ 00094 00095 /** 00096 * @} 00097 */ 00098 00099 /** @defgroup GPIO_Private_Functions 00100 * @{ 00101 */ 00102 00103 /** 00104 * @brief Deinitializes the GPIOx peripheral registers to their default reset values. 00105 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. 00106 * @retval None 00107 */ 00108 void GPIO_DeInit(GPIO_TypeDef* GPIOx) 00109 { 00110 /* Check the parameters */ 00111 assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); 00112 00113 if (GPIOx == GPIOA) 00114 { 00115 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE); 00116 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE); 00117 } 00118 else if (GPIOx == GPIOB) 00119 { 00120 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE); 00121 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE); 00122 } 00123 else if (GPIOx == GPIOC) 00124 { 00125 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE); 00126 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE); 00127 } 00128 else if (GPIOx == GPIOD) 00129 { 00130 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE); 00131 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE); 00132 } 00133 else if (GPIOx == GPIOE) 00134 { 00135 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE); 00136 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE); 00137 } 00138 else if (GPIOx == GPIOF) 00139 { 00140 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, ENABLE); 00141 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, DISABLE); 00142 } 00143 else 00144 { 00145 if (GPIOx == GPIOG) 00146 { 00147 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, ENABLE); 00148 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, DISABLE); 00149 } 00150 } 00151 } 00152 00153 /** 00154 * @brief Deinitializes the Alternate Functions (remap, event control 00155 * and EXTI configuration) registers to their default reset values. 00156 * @param None 00157 * @retval None 00158 */ 00159 void GPIO_AFIODeInit(void) 00160 { 00161 RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE); 00162 RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE); 00163 } 00164 00165 /** 00166 * @brief Initializes the GPIOx peripheral according to the specified 00167 * parameters in the GPIO_InitStruct. 00168 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. 00169 * @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that 00170 * contains the configuration information for the specified GPIO peripheral. 00171 * @retval None 00172 */ 00173 void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct) 00174 { 00175 uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00; 00176 uint32_t tmpreg = 0x00, pinmask = 0x00; 00177 /* Check the parameters */ 00178 assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); 00179 assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode)); 00180 assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin)); 00181 00182 /*---------------------------- GPIO Mode Configuration -----------------------*/ 00183 currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F); 00184 if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00) 00185 { 00186 /* Check the parameters */ 00187 assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed)); 00188 /* Output mode */ 00189 currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed; 00190 } 00191 /*---------------------------- GPIO CRL Configuration ------------------------*/ 00192 /* Configure the eight low port pins */ 00193 if (((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00) 00194 { 00195 tmpreg = GPIOx->CRL; 00196 for (pinpos = 0x00; pinpos < 0x08; pinpos++) 00197 { 00198 pos = ((uint32_t)0x01) << pinpos; 00199 /* Get the port pins position */ 00200 currentpin = (GPIO_InitStruct->GPIO_Pin) & pos; 00201 if (currentpin == pos) 00202 { 00203 pos = pinpos << 2; 00204 /* Clear the corresponding low control register bits */ 00205 pinmask = ((uint32_t)0x0F) << pos; 00206 tmpreg &= ~pinmask; 00207 /* Write the mode configuration in the corresponding bits */ 00208 tmpreg |= (currentmode << pos); 00209 /* Reset the corresponding ODR bit */ 00210 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD) 00211 { 00212 GPIOx->BRR = (((uint32_t)0x01) << pinpos); 00213 } 00214 else 00215 { 00216 /* Set the corresponding ODR bit */ 00217 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU) 00218 { 00219 GPIOx->BSRR = (((uint32_t)0x01) << pinpos); 00220 } 00221 } 00222 } 00223 } 00224 GPIOx->CRL = tmpreg; 00225 } 00226 /*---------------------------- GPIO CRH Configuration ------------------------*/ 00227 /* Configure the eight high port pins */ 00228 if (GPIO_InitStruct->GPIO_Pin > 0x00FF) 00229 { 00230 tmpreg = GPIOx->CRH; 00231 for (pinpos = 0x00; pinpos < 0x08; pinpos++) 00232 { 00233 pos = (((uint32_t)0x01) << (pinpos + 0x08)); 00234 /* Get the port pins position */ 00235 currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos); 00236 if (currentpin == pos) 00237 { 00238 pos = pinpos << 2; 00239 /* Clear the corresponding high control register bits */ 00240 pinmask = ((uint32_t)0x0F) << pos; 00241 tmpreg &= ~pinmask; 00242 /* Write the mode configuration in the corresponding bits */ 00243 tmpreg |= (currentmode << pos); 00244 /* Reset the corresponding ODR bit */ 00245 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD) 00246 { 00247 GPIOx->BRR = (((uint32_t)0x01) << (pinpos + 0x08)); 00248 } 00249 /* Set the corresponding ODR bit */ 00250 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU) 00251 { 00252 GPIOx->BSRR = (((uint32_t)0x01) << (pinpos + 0x08)); 00253 } 00254 } 00255 } 00256 GPIOx->CRH = tmpreg; 00257 } 00258 } 00259 00260 /** 00261 * @brief Fills each GPIO_InitStruct member with its default value. 00262 * @param GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure which will 00263 * be initialized. 00264 * @retval None 00265 */ 00266 void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct) 00267 { 00268 /* Reset GPIO init structure parameters values */ 00269 GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All; 00270 GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz; 00271 GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING; 00272 } 00273 00274 /** 00275 * @brief Reads the specified input port pin. 00276 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. 00277 * @param GPIO_Pin: specifies the port bit to read. 00278 * This parameter can be GPIO_Pin_x where x can be (0..15). 00279 * @retval The input port pin value. 00280 */ 00281 uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) 00282 { 00283 uint8_t bitstatus = 0x00; 00284 00285 /* Check the parameters */ 00286 assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); 00287 assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); 00288 00289 if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET) 00290 { 00291 bitstatus = (uint8_t)Bit_SET; 00292 } 00293 else 00294 { 00295 bitstatus = (uint8_t)Bit_RESET; 00296 } 00297 return bitstatus; 00298 } 00299 00300 /** 00301 * @brief Reads the specified GPIO input data port. 00302 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. 00303 * @retval GPIO input data port value. 00304 */ 00305 uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx) 00306 { 00307 /* Check the parameters */ 00308 assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); 00309 00310 return ((uint16_t)GPIOx->IDR); 00311 } 00312 00313 /** 00314 * @brief Reads the specified output data port bit. 00315 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. 00316 * @param GPIO_Pin: specifies the port bit to read. 00317 * This parameter can be GPIO_Pin_x where x can be (0..15). 00318 * @retval The output port pin value. 00319 */ 00320 uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) 00321 { 00322 uint8_t bitstatus = 0x00; 00323 /* Check the parameters */ 00324 assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); 00325 assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); 00326 00327 if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET) 00328 { 00329 bitstatus = (uint8_t)Bit_SET; 00330 } 00331 else 00332 { 00333 bitstatus = (uint8_t)Bit_RESET; 00334 } 00335 return bitstatus; 00336 } 00337 00338 /** 00339 * @brief Reads the specified GPIO output data port. 00340 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. 00341 * @retval GPIO output data port value. 00342 */ 00343 uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx) 00344 { 00345 /* Check the parameters */ 00346 assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); 00347 00348 return ((uint16_t)GPIOx->ODR); 00349 } 00350 00351 /** 00352 * @brief Sets the selected data port bits. 00353 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. 00354 * @param GPIO_Pin: specifies the port bits to be written. 00355 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). 00356 * @retval None 00357 */ 00358 void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) 00359 { 00360 /* Check the parameters */ 00361 assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); 00362 assert_param(IS_GPIO_PIN(GPIO_Pin)); 00363 00364 GPIOx->BSRR = GPIO_Pin; 00365 } 00366 00367 /** 00368 * @brief Clears the selected data port bits. 00369 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. 00370 * @param GPIO_Pin: specifies the port bits to be written. 00371 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). 00372 * @retval None 00373 */ 00374 void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) 00375 { 00376 /* Check the parameters */ 00377 assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); 00378 assert_param(IS_GPIO_PIN(GPIO_Pin)); 00379 00380 GPIOx->BRR = GPIO_Pin; 00381 } 00382 00383 /** 00384 * @brief Sets or clears the selected data port bit. 00385 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. 00386 * @param GPIO_Pin: specifies the port bit to be written. 00387 * This parameter can be one of GPIO_Pin_x where x can be (0..15). 00388 * @param BitVal: specifies the value to be written to the selected bit. 00389 * This parameter can be one of the BitAction enum values: 00390 * @arg Bit_RESET: to clear the port pin 00391 * @arg Bit_SET: to set the port pin 00392 * @retval None 00393 */ 00394 void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal) 00395 { 00396 /* Check the parameters */ 00397 assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); 00398 assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); 00399 assert_param(IS_GPIO_BIT_ACTION(BitVal)); 00400 00401 if (BitVal != Bit_RESET) 00402 { 00403 GPIOx->BSRR = GPIO_Pin; 00404 } 00405 else 00406 { 00407 GPIOx->BRR = GPIO_Pin; 00408 } 00409 } 00410 00411 /** 00412 * @brief Writes data to the specified GPIO data port. 00413 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. 00414 * @param PortVal: specifies the value to be written to the port output data register. 00415 * @retval None 00416 */ 00417 void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal) 00418 { 00419 /* Check the parameters */ 00420 assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); 00421 00422 GPIOx->ODR = PortVal; 00423 } 00424 00425 /** 00426 * @brief Locks GPIO Pins configuration registers. 00427 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. 00428 * @param GPIO_Pin: specifies the port bit to be written. 00429 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). 00430 * @retval None 00431 */ 00432 void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) 00433 { 00434 uint32_t tmp = 0x00010000; 00435 00436 /* Check the parameters */ 00437 assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); 00438 assert_param(IS_GPIO_PIN(GPIO_Pin)); 00439 00440 tmp |= GPIO_Pin; 00441 /* Set LCKK bit */ 00442 GPIOx->LCKR = tmp; 00443 /* Reset LCKK bit */ 00444 GPIOx->LCKR = GPIO_Pin; 00445 /* Set LCKK bit */ 00446 GPIOx->LCKR = tmp; 00447 /* Read LCKK bit*/ 00448 tmp = GPIOx->LCKR; 00449 /* Read LCKK bit*/ 00450 tmp = GPIOx->LCKR; 00451 } 00452 00453 /** 00454 * @brief Selects the GPIO pin used as Event output. 00455 * @param GPIO_PortSource: selects the GPIO port to be used as source 00456 * for Event output. 00457 * This parameter can be GPIO_PortSourceGPIOx where x can be (A..E). 00458 * @param GPIO_PinSource: specifies the pin for the Event output. 00459 * This parameter can be GPIO_PinSourcex where x can be (0..15). 00460 * @retval None 00461 */ 00462 void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource) 00463 { 00464 uint32_t tmpreg = 0x00; 00465 /* Check the parameters */ 00466 assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(GPIO_PortSource)); 00467 assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource)); 00468 00469 tmpreg = AFIO->EVCR; 00470 /* Clear the PORT[6:4] and PIN[3:0] bits */ 00471 tmpreg &= EVCR_PORTPINCONFIG_MASK; 00472 tmpreg |= (uint32_t)GPIO_PortSource << 0x04; 00473 tmpreg |= GPIO_PinSource; 00474 AFIO->EVCR = tmpreg; 00475 } 00476 00477 /** 00478 * @brief Enables or disables the Event Output. 00479 * @param NewState: new state of the Event output. 00480 * This parameter can be: ENABLE or DISABLE. 00481 * @retval None 00482 */ 00483 void GPIO_EventOutputCmd(FunctionalState NewState) 00484 { 00485 /* Check the parameters */ 00486 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00487 00488 *(__IO uint32_t *) EVCR_EVOE_BB = (uint32_t)NewState; 00489 } 00490 00491 /** 00492 * @brief Changes the mapping of the specified pin. 00493 * @param GPIO_Remap: selects the pin to remap. 00494 * This parameter can be one of the following values: 00495 * @arg GPIO_Remap_SPI1 : SPI1 Alternate Function mapping 00496 * @arg GPIO_Remap_I2C1 : I2C1 Alternate Function mapping 00497 * @arg GPIO_Remap_USART1 : USART1 Alternate Function mapping 00498 * @arg GPIO_Remap_USART2 : USART2 Alternate Function mapping 00499 * @arg GPIO_PartialRemap_USART3 : USART3 Partial Alternate Function mapping 00500 * @arg GPIO_FullRemap_USART3 : USART3 Full Alternate Function mapping 00501 * @arg GPIO_PartialRemap_TIM1 : TIM1 Partial Alternate Function mapping 00502 * @arg GPIO_FullRemap_TIM1 : TIM1 Full Alternate Function mapping 00503 * @arg GPIO_PartialRemap1_TIM2 : TIM2 Partial1 Alternate Function mapping 00504 * @arg GPIO_PartialRemap2_TIM2 : TIM2 Partial2 Alternate Function mapping 00505 * @arg GPIO_FullRemap_TIM2 : TIM2 Full Alternate Function mapping 00506 * @arg GPIO_PartialRemap_TIM3 : TIM3 Partial Alternate Function mapping 00507 * @arg GPIO_FullRemap_TIM3 : TIM3 Full Alternate Function mapping 00508 * @arg GPIO_Remap_TIM4 : TIM4 Alternate Function mapping 00509 * @arg GPIO_Remap1_CAN1 : CAN1 Alternate Function mapping 00510 * @arg GPIO_Remap2_CAN1 : CAN1 Alternate Function mapping 00511 * @arg GPIO_Remap_PD01 : PD01 Alternate Function mapping 00512 * @arg GPIO_Remap_TIM5CH4_LSI : LSI connected to TIM5 Channel4 input capture for calibration 00513 * @arg GPIO_Remap_ADC1_ETRGINJ : ADC1 External Trigger Injected Conversion remapping 00514 * @arg GPIO_Remap_ADC1_ETRGREG : ADC1 External Trigger Regular Conversion remapping 00515 * @arg GPIO_Remap_ADC2_ETRGINJ : ADC2 External Trigger Injected Conversion remapping 00516 * @arg GPIO_Remap_ADC2_ETRGREG : ADC2 External Trigger Regular Conversion remapping 00517 * @arg GPIO_Remap_ETH : Ethernet remapping (only for Connectivity line devices) 00518 * @arg GPIO_Remap_CAN2 : CAN2 remapping (only for Connectivity line devices) 00519 * @arg GPIO_Remap_SWJ_NoJTRST : Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST 00520 * @arg GPIO_Remap_SWJ_JTAGDisable : JTAG-DP Disabled and SW-DP Enabled 00521 * @arg GPIO_Remap_SWJ_Disable : Full SWJ Disabled (JTAG-DP + SW-DP) 00522 * @arg GPIO_Remap_SPI3 : SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices) 00523 * When the SPI3/I2S3 is remapped using this function, the SWJ is configured 00524 * to Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST. 00525 * @arg GPIO_Remap_TIM2ITR1_PTP_SOF : Ethernet PTP output or USB OTG SOF (Start of Frame) connected 00526 * to TIM2 Internal Trigger 1 for calibration (only for Connectivity line devices) 00527 * If the GPIO_Remap_TIM2ITR1_PTP_SOF is enabled the TIM2 ITR1 is connected to 00528 * Ethernet PTP output. When Reset TIM2 ITR1 is connected to USB OTG SOF output. 00529 * @arg GPIO_Remap_PTP_PPS : Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices) 00530 * @arg GPIO_Remap_TIM15 : TIM15 Alternate Function mapping (only for Value line devices) 00531 * @arg GPIO_Remap_TIM16 : TIM16 Alternate Function mapping (only for Value line devices) 00532 * @arg GPIO_Remap_TIM17 : TIM17 Alternate Function mapping (only for Value line devices) 00533 * @arg GPIO_Remap_CEC : CEC Alternate Function mapping (only for Value line devices) 00534 * @arg GPIO_Remap_TIM1_DMA : TIM1 DMA requests mapping (only for Value line devices) 00535 * @arg GPIO_Remap_TIM9 : TIM9 Alternate Function mapping (only for XL-density devices) 00536 * @arg GPIO_Remap_TIM10 : TIM10 Alternate Function mapping (only for XL-density devices) 00537 * @arg GPIO_Remap_TIM11 : TIM11 Alternate Function mapping (only for XL-density devices) 00538 * @arg GPIO_Remap_TIM13 : TIM13 Alternate Function mapping (only for High density Value line and XL-density devices) 00539 * @arg GPIO_Remap_TIM14 : TIM14 Alternate Function mapping (only for High density Value line and XL-density devices) 00540 * @arg GPIO_Remap_FSMC_NADV : FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices) 00541 * @arg GPIO_Remap_TIM67_DAC_DMA : TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices) 00542 * @arg GPIO_Remap_TIM12 : TIM12 Alternate Function mapping (only for High density Value line devices) 00543 * @arg GPIO_Remap_MISC : Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping, 00544 * only for High density Value line devices) 00545 * @param NewState: new state of the port pin remapping. 00546 * This parameter can be: ENABLE or DISABLE. 00547 * @retval None 00548 */ 00549 void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState) 00550 { 00551 uint32_t tmp = 0x00, tmp1 = 0x00, tmpreg = 0x00, tmpmask = 0x00; 00552 00553 /* Check the parameters */ 00554 assert_param(IS_GPIO_REMAP(GPIO_Remap)); 00555 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00556 00557 if((GPIO_Remap & 0x80000000) == 0x80000000) 00558 { 00559 tmpreg = AFIO->MAPR2; 00560 } 00561 else 00562 { 00563 tmpreg = AFIO->MAPR; 00564 } 00565 00566 tmpmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10; 00567 tmp = GPIO_Remap & LSB_MASK; 00568 00569 if ((GPIO_Remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) 00570 { 00571 tmpreg &= DBGAFR_SWJCFG_MASK; 00572 AFIO->MAPR &= DBGAFR_SWJCFG_MASK; 00573 } 00574 else if ((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK) 00575 { 00576 tmp1 = ((uint32_t)0x03) << tmpmask; 00577 tmpreg &= ~tmp1; 00578 tmpreg |= ~DBGAFR_SWJCFG_MASK; 00579 } 00580 else 00581 { 00582 tmpreg &= ~(tmp << ((GPIO_Remap >> 0x15)*0x10)); 00583 tmpreg |= ~DBGAFR_SWJCFG_MASK; 00584 } 00585 00586 if (NewState != DISABLE) 00587 { 00588 tmpreg |= (tmp << ((GPIO_Remap >> 0x15)*0x10)); 00589 } 00590 00591 if((GPIO_Remap & 0x80000000) == 0x80000000) 00592 { 00593 AFIO->MAPR2 = tmpreg; 00594 } 00595 else 00596 { 00597 AFIO->MAPR = tmpreg; 00598 } 00599 } 00600 00601 /** 00602 * @brief Selects the GPIO pin used as EXTI Line. 00603 * @param GPIO_PortSource: selects the GPIO port to be used as source for EXTI lines. 00604 * This parameter can be GPIO_PortSourceGPIOx where x can be (A..G). 00605 * @param GPIO_PinSource: specifies the EXTI line to be configured. 00606 * This parameter can be GPIO_PinSourcex where x can be (0..15). 00607 * @retval None 00608 */ 00609 void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource) 00610 { 00611 uint32_t tmp = 0x00; 00612 /* Check the parameters */ 00613 assert_param(IS_GPIO_EXTI_PORT_SOURCE(GPIO_PortSource)); 00614 assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource)); 00615 00616 tmp = ((uint32_t)0x0F) << (0x04 * (GPIO_PinSource & (uint8_t)0x03)); 00617 AFIO->EXTICR[GPIO_PinSource >> 0x02] &= ~tmp; 00618 AFIO->EXTICR[GPIO_PinSource >> 0x02] |= (((uint32_t)GPIO_PortSource) << (0x04 * (GPIO_PinSource & (uint8_t)0x03))); 00619 } 00620 00621 /** 00622 * @brief Selects the Ethernet media interface. 00623 * @note This function applies only to STM32 Connectivity line devices. 00624 * @param GPIO_ETH_MediaInterface: specifies the Media Interface mode. 00625 * This parameter can be one of the following values: 00626 * @arg GPIO_ETH_MediaInterface_MII: MII mode 00627 * @arg GPIO_ETH_MediaInterface_RMII: RMII mode 00628 * @retval None 00629 */ 00630 void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface) 00631 { 00632 assert_param(IS_GPIO_ETH_MEDIA_INTERFACE(GPIO_ETH_MediaInterface)); 00633 00634 /* Configure MII_RMII selection bit */ 00635 *(__IO uint32_t *) MAPR_MII_RMII_SEL_BB = GPIO_ETH_MediaInterface; 00636 } 00637 00638 /** 00639 * @} 00640 */ 00641 00642 /** 00643 * @} 00644 */ 00645 00646 /** 00647 * @} 00648 */ 00649 00650 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
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