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/*
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cpu_map.h - CPU and pin mapping configuration file
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Part of Grbl
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Copyright (c) 2012-2016 Sungeun K. Jeon for Gnea Research LLC
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Grbl is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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Grbl is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with Grbl. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* The cpu_map.h files serve as a central pin mapping selection file for different
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processor types or alternative pin layouts. This version of Grbl officially supports
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only the Arduino Mega328p. */
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#ifndef cpu_map_h
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#define cpu_map_h
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#ifdef CPU_MAP_ATMEGA328P // (Arduino Uno) Officially supported by Grbl.
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// Define serial port pins and interrupt vectors.
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#define SERIAL_RX USART_RX_vect
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#define SERIAL_UDRE USART_UDRE_vect
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// Define step pulse output pins. NOTE: All step bit pins must be on the same port.
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#define STEP_DDR DDRD
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#define STEP_PORT PORTD
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#define X_STEP_BIT 2 // Uno Digital Pin 2
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#define Y_STEP_BIT 3 // Uno Digital Pin 3
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#define Z_STEP_BIT 4 // Uno Digital Pin 4
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#define STEP_MASK ((1<<X_STEP_BIT)|(1<<Y_STEP_BIT)|(1<<Z_STEP_BIT)) // All step bits
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// Define step direction output pins. NOTE: All direction pins must be on the same port.
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#define DIRECTION_DDR DDRD
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#define DIRECTION_PORT PORTD
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#define X_DIRECTION_BIT 5 // Uno Digital Pin 5
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#define Y_DIRECTION_BIT 6 // Uno Digital Pin 6
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#define Z_DIRECTION_BIT 7 // Uno Digital Pin 7
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#define DIRECTION_MASK ((1<<X_DIRECTION_BIT)|(1<<Y_DIRECTION_BIT)|(1<<Z_DIRECTION_BIT)) // All direction bits
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// Define stepper driver enable/disable output pin.
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#define STEPPERS_DISABLE_DDR DDRB
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#define STEPPERS_DISABLE_PORT PORTB
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#define STEPPERS_DISABLE_BIT 0 // Uno Digital Pin 8
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#define STEPPERS_DISABLE_MASK (1<<STEPPERS_DISABLE_BIT)
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#define SetStepperDisableBit() STEPPERS_DISABLE_PORT |= (1 << STEPPERS_DISABLE_BIT)
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#define ResetStepperDisableBit() STEPPERS_DISABLE_PORT &= ~(1<<STEPPERS_DISABLE_BIT)
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#define EnableStepperDisabeBit() STEPPERS_DISABLE_DDR |= 1<<STEPPERS_DISABLE_BIT
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// Define homing/hard limit switch input pins and limit interrupt vectors.
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// NOTE: All limit bit pins must be on the same port, but not on a port with other input pins (CONTROL).
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#define LIMIT_DDR DDRB
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#define LIMIT_PIN PINB
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#define LIMIT_PORT PORTB
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#define X_LIMIT_BIT 1 // Uno Digital Pin 9
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#define Y_LIMIT_BIT 2 // Uno Digital Pin 10
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#ifdef VARIABLE_SPINDLE // Z Limit pin and spindle enabled swapped to access hardware PWM on Pin 11.
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#define Z_LIMIT_BIT 4 // Uno Digital Pin 12
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#else
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#define Z_LIMIT_BIT 3 // Uno Digital Pin 11
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#endif
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#define LIMIT_MASK ((1<<X_LIMIT_BIT)|(1<<Y_LIMIT_BIT)|(1<<Z_LIMIT_BIT)) // All limit bits
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#define LIMIT_INT PCIE0 // Pin change interrupt enable pin
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#define LIMIT_INT_vect PCINT0_vect
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#define LIMIT_PCMSK PCMSK0 // Pin change interrupt register
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// Define spindle enable and spindle direction output pins.
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#define SPINDLE_ENABLE_DDR DDRB
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#define SPINDLE_ENABLE_PORT PORTB
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// Z Limit pin and spindle PWM/enable pin swapped to access hardware PWM on Pin 11.
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#ifdef VARIABLE_SPINDLE
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#ifdef USE_SPINDLE_DIR_AS_ENABLE_PIN
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// If enabled, spindle direction pin now used as spindle enable, while PWM remains on D11.
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#define SPINDLE_ENABLE_BIT 5 // Uno Digital Pin 13 (NOTE: D13 can't be pulled-high input due to LED.)
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#else
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#define SPINDLE_ENABLE_BIT 3 // Uno Digital Pin 11
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#endif
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#else
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#define SPINDLE_ENABLE_BIT 4 // Uno Digital Pin 12
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#endif
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#ifndef USE_SPINDLE_DIR_AS_ENABLE_PIN
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#define SPINDLE_DIRECTION_DDR DDRB
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#define SPINDLE_DIRECTION_PORT PORTB
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#define SPINDLE_DIRECTION_BIT 5 // Uno Digital Pin 13 (NOTE: D13 can't be pulled-high input due to LED.)
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#endif
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#define SetSpindleEnablebit() SPINDLE_ENABLE_PORT |= (1<<SPINDLE_ENABLE_BIT); // Set pin to high
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#define ResetSpindleEnablebit() SPINDLE_ENABLE_PORT &= ~(1<<SPINDLE_ENABLE_BIT); // Set pin to low
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#define SetSpindleDirectionBit() SPINDLE_DIRECTION_PORT |= (1<<SPINDLE_DIRECTION_BIT);
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#define ResetSpindleDirectionBit() SPINDLE_DIRECTION_PORT &= ~(1<<SPINDLE_DIRECTION_BIT);
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// Define flood and mist coolant enable output pins.
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#define COOLANT_FLOOD_DDR DDRC
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#define COOLANT_FLOOD_PORT PORTC
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#define COOLANT_FLOOD_BIT 3 // Uno Analog Pin 3
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#define COOLANT_MIST_DDR DDRC
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#define COOLANT_MIST_PORT PORTC
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#define COOLANT_MIST_BIT 4 // Uno Analog Pin 4
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110
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// Define user-control controls (cycle start, reset, feed hold) input pins.
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// NOTE: All CONTROLs pins must be on the same port and not on a port with other input pins (limits).
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#define CONTROL_DDR DDRC
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#define CONTROL_PIN PINC
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#define CONTROL_PORT PORTC
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#define CONTROL_RESET_BIT 0 // Uno Analog Pin 0
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#define CONTROL_FEED_HOLD_BIT 1 // Uno Analog Pin 1
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#define CONTROL_CYCLE_START_BIT 2 // Uno Analog Pin 2
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#define CONTROL_SAFETY_DOOR_BIT 1 // Uno Analog Pin 1 NOTE: Safety door is shared with feed hold. Enabled by config define.
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#define CONTROL_INT PCIE1 // Pin change interrupt enable pin
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#define CONTROL_INT_vect PCINT1_vect
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#define CONTROL_PCMSK PCMSK1 // Pin change interrupt register
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#define CONTROL_MASK ((1<<CONTROL_RESET_BIT)|(1<<CONTROL_FEED_HOLD_BIT)|(1<<CONTROL_CYCLE_START_BIT)|(1<<CONTROL_SAFETY_DOOR_BIT))
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#define CONTROL_INVERT_MASK CONTROL_MASK // May be re-defined to only invert certain control pins.
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// Define probe switch input pin.
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#define PROBE_DDR DDRC
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#define PROBE_PIN PINC
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#define PROBE_PORT PORTC
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#define PROBE_BIT 5 // Uno Analog Pin 5
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#define PROBE_MASK (1<<PROBE_BIT)
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// Variable spindle configuration below. Do not change unless you know what you are doing.
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// NOTE: Only used when variable spindle is enabled.
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#define SPINDLE_PWM_MAX_VALUE 255 // Don't change. 328p fast PWM mode fixes top value as 255.
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#ifndef SPINDLE_PWM_MIN_VALUE
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#define SPINDLE_PWM_MIN_VALUE 1 // Must be greater than zero.
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#endif
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#define SPINDLE_PWM_OFF_VALUE 0
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#define SPINDLE_PWM_RANGE (SPINDLE_PWM_MAX_VALUE-SPINDLE_PWM_MIN_VALUE)
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#define SPINDLE_TCCRA_REGISTER TCCR2A
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#define SPINDLE_TCCRB_REGISTER TCCR2B
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#define SPINDLE_OCR_REGISTER OCR2A
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#define SPINDLE_COMB_BIT COM2A1
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// Prescaled, 8-bit Fast PWM mode.
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#define SPINDLE_TCCRA_INIT_MASK ((1<<WGM20) | (1<<WGM21)) // Configures fast PWM mode.
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// #define SPINDLE_TCCRB_INIT_MASK (1<<CS20) // Disable prescaler -> 62.5kHz
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// #define SPINDLE_TCCRB_INIT_MASK (1<<CS21) // 1/8 prescaler -> 7.8kHz (Used in v0.9)
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// #define SPINDLE_TCCRB_INIT_MASK ((1<<CS21) | (1<<CS20)) // 1/32 prescaler -> 1.96kHz
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#define SPINDLE_TCCRB_INIT_MASK (1<<CS22) // 1/64 prescaler -> 0.98kHz (J-tech laser)
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152
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// NOTE: On the 328p, these must be the same as the SPINDLE_ENABLE settings.
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#define SPINDLE_PWM_DDR DDRB
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#define SPINDLE_PWM_PORT PORTB
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#define SPINDLE_PWM_BIT 3 // Uno Digital Pin 11
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#endif
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// Define serial port pins and interrupt vectors.
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#ifdef CPU_MAP_WIN32
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// Define step pulse output pins. NOTE: All step bit pins must be on the same port.
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#define STEP_DDR DDRD
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#define STEP_PORT PORTD
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#define X_STEP_BIT 2
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#define Y_STEP_BIT 3
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#define Z_STEP_BIT 4
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#define STEP_MASK ((1<<X_STEP_BIT)|(1<<Y_STEP_BIT)|(1<<Z_STEP_BIT)) // All step bits
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169
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170
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// Define step direction output pins. NOTE: All direction pins must be on the same port.
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#define DIRECTION_DDR DDRD
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#define DIRECTION_PORT PORTD
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#define X_DIRECTION_BIT 5
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#define Y_DIRECTION_BIT 6
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#define Z_DIRECTION_BIT 7
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176
|
#define DIRECTION_MASK ((1<<X_DIRECTION_BIT)|(1<<Y_DIRECTION_BIT)|(1<<Z_DIRECTION_BIT)) // All direction bits
|
| Sergunb |
0:8f0d870509fe
|
177
|
|
| Sergunb |
0:8f0d870509fe
|
178
|
// Define stepper driver enable/disable output pin.
|
| Sergunb |
0:8f0d870509fe
|
179
|
#define SetStepperDisableBit()
|
| Sergunb |
0:8f0d870509fe
|
180
|
#define ResetStepperDisableBit()
|
| Sergunb |
0:8f0d870509fe
|
181
|
|
| Sergunb |
0:8f0d870509fe
|
182
|
|
| Sergunb |
0:8f0d870509fe
|
183
|
// Define homing/hard limit switch input pins and limit interrupt vectors.
|
| Sergunb |
0:8f0d870509fe
|
184
|
// NOTE: All limit bit pins must be on the same port, but not on a port with other input pins (CONTROL).
|
| Sergunb |
0:8f0d870509fe
|
185
|
#define LIMIT_DDR DDRB
|
| Sergunb |
0:8f0d870509fe
|
186
|
#define LIMIT_PIN PINB
|
| Sergunb |
0:8f0d870509fe
|
187
|
#define LIMIT_PORT PORTB
|
| Sergunb |
0:8f0d870509fe
|
188
|
#define X_LIMIT_BIT 1
|
| Sergunb |
0:8f0d870509fe
|
189
|
#define Y_LIMIT_BIT 2
|
| Sergunb |
0:8f0d870509fe
|
190
|
#ifdef VARIABLE_SPINDLE // Z Limit pin and spindle enabled swapped to access hardware PWM on Pin 11.
|
| Sergunb |
0:8f0d870509fe
|
191
|
#define Z_LIMIT_BIT 4
|
| Sergunb |
0:8f0d870509fe
|
192
|
#else
|
| Sergunb |
0:8f0d870509fe
|
193
|
#define Z_LIMIT_BIT 3
|
| Sergunb |
0:8f0d870509fe
|
194
|
#endif
|
| Sergunb |
0:8f0d870509fe
|
195
|
#define LIMIT_MASK ((1<<X_LIMIT_BIT)|(1<<Y_LIMIT_BIT)|(1<<Z_LIMIT_BIT)) // All limit bits
|
| Sergunb |
0:8f0d870509fe
|
196
|
#define LIMIT_INT PCIE0 // Pin change interrupt enable pin
|
| Sergunb |
0:8f0d870509fe
|
197
|
#define LIMIT_INT_vect PCINT0_vect
|
| Sergunb |
0:8f0d870509fe
|
198
|
#define LIMIT_PCMSK PCMSK0 // Pin change interrupt register
|
| Sergunb |
0:8f0d870509fe
|
199
|
|
| Sergunb |
0:8f0d870509fe
|
200
|
// Define spindle enable and spindle direction output pins.
|
| Sergunb |
0:8f0d870509fe
|
201
|
#define SPINDLE_ENABLE_DDR DDRB
|
| Sergunb |
0:8f0d870509fe
|
202
|
#define SPINDLE_ENABLE_PORT PORTB
|
| Sergunb |
0:8f0d870509fe
|
203
|
// Z Limit pin and spindle PWM/enable pin swapped to access hardware PWM on Pin 11.
|
| Sergunb |
0:8f0d870509fe
|
204
|
#ifdef VARIABLE_SPINDLE
|
| Sergunb |
0:8f0d870509fe
|
205
|
#ifdef USE_SPINDLE_DIR_AS_ENABLE_PIN
|
| Sergunb |
0:8f0d870509fe
|
206
|
// If enabled, spindle direction pin now used as spindle enable, while PWM remains on D11.
|
| Sergunb |
0:8f0d870509fe
|
207
|
#define SPINDLE_ENABLE_BIT 5 // Uno Digital Pin 13 (NOTE: D13 can't be pulled-high input due to LED.)
|
| Sergunb |
0:8f0d870509fe
|
208
|
#else
|
| Sergunb |
0:8f0d870509fe
|
209
|
#define SPINDLE_ENABLE_BIT 3 // Uno Digital Pin 11
|
| Sergunb |
0:8f0d870509fe
|
210
|
#endif
|
| Sergunb |
0:8f0d870509fe
|
211
|
#else
|
| Sergunb |
0:8f0d870509fe
|
212
|
#define SPINDLE_ENABLE_BIT 4 // Uno Digital Pin 12
|
| Sergunb |
0:8f0d870509fe
|
213
|
#endif
|
| Sergunb |
0:8f0d870509fe
|
214
|
#ifndef USE_SPINDLE_DIR_AS_ENABLE_PIN
|
| Sergunb |
0:8f0d870509fe
|
215
|
#define SPINDLE_DIRECTION_DDR DDRB
|
| Sergunb |
0:8f0d870509fe
|
216
|
#define SPINDLE_DIRECTION_PORT PORTB
|
| Sergunb |
0:8f0d870509fe
|
217
|
#define SPINDLE_DIRECTION_BIT 5 // Uno Digital Pin 13 (NOTE: D13 can't be pulled-high input due to LED.)
|
| Sergunb |
0:8f0d870509fe
|
218
|
#endif
|
| Sergunb |
0:8f0d870509fe
|
219
|
|
| Sergunb |
0:8f0d870509fe
|
220
|
// Define flood and mist coolant enable output pins.
|
| Sergunb |
0:8f0d870509fe
|
221
|
// NOTE: Uno analog pins 4 and 5 are reserved for an i2c interface, and may be installed at
|
| Sergunb |
0:8f0d870509fe
|
222
|
// a later date if flash and memory space allows.
|
| Sergunb |
0:8f0d870509fe
|
223
|
#define COOLANT_FLOOD_DDR DDRC
|
| Sergunb |
0:8f0d870509fe
|
224
|
#define COOLANT_FLOOD_PORT PORTC
|
| Sergunb |
0:8f0d870509fe
|
225
|
#define COOLANT_FLOOD_BIT 3 // Uno Analog Pin 3
|
| Sergunb |
0:8f0d870509fe
|
226
|
#ifdef ENABLE_M7 // Mist coolant disabled by default. See config.h to enable/disable.
|
| Sergunb |
0:8f0d870509fe
|
227
|
#define COOLANT_MIST_DDR DDRC
|
| Sergunb |
0:8f0d870509fe
|
228
|
#define COOLANT_MIST_PORT PORTC
|
| Sergunb |
0:8f0d870509fe
|
229
|
#define COOLANT_MIST_BIT 4 // Uno Analog Pin 4
|
| Sergunb |
0:8f0d870509fe
|
230
|
#endif
|
| Sergunb |
0:8f0d870509fe
|
231
|
|
| Sergunb |
0:8f0d870509fe
|
232
|
// Define user-control controls (cycle start, reset, feed hold) input pins.
|
| Sergunb |
0:8f0d870509fe
|
233
|
// NOTE: All CONTROLs pins must be on the same port and not on a port with other input pins (limits).
|
| Sergunb |
0:8f0d870509fe
|
234
|
#define CONTROL_DDR DDRC
|
| Sergunb |
0:8f0d870509fe
|
235
|
#define CONTROL_PIN PINC
|
| Sergunb |
0:8f0d870509fe
|
236
|
#define CONTROL_PORT PORTC
|
| Sergunb |
0:8f0d870509fe
|
237
|
#define CONTROL_RESET_BIT 0 // MEGA2560 Analog Pin 8
|
| Sergunb |
0:8f0d870509fe
|
238
|
#define CONTROL_FEED_HOLD_BIT 1 // MEGA2560 Analog Pin 9
|
| Sergunb |
0:8f0d870509fe
|
239
|
#define CONTROL_CYCLE_START_BIT 2 // MEGA2560 Analog Pin 10
|
| Sergunb |
0:8f0d870509fe
|
240
|
#define CONTROL_SAFETY_DOOR_BIT 3 // MEGA2560 Analog Pin 11
|
| Sergunb |
0:8f0d870509fe
|
241
|
#define CONTROL_INT PCIE2 // Pin change interrupt enable pin
|
| Sergunb |
0:8f0d870509fe
|
242
|
#define CONTROL_INT_vect PCINT2_vect
|
| Sergunb |
0:8f0d870509fe
|
243
|
#define CONTROL_PCMSK PCMSK2 // Pin change interrupt register
|
| Sergunb |
0:8f0d870509fe
|
244
|
#define CONTROL_MASK ((1<<CONTROL_RESET_BIT)|(1<<CONTROL_FEED_HOLD_BIT)|(1<<CONTROL_CYCLE_START_BIT)|(1<<CONTROL_SAFETY_DOOR_BIT))
|
| Sergunb |
0:8f0d870509fe
|
245
|
|
| Sergunb |
0:8f0d870509fe
|
246
|
// Define probe switch input pin.
|
| Sergunb |
0:8f0d870509fe
|
247
|
#define PROBE_DDR DDRC
|
| Sergunb |
0:8f0d870509fe
|
248
|
#define PROBE_PIN PINC
|
| Sergunb |
0:8f0d870509fe
|
249
|
#define PROBE_PORT PORTC
|
| Sergunb |
0:8f0d870509fe
|
250
|
#define PROBE_BIT 5 // Uno Analog Pin 5
|
| Sergunb |
0:8f0d870509fe
|
251
|
#define PROBE_MASK (1<<PROBE_BIT)
|
| Sergunb |
0:8f0d870509fe
|
252
|
|
| Sergunb |
0:8f0d870509fe
|
253
|
// Start of PWM & Stepper Enabled Spindle
|
| Sergunb |
0:8f0d870509fe
|
254
|
#ifdef VARIABLE_SPINDLE
|
| Sergunb |
0:8f0d870509fe
|
255
|
// Advanced Configuration Below You should not need to touch these variables
|
| Sergunb |
0:8f0d870509fe
|
256
|
#define PWM_MAX_VALUE 255.0
|
| Sergunb |
0:8f0d870509fe
|
257
|
#define TCCRA_REGISTER TCCR2A
|
| Sergunb |
0:8f0d870509fe
|
258
|
#define TCCRB_REGISTER TCCR2B
|
| Sergunb |
0:8f0d870509fe
|
259
|
#define OCR_REGISTER OCR2A
|
| Sergunb |
0:8f0d870509fe
|
260
|
|
| Sergunb |
0:8f0d870509fe
|
261
|
#define COMB_BIT COM2A1
|
| Sergunb |
0:8f0d870509fe
|
262
|
#define WAVE0_REGISTER WGM20
|
| Sergunb |
0:8f0d870509fe
|
263
|
#define WAVE1_REGISTER WGM21
|
| Sergunb |
0:8f0d870509fe
|
264
|
#define WAVE2_REGISTER WGM22
|
| Sergunb |
0:8f0d870509fe
|
265
|
#define WAVE3_REGISTER WGM23
|
| Sergunb |
0:8f0d870509fe
|
266
|
|
| Sergunb |
0:8f0d870509fe
|
267
|
// NOTE: On the 328p, these must be the same as the SPINDLE_ENABLE settings.
|
| Sergunb |
0:8f0d870509fe
|
268
|
#define SPINDLE_PWM_DDR DDRB
|
| Sergunb |
0:8f0d870509fe
|
269
|
#define SPINDLE_PWM_PORT PORTB
|
| Sergunb |
0:8f0d870509fe
|
270
|
#define SPINDLE_PWM_BIT 3 // Uno Digital Pin 11
|
| Sergunb |
0:8f0d870509fe
|
271
|
#endif // End of VARIABLE_SPINDLE
|
| Sergunb |
0:8f0d870509fe
|
272
|
#define SPINDLE_PWM_MAX_VALUE 255 // Don't change. 328p fast PWM mode fixes top value as 255.
|
| Sergunb |
0:8f0d870509fe
|
273
|
#ifndef SPINDLE_PWM_MIN_VALUE
|
| Sergunb |
0:8f0d870509fe
|
274
|
#define SPINDLE_PWM_MIN_VALUE 1 // Must be greater than zero.
|
| Sergunb |
0:8f0d870509fe
|
275
|
#endif
|
| Sergunb |
0:8f0d870509fe
|
276
|
#define SPINDLE_PWM_OFF_VALUE 0
|
| Sergunb |
0:8f0d870509fe
|
277
|
#define SPINDLE_PWM_RANGE (SPINDLE_PWM_MAX_VALUE-SPINDLE_PWM_MIN_VALUE)
|
| Sergunb |
0:8f0d870509fe
|
278
|
|
| Sergunb |
0:8f0d870509fe
|
279
|
#define SetSpindleEnablebit() // Set pin to high
|
| Sergunb |
0:8f0d870509fe
|
280
|
#define ResetSpindleEnablebit() // Set pin to low
|
| Sergunb |
0:8f0d870509fe
|
281
|
#define SetSpindleDirectionBit()
|
| Sergunb |
0:8f0d870509fe
|
282
|
#define ResetSpindleDirectionBit()
|
| Sergunb |
0:8f0d870509fe
|
283
|
|
| Sergunb |
0:8f0d870509fe
|
284
|
#endif
|
| Sergunb |
0:8f0d870509fe
|
285
|
|
| Sergunb |
0:8f0d870509fe
|
286
|
#ifdef CPU_MAP_STM32F103
|
| Sergunb |
0:8f0d870509fe
|
287
|
|
| Sergunb |
0:8f0d870509fe
|
288
|
// Define step pulse output pins. NOTE: All step bit pins must be on the same port.
|
| Sergunb |
0:8f0d870509fe
|
289
|
#define STEP_PORT GPIOA
|
| Sergunb |
0:8f0d870509fe
|
290
|
#define RCC_STEP_PORT RCC_APB2Periph_GPIOA
|
| Sergunb |
0:8f0d870509fe
|
291
|
#define X_STEP_BIT 0
|
| Sergunb |
0:8f0d870509fe
|
292
|
#define Y_STEP_BIT 1
|
| Sergunb |
0:8f0d870509fe
|
293
|
#define Z_STEP_BIT 2
|
| Sergunb |
0:8f0d870509fe
|
294
|
#define STEP_MASK ((1<<X_STEP_BIT)|(1<<Y_STEP_BIT)|(1<<Z_STEP_BIT)) // All step bits
|
| Sergunb |
0:8f0d870509fe
|
295
|
|
| Sergunb |
0:8f0d870509fe
|
296
|
// Define step direction output pins. NOTE: All direction pins must be on the same port.
|
| Sergunb |
0:8f0d870509fe
|
297
|
#define DIRECTION_PORT GPIOA
|
| Sergunb |
0:8f0d870509fe
|
298
|
#define RCC_DIRECTION_PORT RCC_APB2Periph_GPIOA
|
| Sergunb |
0:8f0d870509fe
|
299
|
#define X_DIRECTION_BIT 3
|
| Sergunb |
0:8f0d870509fe
|
300
|
#define Y_DIRECTION_BIT 4
|
| Sergunb |
0:8f0d870509fe
|
301
|
#define Z_DIRECTION_BIT 5
|
| Sergunb |
0:8f0d870509fe
|
302
|
#define DIRECTION_MASK ((1<<X_DIRECTION_BIT)|(1<<Y_DIRECTION_BIT)|(1<<Z_DIRECTION_BIT)) // All direction bits
|
| Sergunb |
0:8f0d870509fe
|
303
|
|
| Sergunb |
0:8f0d870509fe
|
304
|
// Define stepper driver enable/disable output pin.
|
| Sergunb |
0:8f0d870509fe
|
305
|
#define STEPPERS_DISABLE_PORT GPIOA
|
| Sergunb |
0:8f0d870509fe
|
306
|
#define RCC_STEPPERS_DISABLE_PORT RCC_APB2Periph_GPIOA
|
| Sergunb |
0:8f0d870509fe
|
307
|
#define STEPPERS_DISABLE_BIT 6
|
| Sergunb |
0:8f0d870509fe
|
308
|
#define STEPPERS_DISABLE_MASK (1<<STEPPERS_DISABLE_BIT)
|
| Sergunb |
0:8f0d870509fe
|
309
|
#define SetStepperDisableBit() GPIO_SetBits(STEPPERS_DISABLE_PORT,STEPPERS_DISABLE_MASK)
|
| Sergunb |
0:8f0d870509fe
|
310
|
#define ResetStepperDisableBit() GPIO_ResetBits(STEPPERS_DISABLE_PORT,STEPPERS_DISABLE_MASK)
|
| Sergunb |
0:8f0d870509fe
|
311
|
|
| Sergunb |
0:8f0d870509fe
|
312
|
|
| Sergunb |
0:8f0d870509fe
|
313
|
// Define homing/hard limit switch input pins and limit interrupt vectors.
|
| Sergunb |
0:8f0d870509fe
|
314
|
// NOTE: All limit bit pins must be on the same port
|
| Sergunb |
0:8f0d870509fe
|
315
|
#define LIMIT_PIN GPIOB
|
| Sergunb |
0:8f0d870509fe
|
316
|
#define LIMIT_PORT GPIOB
|
| Sergunb |
0:8f0d870509fe
|
317
|
#define RCC_LIMIT_PORT RCC_APB2Periph_GPIOB
|
| Sergunb |
0:8f0d870509fe
|
318
|
#define GPIO_LIMIT_PORT GPIO_PortSourceGPIOB
|
| Sergunb |
0:8f0d870509fe
|
319
|
#define X_LIMIT_BIT 10
|
| Sergunb |
0:8f0d870509fe
|
320
|
#define Y_LIMIT_BIT 11
|
| Sergunb |
0:8f0d870509fe
|
321
|
#define Z_LIMIT_BIT 12
|
| Sergunb |
0:8f0d870509fe
|
322
|
|
| Sergunb |
0:8f0d870509fe
|
323
|
#define LIMIT_MASK ((1<<X_LIMIT_BIT)|(1<<Y_LIMIT_BIT)|(1<<Z_LIMIT_BIT)) // All limit bits
|
| Sergunb |
0:8f0d870509fe
|
324
|
|
| Sergunb |
0:8f0d870509fe
|
325
|
// Define spindle enable and spindle direction output pins.
|
| Sergunb |
0:8f0d870509fe
|
326
|
#define SPINDLE_ENABLE_PORT GPIOB
|
| Sergunb |
0:8f0d870509fe
|
327
|
#define RCC_SPINDLE_ENABLE_PORT RCC_APB2Periph_GPIOB
|
| Sergunb |
0:8f0d870509fe
|
328
|
#define SPINDLE_ENABLE_BIT 13 //
|
| Sergunb |
0:8f0d870509fe
|
329
|
#ifndef USE_SPINDLE_DIR_AS_ENABLE_PIN
|
| Sergunb |
0:8f0d870509fe
|
330
|
#define SPINDLE_DIRECTION_DDR GPIOB
|
| Sergunb |
0:8f0d870509fe
|
331
|
#define SPINDLE_DIRECTION_PORT GPIOB
|
| Sergunb |
0:8f0d870509fe
|
332
|
#define SPINDLE_DIRECTION_BIT 14 //
|
| Sergunb |
0:8f0d870509fe
|
333
|
#endif
|
| Sergunb |
0:8f0d870509fe
|
334
|
#define SetSpindleEnablebit() GPIO_WriteBit(SPINDLE_ENABLE_PORT, 1 << SPINDLE_ENABLE_BIT, Bit_SET)
|
| Sergunb |
0:8f0d870509fe
|
335
|
#define ResetSpindleEnablebit() GPIO_WriteBit(SPINDLE_ENABLE_PORT, 1 << SPINDLE_ENABLE_BIT, Bit_RESET)
|
| Sergunb |
0:8f0d870509fe
|
336
|
#define SetSpindleDirectionBit() GPIO_WriteBit(SPINDLE_DIRECTION_PORT, 1 << SPINDLE_DIRECTION_BIT,Bit_SET)
|
| Sergunb |
0:8f0d870509fe
|
337
|
#define ResetSpindleDirectionBit() GPIO_WriteBit(SPINDLE_DIRECTION_PORT, 1 << SPINDLE_DIRECTION_BIT,Bit_RESET)
|
| Sergunb |
0:8f0d870509fe
|
338
|
|
| Sergunb |
0:8f0d870509fe
|
339
|
|
| Sergunb |
0:8f0d870509fe
|
340
|
// Define flood and mist coolant enable output pins.
|
| Sergunb |
0:8f0d870509fe
|
341
|
// a later date if flash and memory space allows.
|
| Sergunb |
0:8f0d870509fe
|
342
|
#define COOLANT_FLOOD_PORT GPIOB
|
| Sergunb |
0:8f0d870509fe
|
343
|
#define RCC_COOLANT_FLOOD_PORT RCC_APB2Periph_GPIOB
|
| Sergunb |
0:8f0d870509fe
|
344
|
#define COOLANT_FLOOD_BIT 3
|
| Sergunb |
0:8f0d870509fe
|
345
|
#define COOLANT_MIST_PORT GPIOB
|
| Sergunb |
0:8f0d870509fe
|
346
|
#define RCC_COOLANT_MIST_PORT RCC_APB2Periph_GPIOB
|
| Sergunb |
0:8f0d870509fe
|
347
|
#define COOLANT_MIST_BIT 4
|
| Sergunb |
0:8f0d870509fe
|
348
|
|
| Sergunb |
0:8f0d870509fe
|
349
|
// Define user-control controls (cycle start, reset, feed hold) input pins.
|
| Sergunb |
0:8f0d870509fe
|
350
|
// NOTE: All CONTROLs pins must be on the same port and not on a port with other input pins (limits).
|
| Sergunb |
0:8f0d870509fe
|
351
|
#define CONTROL_PIN_PORT GPIOB
|
| Sergunb |
0:8f0d870509fe
|
352
|
#define CONTROL_PORT GPIOB
|
| Sergunb |
0:8f0d870509fe
|
353
|
#define RCC_CONTROL_PORT RCC_APB2Periph_GPIOB
|
| Sergunb |
0:8f0d870509fe
|
354
|
#define GPIO_CONTROL_PORT GPIO_PortSourceGPIOB
|
| Sergunb |
0:8f0d870509fe
|
355
|
#define CONTROL_RESET_BIT 5
|
| Sergunb |
0:8f0d870509fe
|
356
|
#define CONTROL_FEED_HOLD_BIT 6
|
| Sergunb |
0:8f0d870509fe
|
357
|
#define CONTROL_CYCLE_START_BIT 7
|
| Sergunb |
0:8f0d870509fe
|
358
|
#define CONTROL_SAFETY_DOOR_BIT 8
|
| Sergunb |
0:8f0d870509fe
|
359
|
#define CONTROL_MASK ((1<<CONTROL_RESET_BIT)|(1<<CONTROL_FEED_HOLD_BIT)|(1<<CONTROL_CYCLE_START_BIT)|(1<<CONTROL_SAFETY_DOOR_BIT))
|
| Sergunb |
0:8f0d870509fe
|
360
|
|
| Sergunb |
0:8f0d870509fe
|
361
|
// Define probe switch input pin.
|
| Sergunb |
0:8f0d870509fe
|
362
|
#define PROBE_PORT GPIOA
|
| Sergunb |
0:8f0d870509fe
|
363
|
#define RCC_PROBE_PORT RCC_APB2Periph_GPIOA
|
| Sergunb |
0:8f0d870509fe
|
364
|
#define PROBE_BIT 15
|
| Sergunb |
0:8f0d870509fe
|
365
|
#define PROBE_MASK (1<<PROBE_BIT)
|
| Sergunb |
0:8f0d870509fe
|
366
|
|
| Sergunb |
0:8f0d870509fe
|
367
|
// Start of PWM & Stepper Enabled Spindle
|
| Sergunb |
0:8f0d870509fe
|
368
|
#ifdef VARIABLE_SPINDLE
|
| Sergunb |
0:8f0d870509fe
|
369
|
|
| Sergunb |
0:8f0d870509fe
|
370
|
// NOTE: On the 328p, these must be the same as the SPINDLE_ENABLE settings.
|
| Sergunb |
0:8f0d870509fe
|
371
|
#define SPINDLE_PWM_FREQUENCY 10000 // KHz
|
| Sergunb |
0:8f0d870509fe
|
372
|
#define SPINDLE_PWM_DDR GPIOA
|
| Sergunb |
0:8f0d870509fe
|
373
|
#define SPINDLE_PWM_PORT GPIOA
|
| Sergunb |
0:8f0d870509fe
|
374
|
#define RCC_SPINDLE_PWM_PORT RCC_APB2Periph_GPIOA
|
| Sergunb |
0:8f0d870509fe
|
375
|
#define SPINDLE_PWM_BIT 8
|
| Sergunb |
0:8f0d870509fe
|
376
|
#endif // End of VARIABLE_SPINDLE
|
| Sergunb |
0:8f0d870509fe
|
377
|
#define SPINDLE_PWM_MAX_VALUE (1000000 / SPINDLE_PWM_FREQUENCY)
|
| Sergunb |
0:8f0d870509fe
|
378
|
#ifndef SPINDLE_PWM_MIN_VALUE
|
| Sergunb |
0:8f0d870509fe
|
379
|
#define SPINDLE_PWM_MIN_VALUE 1 // Must be greater than zero.
|
| Sergunb |
0:8f0d870509fe
|
380
|
#endif
|
| Sergunb |
0:8f0d870509fe
|
381
|
#define SPINDLE_PWM_OFF_VALUE 0
|
| Sergunb |
0:8f0d870509fe
|
382
|
#define SPINDLE_PWM_RANGE (SPINDLE_PWM_MAX_VALUE-SPINDLE_PWM_MIN_VALUE)
|
| Sergunb |
0:8f0d870509fe
|
383
|
|
| Sergunb |
0:8f0d870509fe
|
384
|
// Port A Port B
|
| Sergunb |
0:8f0d870509fe
|
385
|
// 0 X_STEP_BIT
|
| Sergunb |
0:8f0d870509fe
|
386
|
// 1 Y_STEP_BIT
|
| Sergunb |
0:8f0d870509fe
|
387
|
// 2 Z_STEP_BIT
|
| Sergunb |
0:8f0d870509fe
|
388
|
// 3 X_DIRECTION_BIT COOLANT_FLOOD_BIT
|
| Sergunb |
0:8f0d870509fe
|
389
|
// 4 Y_DIRECTION_BIT COOLANT_MIST_BIT
|
| Sergunb |
0:8f0d870509fe
|
390
|
// 5 Z_DIRECTION_BIT CONTROL_RESET_BIT
|
| Sergunb |
0:8f0d870509fe
|
391
|
// 6 STEPPERS_DISABLE_BIT CONTROL_FEED_HOLD_BIT
|
| Sergunb |
0:8f0d870509fe
|
392
|
// 7 CONTROL_CYCLE_START_BIT
|
| Sergunb |
0:8f0d870509fe
|
393
|
// 8 SPINDLE_PWM_BIT CONTROL_SAFETY_DOOR_BIT
|
| Sergunb |
0:8f0d870509fe
|
394
|
// 9
|
| Sergunb |
0:8f0d870509fe
|
395
|
// 10 X_LIMIT_BIT
|
| Sergunb |
0:8f0d870509fe
|
396
|
// 11 Y_LIMIT_BIT
|
| Sergunb |
0:8f0d870509fe
|
397
|
// 12 Z_LIMIT_BIT
|
| Sergunb |
0:8f0d870509fe
|
398
|
// 13 14 SWD SPINDLE_ENABLE_BIT
|
| Sergunb |
0:8f0d870509fe
|
399
|
// 14 SPINDLE_DIRECTION_BIT
|
| Sergunb |
0:8f0d870509fe
|
400
|
// 15 PROBE_BIT
|
| Sergunb |
0:8f0d870509fe
|
401
|
|
| Sergunb |
0:8f0d870509fe
|
402
|
#endif
|
| Sergunb |
0:8f0d870509fe
|
403
|
/*
|
| Sergunb |
0:8f0d870509fe
|
404
|
#ifdef CPU_MAP_CUSTOM_PROC
|
| Sergunb |
0:8f0d870509fe
|
405
|
// For a custom pin map or different processor, copy and edit one of the available cpu
|
| Sergunb |
0:8f0d870509fe
|
406
|
// map files and modify it to your needs. Make sure the defined name is also changed in
|
| Sergunb |
0:8f0d870509fe
|
407
|
// the config.h file.
|
| Sergunb |
0:8f0d870509fe
|
408
|
#endif
|
| Sergunb |
0:8f0d870509fe
|
409
|
*/
|
| Sergunb |
0:8f0d870509fe
|
410
|
|
| Sergunb |
0:8f0d870509fe
|
411
|
#endif
|