stm_usb_fs_lib/inc/usb_conf.hh@0:f1834a63f7c1, 2017-09-04 (annotated)
- Committer:
- Sergunb
- Date:
- Mon Sep 04 12:03:42 2017 +0000
- Revision:
- 0:f1834a63f7c1
Initial commit
Who changed what in which revision?
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Sergunb | 0:f1834a63f7c1 | 1 | /******************** (C) COPYRIGHT 2010 STMicroelectronics ******************** |
Sergunb | 0:f1834a63f7c1 | 2 | * File Name : usb_conf.h |
Sergunb | 0:f1834a63f7c1 | 3 | * Author : MCD Application Team |
Sergunb | 0:f1834a63f7c1 | 4 | * Version : V3.2.1 |
Sergunb | 0:f1834a63f7c1 | 5 | * Date : 07/05/2010 |
Sergunb | 0:f1834a63f7c1 | 6 | * Description : Custom HID demo configuration file |
Sergunb | 0:f1834a63f7c1 | 7 | ******************************************************************************** |
Sergunb | 0:f1834a63f7c1 | 8 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
Sergunb | 0:f1834a63f7c1 | 9 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. |
Sergunb | 0:f1834a63f7c1 | 10 | * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, |
Sergunb | 0:f1834a63f7c1 | 11 | * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE |
Sergunb | 0:f1834a63f7c1 | 12 | * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING |
Sergunb | 0:f1834a63f7c1 | 13 | * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
Sergunb | 0:f1834a63f7c1 | 14 | *******************************************************************************/ |
Sergunb | 0:f1834a63f7c1 | 15 | |
Sergunb | 0:f1834a63f7c1 | 16 | /* Define to prevent recursive inclusion -------------------------------------*/ |
Sergunb | 0:f1834a63f7c1 | 17 | #ifndef __USB_CONF_H |
Sergunb | 0:f1834a63f7c1 | 18 | #define __USB_CONF_H |
Sergunb | 0:f1834a63f7c1 | 19 | |
Sergunb | 0:f1834a63f7c1 | 20 | /* Includes ------------------------------------------------------------------*/ |
Sergunb | 0:f1834a63f7c1 | 21 | /* Exported types ------------------------------------------------------------*/ |
Sergunb | 0:f1834a63f7c1 | 22 | /* Exported constants --------------------------------------------------------*/ |
Sergunb | 0:f1834a63f7c1 | 23 | /* Exported macro ------------------------------------------------------------*/ |
Sergunb | 0:f1834a63f7c1 | 24 | /* Exported functions ------------------------------------------------------- */ |
Sergunb | 0:f1834a63f7c1 | 25 | /* External variables --------------------------------------------------------*/ |
Sergunb | 0:f1834a63f7c1 | 26 | /*-------------------------------------------------------------*/ |
Sergunb | 0:f1834a63f7c1 | 27 | /* EP_NUM */ |
Sergunb | 0:f1834a63f7c1 | 28 | /* defines how many endpoints are used by the device */ |
Sergunb | 0:f1834a63f7c1 | 29 | /*-------------------------------------------------------------*/ |
Sergunb | 0:f1834a63f7c1 | 30 | #define EP_NUM (2) |
Sergunb | 0:f1834a63f7c1 | 31 | |
Sergunb | 0:f1834a63f7c1 | 32 | #ifndef STM32F10X_CL |
Sergunb | 0:f1834a63f7c1 | 33 | /*-------------------------------------------------------------*/ |
Sergunb | 0:f1834a63f7c1 | 34 | /* -------------- Buffer Description Table -----------------*/ |
Sergunb | 0:f1834a63f7c1 | 35 | /*-------------------------------------------------------------*/ |
Sergunb | 0:f1834a63f7c1 | 36 | /* buffer table base address */ |
Sergunb | 0:f1834a63f7c1 | 37 | /* buffer table base address */ |
Sergunb | 0:f1834a63f7c1 | 38 | #define BTABLE_ADDRESS (0x00) |
Sergunb | 0:f1834a63f7c1 | 39 | |
Sergunb | 0:f1834a63f7c1 | 40 | /* EP0 */ |
Sergunb | 0:f1834a63f7c1 | 41 | /* rx/tx buffer base address */ |
Sergunb | 0:f1834a63f7c1 | 42 | #define ENDP0_RXADDR (0x18) |
Sergunb | 0:f1834a63f7c1 | 43 | #define ENDP0_TXADDR (0x58) |
Sergunb | 0:f1834a63f7c1 | 44 | |
Sergunb | 0:f1834a63f7c1 | 45 | /* EP1 */ |
Sergunb | 0:f1834a63f7c1 | 46 | /* tx buffer base address */ |
Sergunb | 0:f1834a63f7c1 | 47 | #define ENDP1_TXADDR (0x100) |
Sergunb | 0:f1834a63f7c1 | 48 | #define ENDP1_RXADDR (0x104) |
Sergunb | 0:f1834a63f7c1 | 49 | |
Sergunb | 0:f1834a63f7c1 | 50 | /*-------------------------------------------------------------*/ |
Sergunb | 0:f1834a63f7c1 | 51 | /* ------------------- ISTR events -------------------------*/ |
Sergunb | 0:f1834a63f7c1 | 52 | /*-------------------------------------------------------------*/ |
Sergunb | 0:f1834a63f7c1 | 53 | /* IMR_MSK */ |
Sergunb | 0:f1834a63f7c1 | 54 | /* mask defining which events has to be handled */ |
Sergunb | 0:f1834a63f7c1 | 55 | /* by the device application software */ |
Sergunb | 0:f1834a63f7c1 | 56 | #define IMR_MSK (CNTR_CTRM | CNTR_WKUPM | CNTR_SUSPM | CNTR_ERRM | CNTR_SOFM \ |
Sergunb | 0:f1834a63f7c1 | 57 | | CNTR_ESOFM | CNTR_RESETM ) |
Sergunb | 0:f1834a63f7c1 | 58 | #endif /* STM32F10X_CL */ |
Sergunb | 0:f1834a63f7c1 | 59 | |
Sergunb | 0:f1834a63f7c1 | 60 | #ifdef STM32F10X_CL |
Sergunb | 0:f1834a63f7c1 | 61 | |
Sergunb | 0:f1834a63f7c1 | 62 | /******************************************************************************* |
Sergunb | 0:f1834a63f7c1 | 63 | * FIFO Size Configuration |
Sergunb | 0:f1834a63f7c1 | 64 | * |
Sergunb | 0:f1834a63f7c1 | 65 | * (i) Dedicated data FIFO SPRAM of 1.25 Kbytes = 1280 bytes = 320 32-bits words |
Sergunb | 0:f1834a63f7c1 | 66 | * available for the endpoints IN and OUT. |
Sergunb | 0:f1834a63f7c1 | 67 | * Device mode features: |
Sergunb | 0:f1834a63f7c1 | 68 | * -1 bidirectional CTRL EP 0 |
Sergunb | 0:f1834a63f7c1 | 69 | * -3 IN EPs to support any kind of Bulk, Interrupt or Isochronous transfer |
Sergunb | 0:f1834a63f7c1 | 70 | * -3 OUT EPs to support any kind of Bulk, Interrupt or Isochronous transfer |
Sergunb | 0:f1834a63f7c1 | 71 | * |
Sergunb | 0:f1834a63f7c1 | 72 | * ii) Receive data FIFO size = RAM for setup packets + |
Sergunb | 0:f1834a63f7c1 | 73 | * OUT endpoint control information + |
Sergunb | 0:f1834a63f7c1 | 74 | * data OUT packets + miscellaneous |
Sergunb | 0:f1834a63f7c1 | 75 | * Space = ONE 32-bits words |
Sergunb | 0:f1834a63f7c1 | 76 | * --> RAM for setup packets = 4 * n + 6 space |
Sergunb | 0:f1834a63f7c1 | 77 | * (n is the nbr of CTRL EPs the device core supports) |
Sergunb | 0:f1834a63f7c1 | 78 | * --> OUT EP CTRL info = 1 space |
Sergunb | 0:f1834a63f7c1 | 79 | * (one space for status information written to the FIFO along with each |
Sergunb | 0:f1834a63f7c1 | 80 | * received packet) |
Sergunb | 0:f1834a63f7c1 | 81 | * --> data OUT packets = (Largest Packet Size / 4) + 1 spaces |
Sergunb | 0:f1834a63f7c1 | 82 | * (MINIMUM to receive packets) |
Sergunb | 0:f1834a63f7c1 | 83 | * --> OR data OUT packets = at least 2*(Largest Packet Size / 4) + 1 spaces |
Sergunb | 0:f1834a63f7c1 | 84 | * (if high-bandwidth EP is enabled or multiple isochronous EPs) |
Sergunb | 0:f1834a63f7c1 | 85 | * --> miscellaneous = 1 space per OUT EP |
Sergunb | 0:f1834a63f7c1 | 86 | * (one space for transfer complete status information also pushed to the |
Sergunb | 0:f1834a63f7c1 | 87 | * FIFO with each endpoint's last packet) |
Sergunb | 0:f1834a63f7c1 | 88 | * |
Sergunb | 0:f1834a63f7c1 | 89 | * (iii)MINIMUM RAM space required for each IN EP Tx FIFO = MAX packet size for |
Sergunb | 0:f1834a63f7c1 | 90 | * that particular IN EP. More space allocated in the IN EP Tx FIFO results |
Sergunb | 0:f1834a63f7c1 | 91 | * in a better performance on the USB and can hide latencies on the AHB. |
Sergunb | 0:f1834a63f7c1 | 92 | * |
Sergunb | 0:f1834a63f7c1 | 93 | * (iv) TXn min size = 16 words. (n : Transmit FIFO index) |
Sergunb | 0:f1834a63f7c1 | 94 | * (v) When a TxFIFO is not used, the Configuration should be as follows: |
Sergunb | 0:f1834a63f7c1 | 95 | * case 1 : n > m and Txn is not used (n,m : Transmit FIFO indexes) |
Sergunb | 0:f1834a63f7c1 | 96 | * --> Txm can use the space allocated for Txn. |
Sergunb | 0:f1834a63f7c1 | 97 | * case2 : n < m and Txn is not used (n,m : Transmit FIFO indexes) |
Sergunb | 0:f1834a63f7c1 | 98 | * --> Txn should be configured with the minimum space of 16 words |
Sergunb | 0:f1834a63f7c1 | 99 | * (vi) The FIFO is used optimally when used TxFIFOs are allocated in the top |
Sergunb | 0:f1834a63f7c1 | 100 | * of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones. |
Sergunb | 0:f1834a63f7c1 | 101 | *******************************************************************************/ |
Sergunb | 0:f1834a63f7c1 | 102 | |
Sergunb | 0:f1834a63f7c1 | 103 | #define RX_FIFO_SIZE 128 |
Sergunb | 0:f1834a63f7c1 | 104 | #define TX0_FIFO_SIZE 64 |
Sergunb | 0:f1834a63f7c1 | 105 | #define TX1_FIFO_SIZE 64 |
Sergunb | 0:f1834a63f7c1 | 106 | #define TX2_FIFO_SIZE 16 |
Sergunb | 0:f1834a63f7c1 | 107 | #define TX3_FIFO_SIZE 16 |
Sergunb | 0:f1834a63f7c1 | 108 | |
Sergunb | 0:f1834a63f7c1 | 109 | /* OTGD-FS-DEVICE IP interrupts Enable definitions */ |
Sergunb | 0:f1834a63f7c1 | 110 | /* Uncomment the define to enable the selected interrupt */ |
Sergunb | 0:f1834a63f7c1 | 111 | //#define INTR_MODEMISMATCH |
Sergunb | 0:f1834a63f7c1 | 112 | #define INTR_SOFINTR |
Sergunb | 0:f1834a63f7c1 | 113 | #define INTR_RXSTSQLVL /* Mandatory */ |
Sergunb | 0:f1834a63f7c1 | 114 | //#define INTR_NPTXFEMPTY |
Sergunb | 0:f1834a63f7c1 | 115 | //#define INTR_GINNAKEFF |
Sergunb | 0:f1834a63f7c1 | 116 | //#define INTR_GOUTNAKEFF |
Sergunb | 0:f1834a63f7c1 | 117 | //#define INTR_ERLYSUSPEND |
Sergunb | 0:f1834a63f7c1 | 118 | #define INTR_USBSUSPEND /* Mandatory */ |
Sergunb | 0:f1834a63f7c1 | 119 | #define INTR_USBRESET /* Mandatory */ |
Sergunb | 0:f1834a63f7c1 | 120 | #define INTR_ENUMDONE /* Mandatory */ |
Sergunb | 0:f1834a63f7c1 | 121 | //#define INTR_ISOOUTDROP |
Sergunb | 0:f1834a63f7c1 | 122 | //#define INTR_EOPFRAME |
Sergunb | 0:f1834a63f7c1 | 123 | //#define INTR_EPMISMATCH |
Sergunb | 0:f1834a63f7c1 | 124 | #define INTR_INEPINTR /* Mandatory */ |
Sergunb | 0:f1834a63f7c1 | 125 | #define INTR_OUTEPINTR /* Mandatory */ |
Sergunb | 0:f1834a63f7c1 | 126 | //#define INTR_INCOMPLISOIN |
Sergunb | 0:f1834a63f7c1 | 127 | //#define INTR_INCOMPLISOOUT |
Sergunb | 0:f1834a63f7c1 | 128 | #define INTR_WKUPINTR /* Mandatory */ |
Sergunb | 0:f1834a63f7c1 | 129 | |
Sergunb | 0:f1834a63f7c1 | 130 | /* OTGD-FS-DEVICE IP interrupts subroutines */ |
Sergunb | 0:f1834a63f7c1 | 131 | /* Comment the define to enable the selected interrupt subroutine and replace it |
Sergunb | 0:f1834a63f7c1 | 132 | by user code */ |
Sergunb | 0:f1834a63f7c1 | 133 | #define INTR_MODEMISMATCH_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 134 | #define INTR_SOFINTR_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 135 | #define INTR_RXSTSQLVL_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 136 | #define INTR_NPTXFEMPTY_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 137 | #define INTR_NPTXFEMPTY_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 138 | #define INTR_GINNAKEFF_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 139 | #define INTR_GOUTNAKEFF_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 140 | #define INTR_ERLYSUSPEND_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 141 | #define INTR_USBSUSPEND_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 142 | #define INTR_USBRESET_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 143 | #define INTR_ENUMDONE_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 144 | #define INTR_ISOOUTDROP_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 145 | #define INTR_EOPFRAME_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 146 | #define INTR_EPMISMATCH_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 147 | #define INTR_INEPINTR_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 148 | #define INTR_OUTEPINTR_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 149 | #define INTR_INCOMPLISOIN_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 150 | #define INTR_INCOMPLISOOUT_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 151 | #define INTR_WKUPINTR_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 152 | |
Sergunb | 0:f1834a63f7c1 | 153 | /* Isochronous data update */ |
Sergunb | 0:f1834a63f7c1 | 154 | #define INTR_RXSTSQLVL_ISODU_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 155 | |
Sergunb | 0:f1834a63f7c1 | 156 | /* Isochronous transfer parameters */ |
Sergunb | 0:f1834a63f7c1 | 157 | /* Size of a single Isochronous buffer (size of a single transfer) */ |
Sergunb | 0:f1834a63f7c1 | 158 | #define ISOC_BUFFER_SZE 1 |
Sergunb | 0:f1834a63f7c1 | 159 | /* Number of sub-buffers (number of single buffers/transfers), should be even */ |
Sergunb | 0:f1834a63f7c1 | 160 | #define NUM_SUB_BUFFERS 2 |
Sergunb | 0:f1834a63f7c1 | 161 | |
Sergunb | 0:f1834a63f7c1 | 162 | #endif /* STM32F10X_CL */ |
Sergunb | 0:f1834a63f7c1 | 163 | |
Sergunb | 0:f1834a63f7c1 | 164 | |
Sergunb | 0:f1834a63f7c1 | 165 | /* CTR service routines */ |
Sergunb | 0:f1834a63f7c1 | 166 | /* associated to defined endpoints */ |
Sergunb | 0:f1834a63f7c1 | 167 | #define EP1_IN_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 168 | #define EP2_IN_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 169 | #define EP3_IN_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 170 | #define EP4_IN_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 171 | #define EP5_IN_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 172 | #define EP6_IN_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 173 | #define EP7_IN_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 174 | |
Sergunb | 0:f1834a63f7c1 | 175 | //#define EP1_OUT_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 176 | #define EP2_OUT_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 177 | #define EP3_OUT_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 178 | #define EP4_OUT_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 179 | #define EP5_OUT_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 180 | #define EP6_OUT_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 181 | #define EP7_OUT_Callback NOP_Process |
Sergunb | 0:f1834a63f7c1 | 182 | |
Sergunb | 0:f1834a63f7c1 | 183 | #endif /*__USB_CONF_H*/ |
Sergunb | 0:f1834a63f7c1 | 184 | |
Sergunb | 0:f1834a63f7c1 | 185 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ |
Sergunb | 0:f1834a63f7c1 | 186 |