Sergey Pastor / grbl

I'm trying to port GRBL 1.1 to the STM32F746 chip. Tell me the solution, thanks.

usb/usb_pwr.c@0:f1834a63f7c1, 2017-09-04 (annotated)

Committer:
Sergunb
Date:
Mon Sep 04 12:03:42 2017 +0000
Revision:
0:f1834a63f7c1
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Sergunb 0:f1834a63f7c1 1 /******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
Sergunb 0:f1834a63f7c1 2 * File Name : usb_pwr.c
Sergunb 0:f1834a63f7c1 3 * Author : MCD Application Team
Sergunb 0:f1834a63f7c1 4 * Version : V3.3.0
Sergunb 0:f1834a63f7c1 5 * Date : 21-March-2011
Sergunb 0:f1834a63f7c1 6 * Description : Connection/disconnection & power management
Sergunb 0:f1834a63f7c1 7 ********************************************************************************
Sergunb 0:f1834a63f7c1 8 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
Sergunb 0:f1834a63f7c1 9 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
Sergunb 0:f1834a63f7c1 10 * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
Sergunb 0:f1834a63f7c1 11 * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
Sergunb 0:f1834a63f7c1 12 * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
Sergunb 0:f1834a63f7c1 13 * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
Sergunb 0:f1834a63f7c1 14 *******************************************************************************/
Sergunb 0:f1834a63f7c1 15
Sergunb 0:f1834a63f7c1 16 /* Includes ------------------------------------------------------------------*/
Sergunb 0:f1834a63f7c1 17 #ifdef STM32L1XX_MD
Sergunb 0:f1834a63f7c1 18 #include "stm32l1xx.h"
Sergunb 0:f1834a63f7c1 19 #else
Sergunb 0:f1834a63f7c1 20 #include "stm32f10x.h"
Sergunb 0:f1834a63f7c1 21 #endif /* STM32L1XX_MD */
Sergunb 0:f1834a63f7c1 22
Sergunb 0:f1834a63f7c1 23 #include "usb_lib.h"
Sergunb 0:f1834a63f7c1 24 #include "usb_conf.h"
Sergunb 0:f1834a63f7c1 25 #include "usb_pwr.h"
Sergunb 0:f1834a63f7c1 26 #include "hw_config.h"
Sergunb 0:f1834a63f7c1 27
Sergunb 0:f1834a63f7c1 28 /* Private typedef -----------------------------------------------------------*/
Sergunb 0:f1834a63f7c1 29 /* Private define ------------------------------------------------------------*/
Sergunb 0:f1834a63f7c1 30 /* Private macro -------------------------------------------------------------*/
Sergunb 0:f1834a63f7c1 31 /* Private variables ---------------------------------------------------------*/
Sergunb 0:f1834a63f7c1 32 __IO uint32_t bDeviceState = UNCONNECTED; /* USB device status */
Sergunb 0:f1834a63f7c1 33 __IO bool fSuspendEnabled = TRUE; /* true when suspend is possible */
Sergunb 0:f1834a63f7c1 34
Sergunb 0:f1834a63f7c1 35 struct
Sergunb 0:f1834a63f7c1 36 {
Sergunb 0:f1834a63f7c1 37 __IO RESUME_STATE eState;
Sergunb 0:f1834a63f7c1 38 __IO uint8_t bESOFcnt;
Sergunb 0:f1834a63f7c1 39 }ResumeS;
Sergunb 0:f1834a63f7c1 40
Sergunb 0:f1834a63f7c1 41 /* Extern variables ----------------------------------------------------------*/
Sergunb 0:f1834a63f7c1 42 /* Private function prototypes -----------------------------------------------*/
Sergunb 0:f1834a63f7c1 43 /* Extern function prototypes ------------------------------------------------*/
Sergunb 0:f1834a63f7c1 44 /* Private functions ---------------------------------------------------------*/
Sergunb 0:f1834a63f7c1 45
Sergunb 0:f1834a63f7c1 46 /*******************************************************************************
Sergunb 0:f1834a63f7c1 47 * Function Name : PowerOn
Sergunb 0:f1834a63f7c1 48 * Description :
Sergunb 0:f1834a63f7c1 49 * Input : None.
Sergunb 0:f1834a63f7c1 50 * Output : None.
Sergunb 0:f1834a63f7c1 51 * Return : USB_SUCCESS.
Sergunb 0:f1834a63f7c1 52 *******************************************************************************/
Sergunb 0:f1834a63f7c1 53 RESULT PowerOn(void)
Sergunb 0:f1834a63f7c1 54 {
Sergunb 0:f1834a63f7c1 55 #ifndef STM32F10X_CL
Sergunb 0:f1834a63f7c1 56 uint16_t wRegVal;
Sergunb 0:f1834a63f7c1 57
Sergunb 0:f1834a63f7c1 58 /*** cable plugged-in ? ***/
Sergunb 0:f1834a63f7c1 59 USB_Cable_Config(ENABLE);
Sergunb 0:f1834a63f7c1 60
Sergunb 0:f1834a63f7c1 61 /*** CNTR_PWDN = 0 ***/
Sergunb 0:f1834a63f7c1 62 wRegVal = CNTR_FRES;
Sergunb 0:f1834a63f7c1 63 _SetCNTR(wRegVal);
Sergunb 0:f1834a63f7c1 64
Sergunb 0:f1834a63f7c1 65 /*** CNTR_FRES = 0 ***/
Sergunb 0:f1834a63f7c1 66 wInterrupt_Mask = 0;
Sergunb 0:f1834a63f7c1 67 _SetCNTR(wInterrupt_Mask);
Sergunb 0:f1834a63f7c1 68 /*** Clear pending interrupts ***/
Sergunb 0:f1834a63f7c1 69 _SetISTR(0);
Sergunb 0:f1834a63f7c1 70 /*** Set interrupt mask ***/
Sergunb 0:f1834a63f7c1 71 wInterrupt_Mask = CNTR_RESETM | CNTR_SUSPM | CNTR_WKUPM;
Sergunb 0:f1834a63f7c1 72 _SetCNTR(wInterrupt_Mask);
Sergunb 0:f1834a63f7c1 73 #endif /* STM32F10X_CL */
Sergunb 0:f1834a63f7c1 74
Sergunb 0:f1834a63f7c1 75 return USB_SUCCESS;
Sergunb 0:f1834a63f7c1 76 }
Sergunb 0:f1834a63f7c1 77
Sergunb 0:f1834a63f7c1 78 /*******************************************************************************
Sergunb 0:f1834a63f7c1 79 * Function Name : PowerOff
Sergunb 0:f1834a63f7c1 80 * Description : handles switch-off conditions
Sergunb 0:f1834a63f7c1 81 * Input : None.
Sergunb 0:f1834a63f7c1 82 * Output : None.
Sergunb 0:f1834a63f7c1 83 * Return : USB_SUCCESS.
Sergunb 0:f1834a63f7c1 84 *******************************************************************************/
Sergunb 0:f1834a63f7c1 85 RESULT PowerOff()
Sergunb 0:f1834a63f7c1 86 {
Sergunb 0:f1834a63f7c1 87 #ifndef STM32F10X_CL
Sergunb 0:f1834a63f7c1 88 /* disable all interrupts and force USB reset */
Sergunb 0:f1834a63f7c1 89 _SetCNTR(CNTR_FRES);
Sergunb 0:f1834a63f7c1 90 /* clear interrupt status register */
Sergunb 0:f1834a63f7c1 91 _SetISTR(0);
Sergunb 0:f1834a63f7c1 92 /* Disable the Pull-Up*/
Sergunb 0:f1834a63f7c1 93 USB_Cable_Config(DISABLE);
Sergunb 0:f1834a63f7c1 94 /* switch-off device */
Sergunb 0:f1834a63f7c1 95 _SetCNTR(CNTR_FRES + CNTR_PDWN);
Sergunb 0:f1834a63f7c1 96 #endif /* STM32F10X_CL */
Sergunb 0:f1834a63f7c1 97
Sergunb 0:f1834a63f7c1 98 /* sw variables reset */
Sergunb 0:f1834a63f7c1 99 /* ... */
Sergunb 0:f1834a63f7c1 100
Sergunb 0:f1834a63f7c1 101 return USB_SUCCESS;
Sergunb 0:f1834a63f7c1 102 }
Sergunb 0:f1834a63f7c1 103
Sergunb 0:f1834a63f7c1 104 /*******************************************************************************
Sergunb 0:f1834a63f7c1 105 * Function Name : Suspend
Sergunb 0:f1834a63f7c1 106 * Description : sets suspend mode operating conditions
Sergunb 0:f1834a63f7c1 107 * Input : None.
Sergunb 0:f1834a63f7c1 108 * Output : None.
Sergunb 0:f1834a63f7c1 109 * Return : USB_SUCCESS.
Sergunb 0:f1834a63f7c1 110 *******************************************************************************/
Sergunb 0:f1834a63f7c1 111 void Suspend(void)
Sergunb 0:f1834a63f7c1 112 {
Sergunb 0:f1834a63f7c1 113 #ifndef STM32F10X_CL
Sergunb 0:f1834a63f7c1 114 uint16_t wCNTR;
Sergunb 0:f1834a63f7c1 115 /* suspend preparation */
Sergunb 0:f1834a63f7c1 116 /* ... */
Sergunb 0:f1834a63f7c1 117
Sergunb 0:f1834a63f7c1 118 /* macrocell enters suspend mode */
Sergunb 0:f1834a63f7c1 119 wCNTR = _GetCNTR();
Sergunb 0:f1834a63f7c1 120 wCNTR |= CNTR_FSUSP;
Sergunb 0:f1834a63f7c1 121 _SetCNTR(wCNTR);
Sergunb 0:f1834a63f7c1 122 #endif /* STM32F10X_CL */
Sergunb 0:f1834a63f7c1 123
Sergunb 0:f1834a63f7c1 124 /* ------------------ ONLY WITH BUS-POWERED DEVICES ---------------------- */
Sergunb 0:f1834a63f7c1 125 /* power reduction */
Sergunb 0:f1834a63f7c1 126 /* ... on connected devices */
Sergunb 0:f1834a63f7c1 127
Sergunb 0:f1834a63f7c1 128 #ifndef STM32F10X_CL
Sergunb 0:f1834a63f7c1 129 /* force low-power mode in the macrocell */
Sergunb 0:f1834a63f7c1 130 wCNTR = _GetCNTR();
Sergunb 0:f1834a63f7c1 131 wCNTR |= CNTR_LPMODE;
Sergunb 0:f1834a63f7c1 132 _SetCNTR(wCNTR);
Sergunb 0:f1834a63f7c1 133 #endif /* STM32F10X_CL */
Sergunb 0:f1834a63f7c1 134
Sergunb 0:f1834a63f7c1 135 /* switch-off the clocks */
Sergunb 0:f1834a63f7c1 136 /* ... */
Sergunb 0:f1834a63f7c1 137 Enter_LowPowerMode();
Sergunb 0:f1834a63f7c1 138
Sergunb 0:f1834a63f7c1 139 }
Sergunb 0:f1834a63f7c1 140
Sergunb 0:f1834a63f7c1 141 /*******************************************************************************
Sergunb 0:f1834a63f7c1 142 * Function Name : Resume_Init
Sergunb 0:f1834a63f7c1 143 * Description : Handles wake-up restoring normal operations
Sergunb 0:f1834a63f7c1 144 * Input : None.
Sergunb 0:f1834a63f7c1 145 * Output : None.
Sergunb 0:f1834a63f7c1 146 * Return : USB_SUCCESS.
Sergunb 0:f1834a63f7c1 147 *******************************************************************************/
Sergunb 0:f1834a63f7c1 148 void Resume_Init(void)
Sergunb 0:f1834a63f7c1 149 {
Sergunb 0:f1834a63f7c1 150 #ifndef STM32F10X_CL
Sergunb 0:f1834a63f7c1 151 uint16_t wCNTR;
Sergunb 0:f1834a63f7c1 152 #endif /* STM32F10X_CL */
Sergunb 0:f1834a63f7c1 153
Sergunb 0:f1834a63f7c1 154 /* ------------------ ONLY WITH BUS-POWERED DEVICES ---------------------- */
Sergunb 0:f1834a63f7c1 155 /* restart the clocks */
Sergunb 0:f1834a63f7c1 156 /* ... */
Sergunb 0:f1834a63f7c1 157
Sergunb 0:f1834a63f7c1 158 #ifndef STM32F10X_CL
Sergunb 0:f1834a63f7c1 159 /* CNTR_LPMODE = 0 */
Sergunb 0:f1834a63f7c1 160 wCNTR = _GetCNTR();
Sergunb 0:f1834a63f7c1 161 wCNTR &= (~CNTR_LPMODE);
Sergunb 0:f1834a63f7c1 162 _SetCNTR(wCNTR);
Sergunb 0:f1834a63f7c1 163 #endif /* STM32F10X_CL */
Sergunb 0:f1834a63f7c1 164
Sergunb 0:f1834a63f7c1 165 /* restore full power */
Sergunb 0:f1834a63f7c1 166 /* ... on connected devices */
Sergunb 0:f1834a63f7c1 167 Leave_LowPowerMode();
Sergunb 0:f1834a63f7c1 168
Sergunb 0:f1834a63f7c1 169 #ifndef STM32F10X_CL
Sergunb 0:f1834a63f7c1 170 /* reset FSUSP bit */
Sergunb 0:f1834a63f7c1 171 _SetCNTR(IMR_MSK);
Sergunb 0:f1834a63f7c1 172 #endif /* STM32F10X_CL */
Sergunb 0:f1834a63f7c1 173
Sergunb 0:f1834a63f7c1 174 /* reverse suspend preparation */
Sergunb 0:f1834a63f7c1 175 /* ... */
Sergunb 0:f1834a63f7c1 176
Sergunb 0:f1834a63f7c1 177 }
Sergunb 0:f1834a63f7c1 178
Sergunb 0:f1834a63f7c1 179 /*******************************************************************************
Sergunb 0:f1834a63f7c1 180 * Function Name : Resume
Sergunb 0:f1834a63f7c1 181 * Description : This is the state machine handling resume operations and
Sergunb 0:f1834a63f7c1 182 * timing sequence. The control is based on the Resume structure
Sergunb 0:f1834a63f7c1 183 * variables and on the ESOF interrupt calling this subroutine
Sergunb 0:f1834a63f7c1 184 * without changing machine state.
Sergunb 0:f1834a63f7c1 185 * Input : a state machine value (RESUME_STATE)
Sergunb 0:f1834a63f7c1 186 * RESUME_ESOF doesn't change ResumeS.eState allowing
Sergunb 0:f1834a63f7c1 187 * decrementing of the ESOF counter in different states.
Sergunb 0:f1834a63f7c1 188 * Output : None.
Sergunb 0:f1834a63f7c1 189 * Return : None.
Sergunb 0:f1834a63f7c1 190 *******************************************************************************/
Sergunb 0:f1834a63f7c1 191 void Resume(RESUME_STATE eResumeSetVal)
Sergunb 0:f1834a63f7c1 192 {
Sergunb 0:f1834a63f7c1 193 #ifndef STM32F10X_CL
Sergunb 0:f1834a63f7c1 194 uint16_t wCNTR;
Sergunb 0:f1834a63f7c1 195 #endif /* STM32F10X_CL */
Sergunb 0:f1834a63f7c1 196
Sergunb 0:f1834a63f7c1 197 if (eResumeSetVal != RESUME_ESOF)
Sergunb 0:f1834a63f7c1 198 ResumeS.eState = eResumeSetVal;
Sergunb 0:f1834a63f7c1 199
Sergunb 0:f1834a63f7c1 200 switch (ResumeS.eState)
Sergunb 0:f1834a63f7c1 201 {
Sergunb 0:f1834a63f7c1 202 case RESUME_EXTERNAL:
Sergunb 0:f1834a63f7c1 203 Resume_Init();
Sergunb 0:f1834a63f7c1 204 ResumeS.eState = RESUME_OFF;
Sergunb 0:f1834a63f7c1 205 break;
Sergunb 0:f1834a63f7c1 206 case RESUME_INTERNAL:
Sergunb 0:f1834a63f7c1 207 Resume_Init();
Sergunb 0:f1834a63f7c1 208 ResumeS.eState = RESUME_START;
Sergunb 0:f1834a63f7c1 209 break;
Sergunb 0:f1834a63f7c1 210 case RESUME_LATER:
Sergunb 0:f1834a63f7c1 211 ResumeS.bESOFcnt = 2;
Sergunb 0:f1834a63f7c1 212 ResumeS.eState = RESUME_WAIT;
Sergunb 0:f1834a63f7c1 213 break;
Sergunb 0:f1834a63f7c1 214 case RESUME_WAIT:
Sergunb 0:f1834a63f7c1 215 ResumeS.bESOFcnt--;
Sergunb 0:f1834a63f7c1 216 if (ResumeS.bESOFcnt == 0)
Sergunb 0:f1834a63f7c1 217 ResumeS.eState = RESUME_START;
Sergunb 0:f1834a63f7c1 218 break;
Sergunb 0:f1834a63f7c1 219 case RESUME_START:
Sergunb 0:f1834a63f7c1 220 #ifdef STM32F10X_CL
Sergunb 0:f1834a63f7c1 221 OTGD_FS_SetRemoteWakeup();
Sergunb 0:f1834a63f7c1 222 #else
Sergunb 0:f1834a63f7c1 223 wCNTR = _GetCNTR();
Sergunb 0:f1834a63f7c1 224 wCNTR |= CNTR_RESUME;
Sergunb 0:f1834a63f7c1 225 _SetCNTR(wCNTR);
Sergunb 0:f1834a63f7c1 226 #endif /* STM32F10X_CL */
Sergunb 0:f1834a63f7c1 227 ResumeS.eState = RESUME_ON;
Sergunb 0:f1834a63f7c1 228 ResumeS.bESOFcnt = 10;
Sergunb 0:f1834a63f7c1 229 break;
Sergunb 0:f1834a63f7c1 230 case RESUME_ON:
Sergunb 0:f1834a63f7c1 231 #ifndef STM32F10X_CL
Sergunb 0:f1834a63f7c1 232 ResumeS.bESOFcnt--;
Sergunb 0:f1834a63f7c1 233 if (ResumeS.bESOFcnt == 0)
Sergunb 0:f1834a63f7c1 234 {
Sergunb 0:f1834a63f7c1 235 #endif /* STM32F10X_CL */
Sergunb 0:f1834a63f7c1 236 #ifdef STM32F10X_CL
Sergunb 0:f1834a63f7c1 237 OTGD_FS_ResetRemoteWakeup();
Sergunb 0:f1834a63f7c1 238 #else
Sergunb 0:f1834a63f7c1 239 wCNTR = _GetCNTR();
Sergunb 0:f1834a63f7c1 240 wCNTR &= (~CNTR_RESUME);
Sergunb 0:f1834a63f7c1 241 _SetCNTR(wCNTR);
Sergunb 0:f1834a63f7c1 242 #endif /* STM32F10X_CL */
Sergunb 0:f1834a63f7c1 243 ResumeS.eState = RESUME_OFF;
Sergunb 0:f1834a63f7c1 244 #ifndef STM32F10X_CL
Sergunb 0:f1834a63f7c1 245 }
Sergunb 0:f1834a63f7c1 246 #endif /* STM32F10X_CL */
Sergunb 0:f1834a63f7c1 247 break;
Sergunb 0:f1834a63f7c1 248 case RESUME_OFF:
Sergunb 0:f1834a63f7c1 249 case RESUME_ESOF:
Sergunb 0:f1834a63f7c1 250 default:
Sergunb 0:f1834a63f7c1 251 ResumeS.eState = RESUME_OFF;
Sergunb 0:f1834a63f7c1 252 break;
Sergunb 0:f1834a63f7c1 253 }
Sergunb 0:f1834a63f7c1 254 }
Sergunb 0:f1834a63f7c1 255
Sergunb 0:f1834a63f7c1 256 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/